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flang/test/Lower/OpenMP/omp-wsloop-variable.f90
| Show All 16 Lines | |||||
| !CHECK: %[[TMP0:.*]] = arith.constant 1 : i32 | !CHECK: %[[TMP0:.*]] = arith.constant 1 : i32 | ||||
| !CHECK: %[[TMP1:.*]] = arith.constant 100 : i32 | !CHECK: %[[TMP1:.*]] = arith.constant 100 : i32 | ||||
| !CHECK: %[[TMP2:.*]] = fir.convert %[[TMP0]] : (i32) -> i64 | !CHECK: %[[TMP2:.*]] = fir.convert %[[TMP0]] : (i32) -> i64 | ||||
| !CHECK: %[[TMP3:.*]] = fir.convert %{{.*}} : (i8) -> i64 | !CHECK: %[[TMP3:.*]] = fir.convert %{{.*}} : (i8) -> i64 | ||||
| !CHECK: %[[TMP4:.*]] = fir.convert %{{.*}} : (i16) -> i64 | !CHECK: %[[TMP4:.*]] = fir.convert %{{.*}} : (i16) -> i64 | ||||
| !CHECK: %[[TMP5:.*]] = fir.convert %{{.*}} : (i128) -> i64 | !CHECK: %[[TMP5:.*]] = fir.convert %{{.*}} : (i128) -> i64 | ||||
| !CHECK: %[[TMP6:.*]] = fir.convert %[[TMP1]] : (i32) -> i64 | !CHECK: %[[TMP6:.*]] = fir.convert %[[TMP1]] : (i32) -> i64 | ||||
| !CHECK: %[[TMP7:.*]] = fir.convert %{{.*}} : (i32) -> i64 | !CHECK: %[[TMP7:.*]] = fir.convert %{{.*}} : (i32) -> i64 | ||||
| !CHECK: omp.wsloop collapse(2) for (%[[ARG0:.*]], %[[ARG1:.*]]) : i64 = (%[[TMP2]], %[[TMP5]]) to (%[[TMP3]], %[[TMP6]]) inclusive step (%[[TMP4]], %[[TMP7]]) { | !CHECK: omp.wsloop for (%[[ARG0:.*]], %[[ARG1:.*]]) : i64 = (%[[TMP2]], %[[TMP5]]) to (%[[TMP3]], %[[TMP6]]) inclusive step (%[[TMP4]], %[[TMP7]]) { | ||||
| !CHECK: fir.store %[[ARG0]] to %[[STORE_IV0:.*]] : !fir.ref<i64> | !CHECK: fir.store %[[ARG0]] to %[[STORE_IV0:.*]] : !fir.ref<i64> | ||||
| !CHECK: fir.store %[[ARG1]] to %[[STORE_IV1:.*]] : !fir.ref<i64> | !CHECK: fir.store %[[ARG1]] to %[[STORE_IV1:.*]] : !fir.ref<i64> | ||||
| !CHECK: %[[LOAD_IV0:.*]] = fir.load %[[STORE_IV0]] : !fir.ref<i64> | !CHECK: %[[LOAD_IV0:.*]] = fir.load %[[STORE_IV0]] : !fir.ref<i64> | ||||
| !CHECK: %[[LOAD_IV1:.*]] = fir.load %[[STORE_IV1]] : !fir.ref<i64> | !CHECK: %[[LOAD_IV1:.*]] = fir.load %[[STORE_IV1]] : !fir.ref<i64> | ||||
| !CHECK: %[[TMP10:.*]] = arith.addi %[[LOAD_IV0]], %[[LOAD_IV1]] : i64 | !CHECK: %[[TMP10:.*]] = arith.addi %[[LOAD_IV0]], %[[LOAD_IV1]] : i64 | ||||
| !CHECK: %[[TMP11:.*]] = fir.convert %[[TMP10]] : (i64) -> f32 | !CHECK: %[[TMP11:.*]] = fir.convert %[[TMP10]] : (i64) -> f32 | ||||
| !CHECK: fir.store %[[TMP11]] to %{{.*}} : !fir.ref<f32> | !CHECK: fir.store %[[TMP11]] to %{{.*}} : !fir.ref<f32> | ||||
| !CHECK: omp.yield | !CHECK: omp.yield | ||||
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