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llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
| Show First 20 Lines • Show All 450 Lines • ▼ Show 20 Lines | bool SIMachineFunctionInfo::removeDeadFrameIndices( | ||||
| for (auto &R : VGPRToAGPRSpills) { | for (auto &R : VGPRToAGPRSpills) { | ||||
| if (R.second.IsDead) | if (R.second.IsDead) | ||||
| MFI.RemoveStackObject(R.first); | MFI.RemoveStackObject(R.first); | ||||
| } | } | ||||
| return HaveSGPRToMemory; | return HaveSGPRToMemory; | ||||
| } | } | ||||
| void SIMachineFunctionInfo::allocateWWMReservedSpillSlots( | |||||
| MachineFrameInfo &MFI, const SIRegisterInfo &TRI) { | |||||
| assert(WWMReservedFrameIndexes.empty()); | |||||
| WWMReservedFrameIndexes.resize(WWMReservedRegs.size()); | |||||
| int I = 0; | |||||
| for (Register VGPR : WWMReservedRegs) { | |||||
| const TargetRegisterClass *RC = TRI.getPhysRegClass(VGPR); | |||||
| WWMReservedFrameIndexes[I++] = MFI.CreateSpillStackObject( | |||||
| TRI.getSpillSize(*RC), TRI.getSpillAlign(*RC)); | |||||
| } | |||||
| } | |||||
| int SIMachineFunctionInfo::getScavengeFI(MachineFrameInfo &MFI, | int SIMachineFunctionInfo::getScavengeFI(MachineFrameInfo &MFI, | ||||
| const SIRegisterInfo &TRI) { | const SIRegisterInfo &TRI) { | ||||
| if (ScavengeFI) | if (ScavengeFI) | ||||
| return *ScavengeFI; | return *ScavengeFI; | ||||
| if (isEntryFunction()) { | if (isEntryFunction()) { | ||||
| ScavengeFI = MFI.CreateFixedObject( | ScavengeFI = MFI.CreateFixedObject( | ||||
| TRI.getSpillSize(AMDGPU::SGPR_32RegClass), 0, false); | TRI.getSpillSize(AMDGPU::SGPR_32RegClass), 0, false); | ||||
| } else { | } else { | ||||
| ▲ Show 20 Lines • Show All 109 Lines • ▼ Show 20 Lines | : ExplicitKernArgSize(MFI.getExplicitKernArgSize()), | ||||
| HighBitsOf32BitAddress(MFI.get32BitAddressHighBits()), | HighBitsOf32BitAddress(MFI.get32BitAddressHighBits()), | ||||
| Occupancy(MFI.getOccupancy()), | Occupancy(MFI.getOccupancy()), | ||||
| ScratchRSrcReg(regToString(MFI.getScratchRSrcReg(), TRI)), | ScratchRSrcReg(regToString(MFI.getScratchRSrcReg(), TRI)), | ||||
| FrameOffsetReg(regToString(MFI.getFrameOffsetReg(), TRI)), | FrameOffsetReg(regToString(MFI.getFrameOffsetReg(), TRI)), | ||||
| StackPtrOffsetReg(regToString(MFI.getStackPtrOffsetReg(), TRI)), | StackPtrOffsetReg(regToString(MFI.getStackPtrOffsetReg(), TRI)), | ||||
| BytesInStackArgArea(MFI.getBytesInStackArgArea()), | BytesInStackArgArea(MFI.getBytesInStackArgArea()), | ||||
| ReturnsVoid(MFI.returnsVoid()), | ReturnsVoid(MFI.returnsVoid()), | ||||
| ArgInfo(convertArgumentInfo(MFI.getArgInfo(), TRI)), Mode(MFI.getMode()) { | ArgInfo(convertArgumentInfo(MFI.getArgInfo(), TRI)), Mode(MFI.getMode()) { | ||||
| for (Register Reg : MFI.WWMReservedRegs) | for (Register Reg : MFI.getWWMReservedRegs()) | ||||
| WWMReservedRegs.push_back(regToString(Reg, TRI)); | WWMReservedRegs.push_back(regToString(Reg, TRI)); | ||||
| if (MFI.getVGPRForAGPRCopy()) | if (MFI.getVGPRForAGPRCopy()) | ||||
| VGPRForAGPRCopy = regToString(MFI.getVGPRForAGPRCopy(), TRI); | VGPRForAGPRCopy = regToString(MFI.getVGPRForAGPRCopy(), TRI); | ||||
| auto SFI = MFI.getOptionalScavengeFI(); | auto SFI = MFI.getOptionalScavengeFI(); | ||||
| if (SFI) | if (SFI) | ||||
| ScavengeFI = yaml::FrameIndex(*SFI, MF.getFrameInfo()); | ScavengeFI = yaml::FrameIndex(*SFI, MF.getFrameInfo()); | ||||
| } | } | ||||
| ▲ Show 20 Lines • Show All 115 Lines • Show Last 20 Lines | |||||