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Differential D123362 Diff 421424 llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll

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llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32 ; RUN: llc -mtriple=riscv32 -mattr=+v,+m -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64 ; RUN: llc -mtriple=riscv64 -mattr=+v,+m -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
RKSimonUnsubmitted
Done
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Extra attributes or better to have extra RUN lines with/without +m?

RKSimon: Extra attributes or better to have extra RUN lines with/without +m?
jacquesguanAuthorUnsubmitted
Done
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Done, thanks.

jacquesguan: Done, thanks.
define <vscale x 1 x i8> @vmul_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb) { define <vscale x 1 x i8> @vmul_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb) {
; CHECK-LABEL: vmul_vv_nxv1i8: ; CHECK-LABEL: vmul_vv_nxv1i8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, mu ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, mu
; CHECK-NEXT: vmul.vv v8, v8, v9 ; CHECK-NEXT: vmul.vv v8, v8, v9
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%vc = mul <vscale x 1 x i8> %va, %vb %vc = mul <vscale x 1 x i8> %va, %vb
▲ Show 20 Lines • Show All 902 Lines • ▼ Show 20 Lines
; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, mu ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, mu
; CHECK-NEXT: vsll.vi v8, v8, 4 ; CHECK-NEXT: vsll.vi v8, v8, 4
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%head = insertelement <vscale x 8 x i64> poison, i64 16, i32 0 %head = insertelement <vscale x 8 x i64> poison, i64 16, i32 0
%splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
%vc = mul <vscale x 8 x i64> %va, %splat %vc = mul <vscale x 8 x i64> %va, %splat
ret <vscale x 8 x i64> %vc ret <vscale x 8 x i64> %vc
} }
define <vscale x 8 x i64> @vmul_xx_nxv8i64(i64 %a, i64 %b) {
; RV32-LABEL: vmul_xx_nxv8i64:
; RV32: # %bb.0:
; RV32-NEXT: addi sp, sp, -16
; RV32-NEXT: .cfi_def_cfa_offset 16
; RV32-NEXT: sw a1, 12(sp)
; RV32-NEXT: sw a0, 8(sp)
; RV32-NEXT: vsetvli a0, zero, e64, m8, ta, mu
; RV32-NEXT: addi a0, sp, 8
; RV32-NEXT: vlse64.v v8, (a0), zero
; RV32-NEXT: sw a3, 12(sp)
; RV32-NEXT: sw a2, 8(sp)
; RV32-NEXT: addi a0, sp, 8
; RV32-NEXT: vlse64.v v16, (a0), zero
; RV32-NEXT: vmul.vv v8, v8, v16
; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret
;
; RV64-LABEL: vmul_xx_nxv8i64:
; RV64: # %bb.0:
; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu
; RV64-NEXT: vmv.v.x v8, a0
; RV64-NEXT: vmul.vx v8, v8, a1
; RV64-NEXT: ret
%head1 = insertelement <vscale x 8 x i64> poison, i64 %a, i32 0
%splat1 = shufflevector <vscale x 8 x i64> %head1, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
%head2 = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
%splat2 = shufflevector <vscale x 8 x i64> %head2, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
%v = mul <vscale x 8 x i64> %splat1, %splat2
ret <vscale x 8 x i64> %v
}