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Differential D120192 Diff 410095 llvm/test/CodeGen/X86/combine-bswap.ll

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llvm/test/CodeGen/X86/combine-bswap.ll

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%r = or i32 %x_zzz4, %y_321z %r = or i32 %x_zzz4, %y_321z
store i32 %r, i32* %yp, align 4 store i32 %r, i32* %yp, align 4
ret void ret void
} }
define i64 @test_bswap64_shift48_zext(i16 %a0) { define i64 @test_bswap64_shift48_zext(i16 %a0) {
; X86-LABEL: test_bswap64_shift48_zext: ; X86-LABEL: test_bswap64_shift48_zext:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $16, %eax ; X86-NEXT: rolw $8, %ax
; X86-NEXT: bswapl %eax ; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: xorl %edx, %edx ; X86-NEXT: xorl %edx, %edx
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_bswap64_shift48_zext: ; X64-LABEL: test_bswap64_shift48_zext:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax ; X64-NEXT: rolw $8, %di
; X64-NEXT: shlq $48, %rax ; X64-NEXT: movzwl %di, %eax
; X64-NEXT: bswapq %rax
; X64-NEXT: retq ; X64-NEXT: retq
%z = zext i16 %a0 to i64 %z = zext i16 %a0 to i64
%s = shl i64 %z, 48 %s = shl i64 %z, 48
%b = call i64 @llvm.bswap.i64(i64 %s) %b = call i64 @llvm.bswap.i64(i64 %s)
ret i64 %b ret i64 %b
} }
define i64 @test_bswap64_shift48(i64 %a0) { define i64 @test_bswap64_shift48(i64 %a0) {
; X86-LABEL: test_bswap64_shift48: ; X86-LABEL: test_bswap64_shift48:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $16, %eax ; X86-NEXT: rolw $8, %ax
; X86-NEXT: bswapl %eax ; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: xorl %edx, %edx ; X86-NEXT: xorl %edx, %edx
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_bswap64_shift48: ; X64-LABEL: test_bswap64_shift48:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: rolw $8, %di
; X64-NEXT: shlq $48, %rax ; X64-NEXT: movzwl %di, %eax
; X64-NEXT: bswapq %rax
; X64-NEXT: retq ; X64-NEXT: retq
%s = shl i64 %a0, 48 %s = shl i64 %a0, 48
%b = call i64 @llvm.bswap.i64(i64 %s) %b = call i64 @llvm.bswap.i64(i64 %s)
ret i64 %b ret i64 %b
} }
define i32 @test_bswap32_shift17(i32 %a0) { define i32 @test_bswap32_shift17(i32 %a0) {
; X86-LABEL: test_bswap32_shift17: ; X86-LABEL: test_bswap32_shift17:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $17, %eax ; X86-NEXT: addl %eax, %eax
; X86-NEXT: bswapl %eax ; X86-NEXT: rolw $8, %ax
; X86-NEXT: movzwl %ax, %eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_bswap32_shift17: ; X64-LABEL: test_bswap32_shift17:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax ; X64-NEXT: addl %edi, %edi
; X64-NEXT: shll $17, %eax ; X64-NEXT: rolw $8, %di
; X64-NEXT: bswapl %eax ; X64-NEXT: movzwl %di, %eax
; X64-NEXT: retq ; X64-NEXT: retq
%s = shl i32 %a0, 17 %s = shl i32 %a0, 17
%b = call i32 @llvm.bswap.i32(i32 %s) %b = call i32 @llvm.bswap.i32(i32 %s)
ret i32 %b ret i32 %b
} }
; negative test ; negative test (x86 can fold once bswap64 is split to 2 x bswap32)
define i64 @test_bswap64_shift17(i64 %a0) { define i64 @test_bswap64_shift17(i64 %a0) {
; X86-LABEL: test_bswap64_shift17: ; X86-LABEL: test_bswap64_shift17:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shldl $17, %edx, %eax ; X86-NEXT: shldl $17, %ecx, %eax
; X86-NEXT: shll $17, %edx
; X86-NEXT: bswapl %eax ; X86-NEXT: bswapl %eax
; X86-NEXT: bswapl %edx ; X86-NEXT: addl %ecx, %ecx
; X86-NEXT: rolw $8, %cx
; X86-NEXT: movzwl %cx, %edx
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_bswap64_shift17: ; X64-LABEL: test_bswap64_shift17:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: shlq $17, %rax ; X64-NEXT: shlq $17, %rax
; X64-NEXT: bswapq %rax ; X64-NEXT: bswapq %rax
; X64-NEXT: retq ; X64-NEXT: retq
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