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llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
| Show All 9 Lines | |||||
| // in some circumstances may trigger the erratum. | // in some circumstances may trigger the erratum. | ||||
| // It inserts a nop instruction between a sequence of the following 2 classes | // It inserts a nop instruction between a sequence of the following 2 classes | ||||
| // of instructions: | // of instructions: | ||||
| // instr 1: mem-instr (including loads, stores and prefetches). | // instr 1: mem-instr (including loads, stores and prefetches). | ||||
| // instr 2: non-SIMD integer multiply-accumulate writing 64-bit X registers. | // instr 2: non-SIMD integer multiply-accumulate writing 64-bit X registers. | ||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| #include "AArch64.h" | #include "AArch64.h" | ||||
| #include "AArch64Subtarget.h" | |||||
| #include "llvm/ADT/Statistic.h" | #include "llvm/ADT/Statistic.h" | ||||
| #include "llvm/CodeGen/MachineFunction.h" | #include "llvm/CodeGen/MachineFunction.h" | ||||
| #include "llvm/CodeGen/MachineFunctionPass.h" | #include "llvm/CodeGen/MachineFunctionPass.h" | ||||
| #include "llvm/CodeGen/MachineInstr.h" | #include "llvm/CodeGen/MachineInstr.h" | ||||
| #include "llvm/CodeGen/MachineInstrBuilder.h" | #include "llvm/CodeGen/MachineInstrBuilder.h" | ||||
| #include "llvm/CodeGen/MachineRegisterInfo.h" | #include "llvm/CodeGen/MachineRegisterInfo.h" | ||||
| #include "llvm/CodeGen/TargetInstrInfo.h" | #include "llvm/CodeGen/TargetInstrInfo.h" | ||||
| #include "llvm/Support/Debug.h" | #include "llvm/Support/Debug.h" | ||||
| ▲ Show 20 Lines • Show All 85 Lines • ▼ Show 20 Lines | |||||
| INITIALIZE_PASS(AArch64A53Fix835769, "aarch64-fix-cortex-a53-835769-pass", | INITIALIZE_PASS(AArch64A53Fix835769, "aarch64-fix-cortex-a53-835769-pass", | ||||
| "AArch64 fix for A53 erratum 835769", false, false) | "AArch64 fix for A53 erratum 835769", false, false) | ||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| bool | bool | ||||
| AArch64A53Fix835769::runOnMachineFunction(MachineFunction &F) { | AArch64A53Fix835769::runOnMachineFunction(MachineFunction &F) { | ||||
| LLVM_DEBUG(dbgs() << "***** AArch64A53Fix835769 *****\n"); | LLVM_DEBUG(dbgs() << "***** AArch64A53Fix835769 *****\n"); | ||||
| auto &STI = F.getSubtarget<AArch64Subtarget>(); | |||||
| // Fix not requested, skip pass. | |||||
| if (!STI.fixCortexA53_835769()) | |||||
| return false; | |||||
| bool Changed = false; | bool Changed = false; | ||||
| TII = F.getSubtarget().getInstrInfo(); | TII = STI.getInstrInfo(); | ||||
| for (auto &MBB : F) { | for (auto &MBB : F) { | ||||
| Changed |= runOnBasicBlock(MBB); | Changed |= runOnBasicBlock(MBB); | ||||
| } | } | ||||
| return Changed; | return Changed; | ||||
| } | } | ||||
| // Return the block that was fallen through to get to MBB, if any, | // Return the block that was fallen through to get to MBB, if any, | ||||
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