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llvm/test/MC/Disassembler/ARM/sub-sp-imm-thumb2.txt
| # RUN: llvm-mc -triple=thumbv7 -disassemble -show-inst < %s | FileCheck %s | # RUN: llvm-mc -triple=thumbv7 -disassemble -show-inst < %s | FileCheck %s | ||||
| # https://bugs.llvm.org/show_bug.cgi?id=49974 | # https://bugs.llvm.org/show_bug.cgi?id=49974 | ||||
| # Incorrect number of predicate operands were inserted to the | # Incorrect number of predicate operands were inserted to the | ||||
| # disassembled MCInst. | # disassembled MCInst. | ||||
| # CHECK: subw sp, sp, #1148 | # CHECK: subw sp, sp, #1148 | ||||
| # CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm12 | # CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm12 | ||||
| # CHECK-NEXT: <MCOperand Reg:15> | # CHECK-NEXT: <MCOperand Reg:[[SP:[0-9]+]]> | ||||
| # CHECK-NEXT: <MCOperand Reg:15> | # CHECK-NEXT: <MCOperand Reg:[[SP]]> | ||||
| # CHECK-NEXT: <MCOperand Imm:1148> | # CHECK-NEXT: <MCOperand Imm:1148> | ||||
| # CHECK-NEXT: <MCOperand Imm:14> | # CHECK-NEXT: <MCOperand Imm:14> | ||||
| # CHECK-NEXT: <MCOperand Reg:0>> | # CHECK-NEXT: <MCOperand Reg:0>> | ||||
| 0xad 0xf2 0x7c 0x4d | 0xad 0xf2 0x7c 0x4d | ||||
| # CHECK: sub.w sp, sp, #1024 | # CHECK: sub.w sp, sp, #1024 | ||||
| # CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm | # CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm | ||||
| # CHECK-NEXT: <MCOperand Reg:15> | # CHECK-NEXT: <MCOperand Reg:[[SP]]> | ||||
| # CHECK-NEXT: <MCOperand Reg:15> | # CHECK-NEXT: <MCOperand Reg:[[SP]]> | ||||
| # CHECK-NEXT: <MCOperand Imm:1024> | # CHECK-NEXT: <MCOperand Imm:1024> | ||||
| # CHECK-NEXT: <MCOperand Imm:14> | # CHECK-NEXT: <MCOperand Imm:14> | ||||
| # CHECK-NEXT: <MCOperand Reg:0> | # CHECK-NEXT: <MCOperand Reg:0> | ||||
| # CHECK-NEXT: <MCOperand Reg:0>> | # CHECK-NEXT: <MCOperand Reg:0>> | ||||
| 0xad,0xf5,0x80,0x6d | 0xad,0xf5,0x80,0x6d | ||||
| # CHECK: subs.w sp, sp, #1024 | # CHECK: subs.w sp, sp, #1024 | ||||
| # CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm | # CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm | ||||
| # CHECK-NEXT: <MCOperand Reg:15> | # CHECK-NEXT: <MCOperand Reg:[[SP]]> | ||||
| # CHECK-NEXT: <MCOperand Reg:15> | # CHECK-NEXT: <MCOperand Reg:[[SP]]> | ||||
| # CHECK-NEXT: <MCOperand Imm:1024> | # CHECK-NEXT: <MCOperand Imm:1024> | ||||
| # CHECK-NEXT: <MCOperand Imm:14> | # CHECK-NEXT: <MCOperand Imm:14> | ||||
| # CHECK-NEXT: <MCOperand Reg:0> | # CHECK-NEXT: <MCOperand Reg:0> | ||||
| # CHECK-NEXT: <MCOperand Reg:3>> | # CHECK-NEXT: <MCOperand Reg:3>> | ||||
| 0xbd,0xf5,0x80,0x6d | 0xbd,0xf5,0x80,0x6d | ||||