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llvm/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi | FileCheck %s | ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi | FileCheck %s | ||||
; Test that we correctly use registers and align elements when using va_arg | ; Test that we correctly use registers and align elements when using va_arg | ||||
%struct_t = type { double, double, double } | %struct_t = type { double, double, double } | ||||
@static_val = constant %struct_t { double 1.0, double 2.0, double 3.0 } | @static_val = constant %struct_t { double 1.0, double 2.0, double 3.0 } | ||||
declare void @llvm.va_start(i8*) nounwind | declare void @llvm.va_start(i8*) nounwind | ||||
declare void @llvm.va_end(i8*) nounwind | declare void @llvm.va_end(i8*) nounwind | ||||
; CHECK-LABEL: test_byval_8_bytes_alignment: | ; CHECK-LABEL: test_byval_8_bytes_alignment: | ||||
define void @test_byval_8_bytes_alignment(i32 %i, ...) { | define void @test_byval_8_bytes_alignment(i32 %i, ...) { | ||||
entry: | entry: | ||||
; CHECK: sub sp, sp, #12 | ; CHECK: sub sp, sp, #16 | ||||
; CHECK: sub sp, sp, #4 | |||||
; CHECK: add r0, sp, #4 | ; CHECK: add r0, sp, #4 | ||||
; CHECK: stmib sp, {r1, r2, r3} | ; CHECK: stmib sp, {r1, r2, r3} | ||||
%g = alloca i8* | %g = alloca i8* | ||||
%g1 = bitcast i8** %g to i8* | %g1 = bitcast i8** %g to i8* | ||||
call void @llvm.va_start(i8* %g1) | call void @llvm.va_start(i8* %g1) | ||||
; CHECK: add [[REG:(r[0-9]+)|(lr)]], {{(r[0-9]+)|(lr)}}, #7 | ; CHECK: add [[REG:(r[0-9]+)|(lr)]], {{(r[0-9]+)|(lr)}}, #7 | ||||
; CHECK: bic [[REG]], [[REG]], #7 | ; CHECK: bic [[REG]], [[REG]], #7 | ||||
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