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llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp
Show First 20 Lines • Show All 58 Lines • ▼ Show 20 Lines | void FillFinishOpcode() { | ||||
while (Pos < Vec.size()) | while (Pos < Vec.size()) | ||||
EmitByte(ARM::EHABI::UNWIND_OPCODE_FINISH); | EmitByte(ARM::EHABI::UNWIND_OPCODE_FINISH); | ||||
} | } | ||||
}; | }; | ||||
} // end anonymous namespace | } // end anonymous namespace | ||||
void UnwindOpcodeAssembler::EmitRegSave(uint32_t RegSave) { | void UnwindOpcodeAssembler::EmitRegSave(uint32_t RegSave) { | ||||
if (RegSave == 0u) | if (RegSave == 0u) { | ||||
// That's the special case for RA PAC. | |||||
EmitInt8(ARM::EHABI::UNWIND_OPCODE_POP_RA_AUTH_CODE); | |||||
return; | return; | ||||
} | |||||
// One byte opcode to save register r14 and r11-r4 | // One byte opcode to save register r14 and r11-r4 | ||||
if (RegSave & (1u << 4)) { | if (RegSave & (1u << 4)) { | ||||
// The one byte opcode will always save r4, thus we can't use the one byte | // The one byte opcode will always save r4, thus we can't use the one byte | ||||
// opcode when r4 is not in .save directive. | // opcode when r4 is not in .save directive. | ||||
// Compute the consecutive registers from r4 to r11. | // Compute the consecutive registers from r4 to r11. | ||||
uint32_t Mask = RegSave & 0xff0u; | uint32_t Mask = RegSave & 0xff0u; | ||||
▲ Show 20 Lines • Show All 120 Lines • Show Last 20 Lines |