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llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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| Show First 20 Lines • Show All 329 Lines • ▼ Show 20 Lines | if (Subtarget.hasStdExtZfh()) { | ||||
| setOperationAction(ISD::LLRINT, MVT::f16, Legal); | setOperationAction(ISD::LLRINT, MVT::f16, Legal); | ||||
| setOperationAction(ISD::LROUND, MVT::f16, Legal); | setOperationAction(ISD::LROUND, MVT::f16, Legal); | ||||
| setOperationAction(ISD::LLROUND, MVT::f16, Legal); | setOperationAction(ISD::LLROUND, MVT::f16, Legal); | ||||
| for (auto CC : FPCCToExpand) | for (auto CC : FPCCToExpand) | ||||
| setCondCodeAction(CC, MVT::f16, Expand); | setCondCodeAction(CC, MVT::f16, Expand); | ||||
| setOperationAction(ISD::SELECT_CC, MVT::f16, Expand); | setOperationAction(ISD::SELECT_CC, MVT::f16, Expand); | ||||
| setOperationAction(ISD::SELECT, MVT::f16, Custom); | setOperationAction(ISD::SELECT, MVT::f16, Custom); | ||||
| setOperationAction(ISD::BR_CC, MVT::f16, Expand); | setOperationAction(ISD::BR_CC, MVT::f16, Expand); | ||||
| for (auto Op : FPOpToExpand) | |||||
| setOperationAction(Op, MVT::f16, Expand); | |||||
| setOperationAction(ISD::FREM, MVT::f16, Promote); | setOperationAction(ISD::FREM, MVT::f16, Promote); | ||||
| setOperationAction(ISD::FCEIL, MVT::f16, Promote); | setOperationAction(ISD::FCEIL, MVT::f16, Promote); | ||||
| setOperationAction(ISD::FFLOOR, MVT::f16, Promote); | setOperationAction(ISD::FFLOOR, MVT::f16, Promote); | ||||
| setOperationAction(ISD::FNEARBYINT, MVT::f16, Promote); | setOperationAction(ISD::FNEARBYINT, MVT::f16, Promote); | ||||
| setOperationAction(ISD::FRINT, MVT::f16, Promote); | setOperationAction(ISD::FRINT, MVT::f16, Promote); | ||||
| setOperationAction(ISD::FROUND, MVT::f16, Promote); | setOperationAction(ISD::FROUND, MVT::f16, Promote); | ||||
| setOperationAction(ISD::FROUNDEVEN, MVT::f16, Promote); | setOperationAction(ISD::FROUNDEVEN, MVT::f16, Promote); | ||||
| setOperationAction(ISD::FTRUNC, MVT::f16, Promote); | setOperationAction(ISD::FTRUNC, MVT::f16, Promote); | ||||
| setOperationAction(ISD::FPOW, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FPOWI, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FCOS, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FSIN, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FSINCOS, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FEXP, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FEXP2, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FLOG, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FLOG2, MVT::f16, Promote); | |||||
| setOperationAction(ISD::FLOG10, MVT::f16, Promote); | |||||
| // We need to custom promote this. | |||||
| if (Subtarget.is64Bit()) | |||||
| setOperationAction(ISD::FPOWI, MVT::i32, Custom); | |||||
| } | } | ||||
| if (Subtarget.hasStdExtF()) { | if (Subtarget.hasStdExtF()) { | ||||
| setOperationAction(ISD::FMINNUM, MVT::f32, Legal); | setOperationAction(ISD::FMINNUM, MVT::f32, Legal); | ||||
| setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); | setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); | ||||
| setOperationAction(ISD::LRINT, MVT::f32, Legal); | setOperationAction(ISD::LRINT, MVT::f32, Legal); | ||||
| setOperationAction(ISD::LLRINT, MVT::f32, Legal); | setOperationAction(ISD::LLRINT, MVT::f32, Legal); | ||||
| setOperationAction(ISD::LROUND, MVT::f32, Legal); | setOperationAction(ISD::LROUND, MVT::f32, Legal); | ||||
| ▲ Show 20 Lines • Show All 2,308 Lines • ▼ Show 20 Lines | if (isa<ConstantSDNode>(Op.getOperand(0))) { | ||||
| return DAG.getNode(ISD::MUL, DL, VT, VLENB, | return DAG.getNode(ISD::MUL, DL, VT, VLENB, | ||||
| DAG.getConstant(Val / 8, DL, VT)); | DAG.getConstant(Val / 8, DL, VT)); | ||||
| } | } | ||||
| SDValue VScale = DAG.getNode(ISD::SRL, DL, VT, VLENB, | SDValue VScale = DAG.getNode(ISD::SRL, DL, VT, VLENB, | ||||
| DAG.getConstant(3, DL, VT)); | DAG.getConstant(3, DL, VT)); | ||||
| return DAG.getNode(ISD::MUL, DL, VT, VScale, Op.getOperand(0)); | return DAG.getNode(ISD::MUL, DL, VT, VScale, Op.getOperand(0)); | ||||
| } | } | ||||
| case ISD::FPOWI: { | |||||
| // Custom promote f16 powi with illegal i32 integer type on RV64. Once | |||||
| // promoted this will be legalized into a libcall by LegalizeIntegerTypes. | |||||
| if (Op.getValueType() == MVT::f16 && Subtarget.is64Bit() && | |||||
| Op.getOperand(1).getValueType() == MVT::i32) { | |||||
| SDLoc DL(Op); | |||||
| SDValue Op0 = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, Op.getOperand(0)); | |||||
| SDValue Powi = | |||||
| DAG.getNode(ISD::FPOWI, DL, MVT::f32, Op0, Op.getOperand(1)); | |||||
| return DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, Powi, | |||||
| DAG.getIntPtrConstant(0, DL)); | |||||
| } | |||||
| return SDValue(); | |||||
| } | |||||
| case ISD::FP_EXTEND: { | case ISD::FP_EXTEND: { | ||||
| // RVV can only do fp_extend to types double the size as the source. We | // RVV can only do fp_extend to types double the size as the source. We | ||||
| // custom-lower f16->f64 extensions to two hops of ISD::FP_EXTEND, going | // custom-lower f16->f64 extensions to two hops of ISD::FP_EXTEND, going | ||||
| // via f32. | // via f32. | ||||
| SDLoc DL(Op); | SDLoc DL(Op); | ||||
| MVT VT = Op.getSimpleValueType(); | MVT VT = Op.getSimpleValueType(); | ||||
| SDValue Src = Op.getOperand(0); | SDValue Src = Op.getOperand(0); | ||||
| MVT SrcVT = Src.getSimpleValueType(); | MVT SrcVT = Src.getSimpleValueType(); | ||||
| ▲ Show 20 Lines • Show All 7,391 Lines • Show Last 20 Lines | |||||