Differential D109253 Diff 370649 llvm/test/CodeGen/AArch64/sve-insert-element.ll

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	; CHECK-NEXT: st1b { z1.b }, p1, [sp]			; CHECK-NEXT: st1b { z1.b }, p1, [sp]
	; CHECK-NEXT: strb w0, [x8, x9]			; CHECK-NEXT: strb w0, [x8, x9]
	; CHECK-NEXT: ld1b { z0.b }, p1/z, [sp]			; CHECK-NEXT: ld1b { z0.b }, p1/z, [sp]
	; CHECK-NEXT: ld1b { z1.b }, p1/z, [x8, #1, mul vl]			; CHECK-NEXT: ld1b { z1.b }, p1/z, [x8, #1, mul vl]
	; CHECK-NEXT: and z0.b, z0.b, #0x1			; CHECK-NEXT: and z0.b, z0.b, #0x1
	; CHECK-NEXT: and z1.b, z1.b, #0x1			; CHECK-NEXT: and z1.b, z1.b, #0x1
	; CHECK-NEXT: cmpne p0.b, p1/z, z0.b, #0			; CHECK-NEXT: cmpne p0.b, p1/z, z0.b, #0
	; CHECK-NEXT: cmpne p1.b, p1/z, z1.b, #0			; CHECK-NEXT: cmpne p1.b, p1/z, z1.b, #0
	; CHECK-NEXT: addvl sp, sp, #2
	; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload			; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
				; CHECK-NEXT: .cfi_adjust_cfa_offset -16
				; CHECK-NEXT: addvl sp, sp, #2
	; CHECK-NEXT: ret			; CHECK-NEXT: ret
	%res = insertelement <vscale x 32 x i1> %val, i1 %elt, i32 %idx			%res = insertelement <vscale x 32 x i1> %val, i1 %elt, i32 %idx
	ret <vscale x 32 x i1> %res			ret <vscale x 32 x i1> %res
	}			}