Page MenuHomePhabricator
Differential D109253 Diff 370649 llvm/test/CodeGen/AArch64/arm64-fp128.ll

Changeset View

Standalone View

View Options

llvm/test/CodeGen/AArch64/arm64-fp128.ll

Show First 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
; CHECK-NEXT: bl __fixtfsi ; CHECK-NEXT: bl __fixtfsi
; CHECK-NEXT: adrp x8, var32 ; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: str w0, [x8, :lo12:var32] ; CHECK-NEXT: str w0, [x8, :lo12:var32]
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-NEXT: bl __fixtfdi ; CHECK-NEXT: bl __fixtfdi
; CHECK-NEXT: adrp x8, var64 ; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: str x0, [x8, :lo12:var64] ; CHECK-NEXT: str x0, [x8, :lo12:var64]
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload ; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset 16
; CHECK-NEXT: add sp, sp, #32 ; CHECK-NEXT: add sp, sp, #32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%val = load fp128, fp128* @lhs, align 16 %val = load fp128, fp128* @lhs, align 16
%val32 = fptosi fp128 %val to i32 %val32 = fptosi fp128 %val to i32
store i32 %val32, i32* @var32 store i32 %val32, i32* @var32
%val64 = fptosi fp128 %val to i64 %val64 = fptosi fp128 %val to i64
Show All 15 Lines
; CHECK-NEXT: bl __fixunstfsi ; CHECK-NEXT: bl __fixunstfsi
; CHECK-NEXT: adrp x8, var32 ; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: str w0, [x8, :lo12:var32] ; CHECK-NEXT: str w0, [x8, :lo12:var32]
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-NEXT: bl __fixunstfdi ; CHECK-NEXT: bl __fixunstfdi
; CHECK-NEXT: adrp x8, var64 ; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: str x0, [x8, :lo12:var64] ; CHECK-NEXT: str x0, [x8, :lo12:var64]
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload ; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset 16
; CHECK-NEXT: add sp, sp, #32 ; CHECK-NEXT: add sp, sp, #32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%val = load fp128, fp128* @lhs, align 16 %val = load fp128, fp128* @lhs, align 16
%val32 = fptoui fp128 %val to i32 %val32 = fptoui fp128 %val to i32
store i32 %val32, i32* @var32 store i32 %val32, i32* @var32
%val64 = fptoui fp128 %val to i64 %val64 = fptoui fp128 %val to i64
Show All 14 Lines
; CHECK-NEXT: bl __floatsitf ; CHECK-NEXT: bl __floatsitf
; CHECK-NEXT: adrp x19, lhs ; CHECK-NEXT: adrp x19, lhs
; CHECK-NEXT: str q0, [x19, :lo12:lhs] ; CHECK-NEXT: str q0, [x19, :lo12:lhs]
; CHECK-NEXT: adrp x8, var64 ; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: ldr x0, [x8, :lo12:var64] ; CHECK-NEXT: ldr x0, [x8, :lo12:var64]
; CHECK-NEXT: bl __floatditf ; CHECK-NEXT: bl __floatditf
; CHECK-NEXT: str q0, [x19, :lo12:lhs] ; CHECK-NEXT: str q0, [x19, :lo12:lhs]
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload ; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset -16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%src32 = load i32, i32* @var32 %src32 = load i32, i32* @var32
%val32 = sitofp i32 %src32 to fp128 %val32 = sitofp i32 %src32 to fp128
store volatile fp128 %val32, fp128* @lhs store volatile fp128 %val32, fp128* @lhs
%src64 = load i64, i64* @var64 %src64 = load i64, i64* @var64
%val64 = sitofp i64 %src64 to fp128 %val64 = sitofp i64 %src64 to fp128
Show All 14 Lines
; CHECK-NEXT: bl __floatunsitf ; CHECK-NEXT: bl __floatunsitf
; CHECK-NEXT: adrp x19, lhs ; CHECK-NEXT: adrp x19, lhs
; CHECK-NEXT: str q0, [x19, :lo12:lhs] ; CHECK-NEXT: str q0, [x19, :lo12:lhs]
; CHECK-NEXT: adrp x8, var64 ; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: ldr x0, [x8, :lo12:var64] ; CHECK-NEXT: ldr x0, [x8, :lo12:var64]
; CHECK-NEXT: bl __floatunditf ; CHECK-NEXT: bl __floatunditf
; CHECK-NEXT: str q0, [x19, :lo12:lhs] ; CHECK-NEXT: str q0, [x19, :lo12:lhs]
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload ; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset -16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%src32 = load i32, i32* @var32 %src32 = load i32, i32* @var32
%val32 = uitofp i32 %src32 to fp128 %val32 = uitofp i32 %src32 to fp128
store volatile fp128 %val32, fp128* @lhs store volatile fp128 %val32, fp128* @lhs
%src64 = load i64, i64* @var64 %src64 = load i64, i64* @var64
%val64 = uitofp i64 %src64 to fp128 %val64 = uitofp i64 %src64 to fp128
Show All 11 Lines
; CHECK-NEXT: adrp x8, lhs ; CHECK-NEXT: adrp x8, lhs
; CHECK-NEXT: ldr q0, [x8, :lo12:lhs] ; CHECK-NEXT: ldr q0, [x8, :lo12:lhs]
; CHECK-NEXT: adrp x8, rhs ; CHECK-NEXT: adrp x8, rhs
; CHECK-NEXT: ldr q1, [x8, :lo12:rhs] ; CHECK-NEXT: ldr q1, [x8, :lo12:rhs]
; CHECK-NEXT: bl __letf2 ; CHECK-NEXT: bl __letf2
; CHECK-NEXT: cmp w0, #0 ; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, le ; CHECK-NEXT: cset w0, le
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset -16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%lhs = load fp128, fp128* @lhs, align 16 %lhs = load fp128, fp128* @lhs, align 16
%rhs = load fp128, fp128* @rhs, align 16 %rhs = load fp128, fp128* @rhs, align 16
; Technically, everything after the call to __letf2 is redundant, but we'll let ; Technically, everything after the call to __letf2 is redundant, but we'll let
; LLVM have its fun for now. ; LLVM have its fun for now.
%val = fcmp ole fp128 %lhs, %rhs %val = fcmp ole fp128 %lhs, %rhs
Show All 10 Lines
; CHECK-NEXT: adrp x8, lhs ; CHECK-NEXT: adrp x8, lhs
; CHECK-NEXT: ldr q0, [x8, :lo12:lhs] ; CHECK-NEXT: ldr q0, [x8, :lo12:lhs]
; CHECK-NEXT: adrp x8, rhs ; CHECK-NEXT: adrp x8, rhs
; CHECK-NEXT: ldr q1, [x8, :lo12:rhs] ; CHECK-NEXT: ldr q1, [x8, :lo12:rhs]
; CHECK-NEXT: bl __letf2 ; CHECK-NEXT: bl __letf2
; CHECK-NEXT: cmp w0, #0 ; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, gt ; CHECK-NEXT: cset w0, gt
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset -16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%lhs = load fp128, fp128* @lhs, align 16 %lhs = load fp128, fp128* @lhs, align 16
%rhs = load fp128, fp128* @rhs, align 16 %rhs = load fp128, fp128* @rhs, align 16
%val = fcmp ugt fp128 %lhs, %rhs %val = fcmp ugt fp128 %lhs, %rhs
ret i1 %val ret i1 %val
Show All 16 Lines
; CHECK-NEXT: cmp w0, #0 ; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w19, eq ; CHECK-NEXT: cset w19, eq
; CHECK-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload ; CHECK-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload
; CHECK-NEXT: bl __unordtf2 ; CHECK-NEXT: bl __unordtf2
; CHECK-NEXT: cmp w0, #0 ; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w8, ne ; CHECK-NEXT: cset w8, ne
; CHECK-NEXT: orr w0, w8, w19 ; CHECK-NEXT: orr w0, w8, w19
; CHECK-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload ; CHECK-NEXT: ldp x30, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset 32
; CHECK-NEXT: add sp, sp, #48 ; CHECK-NEXT: add sp, sp, #48
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%lhs = load fp128, fp128* @lhs, align 16 %lhs = load fp128, fp128* @lhs, align 16
%rhs = load fp128, fp128* @rhs, align 16 %rhs = load fp128, fp128* @rhs, align 16
%val = fcmp ueq fp128 %lhs, %rhs %val = fcmp ueq fp128 %lhs, %rhs
Show All 12 Lines
; CHECK-NEXT: adrp x8, rhs ; CHECK-NEXT: adrp x8, rhs
; CHECK-NEXT: ldr q1, [x8, :lo12:rhs] ; CHECK-NEXT: ldr q1, [x8, :lo12:rhs]
; CHECK-NEXT: bl __lttf2 ; CHECK-NEXT: bl __lttf2
; CHECK-NEXT: cmp w0, #0 ; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: b.ge .LBB11_2 ; CHECK-NEXT: b.ge .LBB11_2
; CHECK-NEXT: // %bb.1: // %iftrue ; CHECK-NEXT: // %bb.1: // %iftrue
; CHECK-NEXT: mov w0, #42 ; CHECK-NEXT: mov w0, #42
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset -16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
; CHECK-NEXT: .LBB11_2: // %iffalse ; CHECK-NEXT: .LBB11_2: // %iffalse
; CHECK-NEXT: mov w0, #29 ; CHECK-NEXT: mov w0, #29
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset -16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%lhs = load fp128, fp128* @lhs, align 16 %lhs = load fp128, fp128* @lhs, align 16
%rhs = load fp128, fp128* @rhs, align 16 %rhs = load fp128, fp128* @rhs, align 16
; olt == !uge, which LLVM optimizes this to. ; olt == !uge, which LLVM optimizes this to.
%cond = fcmp olt fp128 %lhs, %rhs %cond = fcmp olt fp128 %lhs, %rhs
br i1 %cond, label %iftrue, label %iffalse br i1 %cond, label %iftrue, label %iffalse
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; CHECK-NEXT: bl __trunctfsf2 ; CHECK-NEXT: bl __trunctfsf2
; CHECK-NEXT: adrp x8, varfloat ; CHECK-NEXT: adrp x8, varfloat
; CHECK-NEXT: str s0, [x8, :lo12:varfloat] ; CHECK-NEXT: str s0, [x8, :lo12:varfloat]
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-NEXT: bl __trunctfdf2 ; CHECK-NEXT: bl __trunctfdf2
; CHECK-NEXT: adrp x8, vardouble ; CHECK-NEXT: adrp x8, vardouble
; CHECK-NEXT: str d0, [x8, :lo12:vardouble] ; CHECK-NEXT: str d0, [x8, :lo12:vardouble]
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload ; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset 16
; CHECK-NEXT: add sp, sp, #32 ; CHECK-NEXT: add sp, sp, #32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%val = load fp128, fp128* @lhs, align 16 %val = load fp128, fp128* @lhs, align 16
%half = fptrunc fp128 %val to half %half = fptrunc fp128 %val to half
store half %half, half* @varhalf, align 2 store half %half, half* @varhalf, align 2
Show All 22 Lines
; CHECK-NEXT: ldr s0, [x8, :lo12:varfloat] ; CHECK-NEXT: ldr s0, [x8, :lo12:varfloat]
; CHECK-NEXT: bl __extendsftf2 ; CHECK-NEXT: bl __extendsftf2
; CHECK-NEXT: str q0, [x19, :lo12:lhs] ; CHECK-NEXT: str q0, [x19, :lo12:lhs]
; CHECK-NEXT: adrp x8, vardouble ; CHECK-NEXT: adrp x8, vardouble
; CHECK-NEXT: ldr d0, [x8, :lo12:vardouble] ; CHECK-NEXT: ldr d0, [x8, :lo12:vardouble]
; CHECK-NEXT: bl __extenddftf2 ; CHECK-NEXT: bl __extenddftf2
; CHECK-NEXT: str q0, [x19, :lo12:lhs] ; CHECK-NEXT: str q0, [x19, :lo12:lhs]
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload ; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: .cfi_adjust_cfa_offset -16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%val = load fp128, fp128* @lhs, align 16 %val = load fp128, fp128* @lhs, align 16
%half = load half, half* @varhalf %half = load half, half* @varhalf
%fromhalf = fpext half %half to fp128 %fromhalf = fpext half %half to fp128
store volatile fp128 %fromhalf, fp128* @lhs, align 16 store volatile fp128 %fromhalf, fp128* @lhs, align 16
Show All 28 Lines