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Differential D108598 Diff 368421 llvm/test/MC/Disassembler/ARC/ldst.txt

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	# CHECK: st.aw %r6, [%r2,64]			# CHECK: st.aw %r6, [%r2,64]
	0x40 0x1A 0x88 0x01			0x40 0x1A 0x88 0x01

	# CHECK: ldb.x.di.aw %r0, [%r8,8]			# CHECK: ldb.x.di.aw %r0, [%r8,8]
	0x08 0x10 0xC0 0x1A			0x08 0x10 0xC0 0x1A

	# CHECK: stb.di.ab %r0, [%r9,64]			# CHECK: stb.di.ab %r0, [%r9,64]
	0x40 0x19 0x32 0x10			0x40 0x19 0x32 0x10

				# LR instructions with a U6 immediate bit pattern
				# ([33] maps to the [%count0] auxilary register)

				# CHECK: lr %r0, [33]
				0x6a 0x20 0x40 0x08

				# CHECK: lr %r7, [33]
				0x6a 0x27 0x40 0x08

				# CHECK: lr %r15, [33]
				0x6a 0x27 0x40 0x18

				# CHECK: lr %r22, [33]
				0x6a 0x26 0x40 0x28

				# LR instructions with an S12 immediate bit pattern

				# CHECK: lr %r0, [33]
				0xaa 0x20 0x40 0x08

				# The following don't necessarily map to real auxilary registers, but
				# the different range of numbers helps exercise the S12 decoder.

				# CHECK: lr %r0, [-33]
				0xaa 0x20 0x60 0x08

				# CHECK: lr %r0, [97]
				0xaa 0x20 0x41 0x08

				# CHECK: lr %r0, [-97]
				0xaa 0x20 0x61 0x08