Differential D106033 Diff 362226 clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
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clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
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| // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* | // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* | ||||
| // CHECK1-NEXT: store float [[TMP7]], float* [[CONV7]], align 4 | // CHECK1-NEXT: store float [[TMP7]], float* [[CONV7]], align 4 | ||||
| // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 | // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 | ||||
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) | // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) | ||||
| // CHECK1-NEXT: ret void | // CHECK1-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | ||||
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { | // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] { | ||||
| // CHECK1-NEXT: entry: | // CHECK1-NEXT: entry: | ||||
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 | // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 | // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8 | ||||
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| // CHECK1-NEXT: br label [[COND_END]] | // CHECK1-NEXT: br label [[COND_END]] | ||||
| // CHECK1: cond.end: | // CHECK1: cond.end: | ||||
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] | // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] | ||||
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 | // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK1: omp.inner.for.cond: | // CHECK1: omp.inner.for.cond: | ||||
| // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 | // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] | // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] | ||||
| // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] | // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK1: omp.inner.for.body: | // CHECK1: omp.inner.for.body: | ||||
| // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 | // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 | ||||
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 | // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !4 | // CHECK1-NEXT: store double 1.000000e+00, double* [[G5]], align 8, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP4]], align 8, !llvm.access.group !4 | // CHECK1-NEXT: [[TMP9:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP18]], align 8, !llvm.access.group !4 | // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP9]], align 8, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !4 | // CHECK1-NEXT: store i32 3, i32* [[SVAR8]], align 4, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !4 | // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR9]], align 4, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 | // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 | ||||
| // CHECK1-NEXT: store double* [[G2]], double** [[TMP19]], align 8, !llvm.access.group !4 | // CHECK1-NEXT: store double* [[G5]], double** [[TMP10]], align 8, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 | // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 | ||||
| // CHECK1-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP4]], align 8, !llvm.access.group !4 | // CHECK1-NEXT: [[TMP12:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: store double* [[TMP21]], double** [[TMP20]], align 8, !llvm.access.group !4 | // CHECK1-NEXT: store double* [[TMP12]], double** [[TMP11]], align 8, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 | // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 | ||||
| // CHECK1-NEXT: store i32* [[SVAR5]], i32** [[TMP22]], align 8, !llvm.access.group !4 | // CHECK1-NEXT: store i32* [[SVAR8]], i32** [[TMP13]], align 8, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 | // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 | ||||
| // CHECK1-NEXT: store float* [[SFVAR6]], float** [[TMP23]], align 8, !llvm.access.group !4 | // CHECK1-NEXT: store float* [[SFVAR9]], float** [[TMP14]], align 8, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 | // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 | ||||
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK1: omp.body.continue: | // CHECK1: omp.body.continue: | ||||
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK1: omp.inner.for.inc: | // CHECK1: omp.inner.for.inc: | ||||
| // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1 | // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], 1 | ||||
| // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | ||||
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] | // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] | ||||
| // CHECK1: omp.inner.for.end: | // CHECK1: omp.inner.for.end: | ||||
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK1: omp.loop.exit: | // CHECK1: omp.loop.exit: | ||||
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) | // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) | ||||
| // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 | // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 | ||||
| // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] | // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] | ||||
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| // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* | // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float* | ||||
| // CHECK2-NEXT: store float [[TMP7]], float* [[CONV7]], align 4 | // CHECK2-NEXT: store float [[TMP7]], float* [[CONV7]], align 4 | ||||
| // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 | // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8 | ||||
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) | // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) | ||||
| // CHECK2-NEXT: ret void | // CHECK2-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. | // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. | ||||
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { | // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] { | ||||
| // CHECK2-NEXT: entry: | // CHECK2-NEXT: entry: | ||||
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 | // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 | // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8 | ||||
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| // CHECK2-NEXT: br label [[COND_END]] | // CHECK2-NEXT: br label [[COND_END]] | ||||
| // CHECK2: cond.end: | // CHECK2: cond.end: | ||||
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] | // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] | ||||
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 | // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK2: omp.inner.for.cond: | // CHECK2: omp.inner.for.cond: | ||||
| // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 | // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] | // CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] | ||||
| // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] | // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK2: omp.inner.for.body: | // CHECK2: omp.inner.for.body: | ||||
| // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 | // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 | ||||
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 | // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !4 | // CHECK2-NEXT: store double 1.000000e+00, double* [[G5]], align 8, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP4]], align 8, !llvm.access.group !4 | // CHECK2-NEXT: [[TMP9:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP18]], align 8, !llvm.access.group !4 | // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP9]], align 8, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !4 | // CHECK2-NEXT: store i32 3, i32* [[SVAR8]], align 4, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !4 | // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR9]], align 4, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 | // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 | ||||
| // CHECK2-NEXT: store double* [[G2]], double** [[TMP19]], align 8, !llvm.access.group !4 | // CHECK2-NEXT: store double* [[G5]], double** [[TMP10]], align 8, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 | // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 | ||||
| // CHECK2-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP4]], align 8, !llvm.access.group !4 | // CHECK2-NEXT: [[TMP12:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: store double* [[TMP21]], double** [[TMP20]], align 8, !llvm.access.group !4 | // CHECK2-NEXT: store double* [[TMP12]], double** [[TMP11]], align 8, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 | // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 | ||||
| // CHECK2-NEXT: store i32* [[SVAR5]], i32** [[TMP22]], align 8, !llvm.access.group !4 | // CHECK2-NEXT: store i32* [[SVAR8]], i32** [[TMP13]], align 8, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 | // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 | ||||
| // CHECK2-NEXT: store float* [[SFVAR6]], float** [[TMP23]], align 8, !llvm.access.group !4 | // CHECK2-NEXT: store float* [[SFVAR9]], float** [[TMP14]], align 8, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 | // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !4 | ||||
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK2: omp.body.continue: | // CHECK2: omp.body.continue: | ||||
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK2: omp.inner.for.inc: | // CHECK2: omp.inner.for.inc: | ||||
| // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1 | // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], 1 | ||||
| // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | // CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4 | ||||
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] | // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] | ||||
| // CHECK2: omp.inner.for.end: | // CHECK2: omp.inner.for.end: | ||||
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK2: omp.loop.exit: | // CHECK2: omp.loop.exit: | ||||
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) | // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) | ||||
| // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 | // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 | ||||
| // CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] | // CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] | ||||
| ▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines | |||||
| // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* | // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* | ||||
| // CHECK3-NEXT: store float [[TMP5]], float* [[CONV1]], align 4 | // CHECK3-NEXT: store float [[TMP5]], float* [[CONV1]], align 4 | ||||
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 | // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 | ||||
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) | // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) | ||||
| // CHECK3-NEXT: ret void | // CHECK3-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | ||||
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { | // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] { | ||||
| // CHECK3-NEXT: entry: | // CHECK3-NEXT: entry: | ||||
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 | // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 | ||||
| // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 | // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 | ||||
| // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 | // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4 | ||||
| Show All 39 Lines | |||||
| // CHECK3-NEXT: br label [[COND_END]] | // CHECK3-NEXT: br label [[COND_END]] | ||||
| // CHECK3: cond.end: | // CHECK3: cond.end: | ||||
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] | // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] | ||||
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 | // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK3: omp.inner.for.cond: | // CHECK3: omp.inner.for.cond: | ||||
| // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] | // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] | ||||
| // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] | // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK3: omp.inner.for.body: | // CHECK3: omp.inner.for.body: | ||||
| // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 | // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 | ||||
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !5 | // CHECK3-NEXT: store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP18]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP11]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: store i32 3, i32* [[SVAR3]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR4]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 | // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 | ||||
| // CHECK3-NEXT: store double* [[G]], double** [[TMP19]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store double* [[G2]], double** [[TMP12]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 | // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 | ||||
| // CHECK3-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: store double* [[TMP21]], double** [[TMP20]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store double* [[TMP14]], double** [[TMP13]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 | // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 | ||||
| // CHECK3-NEXT: store i32* [[SVAR3]], i32** [[TMP22]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store i32* [[SVAR5]], i32** [[TMP15]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 | // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 | ||||
| // CHECK3-NEXT: store float* [[SFVAR4]], float** [[TMP23]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store float* [[SFVAR6]], float** [[TMP16]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 | // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 | ||||
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK3: omp.body.continue: | // CHECK3: omp.body.continue: | ||||
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK3: omp.inner.for.inc: | // CHECK3: omp.inner.for.inc: | ||||
| // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP24]], 1 | // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 | ||||
| // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] | // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] | ||||
| // CHECK3: omp.inner.for.end: | // CHECK3: omp.inner.for.end: | ||||
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK3: omp.loop.exit: | // CHECK3: omp.loop.exit: | ||||
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) | // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) | ||||
| // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 | // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 | ||||
| // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] | // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] | ||||
| ▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines | |||||
| // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* | // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float* | ||||
| // CHECK4-NEXT: store float [[TMP5]], float* [[CONV1]], align 4 | // CHECK4-NEXT: store float [[TMP5]], float* [[CONV1]], align 4 | ||||
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 | // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4 | ||||
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) | // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP0]], double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) | ||||
| // CHECK4-NEXT: ret void | // CHECK4-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. | // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. | ||||
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { | // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR3:[0-9]+]] { | ||||
| // CHECK4-NEXT: entry: | // CHECK4-NEXT: entry: | ||||
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 | // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4 | ||||
| // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 | // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4 | ||||
| // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 | // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4 | ||||
| Show All 39 Lines | |||||
| // CHECK4-NEXT: br label [[COND_END]] | // CHECK4-NEXT: br label [[COND_END]] | ||||
| // CHECK4: cond.end: | // CHECK4: cond.end: | ||||
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] | // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] | ||||
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 | // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK4: omp.inner.for.cond: | // CHECK4: omp.inner.for.cond: | ||||
| // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] | // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] | ||||
| // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] | // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK4: omp.inner.for.body: | // CHECK4: omp.inner.for.body: | ||||
| // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 | // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 | ||||
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: store double 1.000000e+00, double* [[G]], align 8, !llvm.access.group !5 | // CHECK4-NEXT: store double 1.000000e+00, double* [[G2]], align 8, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP18]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP11]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: store i32 3, i32* [[SVAR3]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR4]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 | // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 | ||||
| // CHECK4-NEXT: store double* [[G]], double** [[TMP19]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store double* [[G2]], double** [[TMP12]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 | // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 | ||||
| // CHECK4-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP2]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: store double* [[TMP21]], double** [[TMP20]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store double* [[TMP14]], double** [[TMP13]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 | // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 | ||||
| // CHECK4-NEXT: store i32* [[SVAR3]], i32** [[TMP22]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store i32* [[SVAR5]], i32** [[TMP15]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 | // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 | ||||
| // CHECK4-NEXT: store float* [[SFVAR4]], float** [[TMP23]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store float* [[SFVAR6]], float** [[TMP16]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 | // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !5 | ||||
| // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK4: omp.body.continue: | // CHECK4: omp.body.continue: | ||||
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK4: omp.inner.for.inc: | // CHECK4: omp.inner.for.inc: | ||||
| // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP24]], 1 | // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 | ||||
| // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] | // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] | ||||
| // CHECK4: omp.inner.for.end: | // CHECK4: omp.inner.for.end: | ||||
| // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK4: omp.loop.exit: | // CHECK4: omp.loop.exit: | ||||
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) | // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) | ||||
| // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| // CHECK4-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 | // CHECK4-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 | ||||
| // CHECK4-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] | // CHECK4-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] | ||||
| ▲ Show 20 Lines • Show All 260 Lines • ▼ Show 20 Lines | |||||
| // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* | // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* | ||||
| // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4 | // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4 | ||||
| // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 | // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 | ||||
| // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]]) | // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]]) | ||||
| // CHECK9-NEXT: ret void | // CHECK9-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | ||||
| // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR4:[0-9]+]] { | // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] { | ||||
| // CHECK9-NEXT: entry: | // CHECK9-NEXT: entry: | ||||
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 | // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 | ||||
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 | // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 | ||||
| // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 | // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 | ||||
| // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| ▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines | |||||
| // CHECK9-NEXT: br label [[COND_END]] | // CHECK9-NEXT: br label [[COND_END]] | ||||
| // CHECK9: cond.end: | // CHECK9: cond.end: | ||||
| // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | ||||
| // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK9: omp.inner.for.cond: | // CHECK9: omp.inner.for.cond: | ||||
| // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] | // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] | ||||
| // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK9: omp.inner.for.cond.cleanup: | // CHECK9: omp.inner.for.cond.cleanup: | ||||
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK9: omp.inner.for.body: | // CHECK9: omp.inner.for.body: | ||||
| // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 | // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 | ||||
| // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 | // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 | ||||
| // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] | // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] | ||||
| // CHECK9-NEXT: store i32 [[TMP20]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 8, !llvm.access.group !5 | // CHECK9-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP23]] to i64 | // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP15]] to i64 | ||||
| // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM6]] | // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] | ||||
| // CHECK9-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* | // CHECK9-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* | ||||
| // CHECK9-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP22]] to i8* | // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* | ||||
| // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false), !llvm.access.group !5 | // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group !5 | ||||
| // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK9: omp.body.continue: | // CHECK9: omp.body.continue: | ||||
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK9: omp.inner.for.inc: | // CHECK9: omp.inner.for.inc: | ||||
| // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP26]], 1 | // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP18]], 1 | ||||
| // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] | // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] | ||||
| // CHECK9: omp.inner.for.end: | // CHECK9: omp.inner.for.end: | ||||
| // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK9: omp.loop.exit: | // CHECK9: omp.loop.exit: | ||||
| // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 | // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 | ||||
| // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | ||||
| // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | ||||
| // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| Show All 31 Lines | |||||
| // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 | // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 | ||||
| // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* | // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* | ||||
| // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* | // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* | ||||
| // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) | // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) | ||||
| // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR8]], align 4 | // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR8]], align 4 | ||||
| // CHECK9-NEXT: store i32 [[TMP35]], i32* [[CONV1]], align 8 | // CHECK9-NEXT: store i32 [[TMP35]], i32* [[CONV1]], align 8 | ||||
| // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | ||||
| // CHECK9: .omp.lastprivate.done: | // CHECK9: .omp.lastprivate.done: | ||||
| // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] | // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]] | ||||
| // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 | // CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 | ||||
| // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2 | // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 | ||||
| // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | ||||
| // CHECK9: arraydestroy.body: | // CHECK9: arraydestroy.body: | ||||
| // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | ||||
| // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 | // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 | ||||
| // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | ||||
| // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] | // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] | ||||
| // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] | // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] | ||||
| // CHECK9: arraydestroy.done12: | // CHECK9: arraydestroy.done16: | ||||
| // CHECK9-NEXT: ret void | // CHECK9-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | ||||
| // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | ||||
| // CHECK9-NEXT: entry: | // CHECK9-NEXT: entry: | ||||
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 | // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 | ||||
| // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 | // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 | ||||
| ▲ Show 20 Lines • Show All 171 Lines • ▼ Show 20 Lines | |||||
| // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 | // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 | ||||
| // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 | // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 | ||||
| // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 | // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 | ||||
| // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) | // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) | ||||
| // CHECK9-NEXT: ret void | // CHECK9-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | ||||
| // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR4]] { | // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] { | ||||
| // CHECK9-NEXT: entry: | // CHECK9-NEXT: entry: | ||||
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 | // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 | ||||
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 | // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 | ||||
| // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 | // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 | ||||
| // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 | // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 | ||||
| ▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines | |||||
| // CHECK9-NEXT: br label [[COND_END]] | // CHECK9-NEXT: br label [[COND_END]] | ||||
| // CHECK9: cond.end: | // CHECK9: cond.end: | ||||
| // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | ||||
| // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK9: omp.inner.for.cond: | // CHECK9: omp.inner.for.cond: | ||||
| // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] | // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] | ||||
| // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK9: omp.inner.for.cond.cleanup: | // CHECK9: omp.inner.for.cond.cleanup: | ||||
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK9: omp.inner.for.body: | // CHECK9: omp.inner.for.body: | ||||
| // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 | // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 | ||||
| // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 | // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 | ||||
| // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] | // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] | ||||
| // CHECK9-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[TMP20:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8, !llvm.access.group !11 | // CHECK9-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP21]] to i64 | // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 | ||||
| // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] | // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] | ||||
| // CHECK9-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* | // CHECK9-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* | ||||
| // CHECK9-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[TMP20]] to i8* | // CHECK9-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* | ||||
| // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i64 4, i1 false), !llvm.access.group !11 | // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group !11 | ||||
| // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK9: omp.body.continue: | // CHECK9: omp.body.continue: | ||||
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK9: omp.inner.for.inc: | // CHECK9: omp.inner.for.inc: | ||||
| // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], 1 | // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 | ||||
| // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | ||||
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] | // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] | ||||
| // CHECK9: omp.inner.for.end: | // CHECK9: omp.inner.for.end: | ||||
| // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK9: omp.loop.exit: | // CHECK9: omp.loop.exit: | ||||
| // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 | // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 | ||||
| // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | ||||
| // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | ||||
| // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| Show All 29 Lines | |||||
| // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] | // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] | ||||
| // CHECK9: omp.arraycpy.done12: | // CHECK9: omp.arraycpy.done12: | ||||
| // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 | // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 | ||||
| // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* | // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* | ||||
| // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* | // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* | ||||
| // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) | // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) | ||||
| // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | ||||
| // CHECK9: .omp.lastprivate.done: | // CHECK9: .omp.lastprivate.done: | ||||
| // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] | // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] | ||||
| // CHECK9-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 | // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 | ||||
| // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 | // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 | ||||
| // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | ||||
| // CHECK9: arraydestroy.body: | // CHECK9: arraydestroy.body: | ||||
| // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | ||||
| // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 | // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 | ||||
| // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | ||||
| // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] | // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] | ||||
| // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] | // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] | ||||
| // CHECK9: arraydestroy.done11: | // CHECK9: arraydestroy.done14: | ||||
| // CHECK9-NEXT: ret void | // CHECK9-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | ||||
| // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | ||||
| // CHECK9-NEXT: entry: | // CHECK9-NEXT: entry: | ||||
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 | // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 | ||||
| // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 | // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 | ||||
| ▲ Show 20 Lines • Show All 205 Lines • ▼ Show 20 Lines | |||||
| // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* | // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32* | ||||
| // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4 | // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4 | ||||
| // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 | // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8 | ||||
| // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]]) | // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]]) | ||||
| // CHECK10-NEXT: ret void | // CHECK10-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. | // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. | ||||
| // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR4:[0-9]+]] { | // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] { | ||||
| // CHECK10-NEXT: entry: | // CHECK10-NEXT: entry: | ||||
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 | // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 | ||||
| // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 | // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 | ||||
| // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 | // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 | ||||
| // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| ▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines | |||||
| // CHECK10-NEXT: br label [[COND_END]] | // CHECK10-NEXT: br label [[COND_END]] | ||||
| // CHECK10: cond.end: | // CHECK10: cond.end: | ||||
| // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | ||||
| // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK10: omp.inner.for.cond: | // CHECK10: omp.inner.for.cond: | ||||
| // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] | // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] | ||||
| // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK10: omp.inner.for.cond.cleanup: | // CHECK10: omp.inner.for.cond.cleanup: | ||||
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK10: omp.inner.for.body: | // CHECK10: omp.inner.for.body: | ||||
| // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 | // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 | ||||
| // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 | // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 | ||||
| // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] | // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]] | ||||
| // CHECK10-NEXT: store i32 [[TMP20]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 8, !llvm.access.group !5 | // CHECK10-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP23]] to i64 | // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP15]] to i64 | ||||
| // CHECK10-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM6]] | // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]] | ||||
| // CHECK10-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8* | // CHECK10-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8* | ||||
| // CHECK10-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP22]] to i8* | // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* | ||||
| // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 4, i1 false), !llvm.access.group !5 | // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group !5 | ||||
| // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK10: omp.body.continue: | // CHECK10: omp.body.continue: | ||||
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK10: omp.inner.for.inc: | // CHECK10: omp.inner.for.inc: | ||||
| // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP26]], 1 | // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP18]], 1 | ||||
| // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5 | ||||
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] | // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] | ||||
| // CHECK10: omp.inner.for.end: | // CHECK10: omp.inner.for.end: | ||||
| // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK10: omp.loop.exit: | // CHECK10: omp.loop.exit: | ||||
| // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 | // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 | ||||
| // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | ||||
| // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | ||||
| // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| Show All 31 Lines | |||||
| // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 | // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8 | ||||
| // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* | // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* | ||||
| // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* | // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* | ||||
| // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) | // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) | ||||
| // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR8]], align 4 | // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR8]], align 4 | ||||
| // CHECK10-NEXT: store i32 [[TMP35]], i32* [[CONV1]], align 8 | // CHECK10-NEXT: store i32 [[TMP35]], i32* [[CONV1]], align 8 | ||||
| // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | ||||
| // CHECK10: .omp.lastprivate.done: | // CHECK10: .omp.lastprivate.done: | ||||
| // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] | // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]] | ||||
| // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 | // CHECK10-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0 | ||||
| // CHECK10-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2 | // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2 | ||||
| // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | ||||
| // CHECK10: arraydestroy.body: | // CHECK10: arraydestroy.body: | ||||
| // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | ||||
| // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 | // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 | ||||
| // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | ||||
| // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] | // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]] | ||||
| // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] | // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]] | ||||
| // CHECK10: arraydestroy.done12: | // CHECK10: arraydestroy.done16: | ||||
| // CHECK10-NEXT: ret void | // CHECK10-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | ||||
| // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | ||||
| // CHECK10-NEXT: entry: | // CHECK10-NEXT: entry: | ||||
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 | // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 | ||||
| // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 | // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 | ||||
| ▲ Show 20 Lines • Show All 171 Lines • ▼ Show 20 Lines | |||||
| // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 | // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4 | ||||
| // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 | // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 | ||||
| // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 | // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 | ||||
| // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) | // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) | ||||
| // CHECK10-NEXT: ret void | // CHECK10-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 | // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 | ||||
| // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR4]] { | // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] { | ||||
| // CHECK10-NEXT: entry: | // CHECK10-NEXT: entry: | ||||
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
| // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 | // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 | ||||
| // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | ||||
| // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 | // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 | ||||
| // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 | // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 | ||||
| // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 | // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 | ||||
| ▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines | |||||
| // CHECK10-NEXT: br label [[COND_END]] | // CHECK10-NEXT: br label [[COND_END]] | ||||
| // CHECK10: cond.end: | // CHECK10: cond.end: | ||||
| // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | ||||
| // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK10: omp.inner.for.cond: | // CHECK10: omp.inner.for.cond: | ||||
| // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] | // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] | ||||
| // CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK10: omp.inner.for.cond.cleanup: | // CHECK10: omp.inner.for.cond.cleanup: | ||||
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK10: omp.inner.for.body: | // CHECK10: omp.inner.for.body: | ||||
| // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 | // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 | ||||
| // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 | // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 | ||||
| // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] | // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]] | ||||
| // CHECK10-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[TMP20:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8, !llvm.access.group !11 | // CHECK10-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP21]] to i64 | // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 | ||||
| // CHECK10-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]] | // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM8]] | ||||
| // CHECK10-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* | // CHECK10-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8* | ||||
| // CHECK10-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[TMP20]] to i8* | // CHECK10-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* | ||||
| // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i64 4, i1 false), !llvm.access.group !11 | // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group !11 | ||||
| // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK10: omp.body.continue: | // CHECK10: omp.body.continue: | ||||
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK10: omp.inner.for.inc: | // CHECK10: omp.inner.for.inc: | ||||
| // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], 1 | // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 | ||||
| // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 | ||||
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] | // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] | ||||
| // CHECK10: omp.inner.for.end: | // CHECK10: omp.inner.for.end: | ||||
| // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK10: omp.loop.exit: | // CHECK10: omp.loop.exit: | ||||
| // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 | // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 | ||||
| // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | ||||
| // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | ||||
| // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| Show All 29 Lines | |||||
| // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] | // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] | ||||
| // CHECK10: omp.arraycpy.done12: | // CHECK10: omp.arraycpy.done12: | ||||
| // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 | // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8 | ||||
| // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* | // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* | ||||
| // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* | // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* | ||||
| // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) | // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) | ||||
| // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | ||||
| // CHECK10: .omp.lastprivate.done: | // CHECK10: .omp.lastprivate.done: | ||||
| // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] | // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] | ||||
| // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 | // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 | ||||
| // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2 | // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2 | ||||
| // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | ||||
| // CHECK10: arraydestroy.body: | // CHECK10: arraydestroy.body: | ||||
| // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | ||||
| // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 | // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 | ||||
| // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | ||||
| // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] | // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] | ||||
| // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] | // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] | ||||
| // CHECK10: arraydestroy.done11: | // CHECK10: arraydestroy.done14: | ||||
| // CHECK10-NEXT: ret void | // CHECK10-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | ||||
| // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | ||||
| // CHECK10-NEXT: entry: | // CHECK10-NEXT: entry: | ||||
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 | // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 | ||||
| // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 | // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 | ||||
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| // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 | // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 | ||||
| // CHECK11-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4 | // CHECK11-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4 | ||||
| // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 | // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 | ||||
| // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]]) | // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]]) | ||||
| // CHECK11-NEXT: ret void | // CHECK11-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | ||||
| // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR4:[0-9]+]] { | // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] { | ||||
| // CHECK11-NEXT: entry: | // CHECK11-NEXT: entry: | ||||
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 | // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 | ||||
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 | // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 | ||||
| // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 | // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 | ||||
| // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 | ||||
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| // CHECK11-NEXT: br label [[COND_END]] | // CHECK11-NEXT: br label [[COND_END]] | ||||
| // CHECK11: cond.end: | // CHECK11: cond.end: | ||||
| // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | ||||
| // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK11: omp.inner.for.cond: | // CHECK11: omp.inner.for.cond: | ||||
| // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] | // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] | ||||
| // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK11: omp.inner.for.cond.cleanup: | // CHECK11: omp.inner.for.cond.cleanup: | ||||
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK11: omp.inner.for.body: | // CHECK11: omp.inner.for.body: | ||||
| // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 | // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 | ||||
| // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP21]] | // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] | ||||
| // CHECK11-NEXT: store i32 [[TMP20]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP23]] | // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP15]] | ||||
| // CHECK11-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* | // CHECK11-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* | ||||
| // CHECK11-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP22]] to i8* | // CHECK11-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* | ||||
| // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false), !llvm.access.group !6 | // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group !6 | ||||
| // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK11: omp.body.continue: | // CHECK11: omp.body.continue: | ||||
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK11: omp.inner.for.inc: | // CHECK11: omp.inner.for.inc: | ||||
| // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP26]], 1 | // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 | ||||
| // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | ||||
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] | // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] | ||||
| // CHECK11: omp.inner.for.end: | // CHECK11: omp.inner.for.end: | ||||
| // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK11: omp.loop.exit: | // CHECK11: omp.loop.exit: | ||||
| // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 | // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 | ||||
| // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | ||||
| // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | ||||
| // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| Show All 31 Lines | |||||
| // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 | // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 | ||||
| // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* | // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* | ||||
| // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* | // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* | ||||
| // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) | // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) | ||||
| // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 | // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 | ||||
| // CHECK11-NEXT: store i32 [[TMP35]], i32* [[SVAR_ADDR]], align 4 | // CHECK11-NEXT: store i32 [[TMP35]], i32* [[SVAR_ADDR]], align 4 | ||||
| // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | ||||
| // CHECK11: .omp.lastprivate.done: | // CHECK11: .omp.lastprivate.done: | ||||
| // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] | // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] | ||||
| // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 | // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 | ||||
| // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2 | // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 | ||||
| // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | ||||
| // CHECK11: arraydestroy.body: | // CHECK11: arraydestroy.body: | ||||
| // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | ||||
| // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 | // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 | ||||
| // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | ||||
| // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] | // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] | ||||
| // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] | // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] | ||||
| // CHECK11: arraydestroy.done11: | // CHECK11: arraydestroy.done14: | ||||
| // CHECK11-NEXT: ret void | // CHECK11-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | ||||
| // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | ||||
| // CHECK11-NEXT: entry: | // CHECK11-NEXT: entry: | ||||
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 | // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 | ||||
| // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 | // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 | ||||
| ▲ Show 20 Lines • Show All 168 Lines • ▼ Show 20 Lines | |||||
| // CHECK11-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 | // CHECK11-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 | ||||
| // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 | // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 | ||||
| // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 | // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 | ||||
| // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) | // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) | ||||
| // CHECK11-NEXT: ret void | // CHECK11-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | ||||
| // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR4]] { | // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] { | ||||
| // CHECK11-NEXT: entry: | // CHECK11-NEXT: entry: | ||||
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 | // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 | ||||
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 | // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 | ||||
| // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 | // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 | ||||
| // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 | // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 | ||||
| ▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines | |||||
| // CHECK11-NEXT: br label [[COND_END]] | // CHECK11-NEXT: br label [[COND_END]] | ||||
| // CHECK11: cond.end: | // CHECK11: cond.end: | ||||
| // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | ||||
| // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK11: omp.inner.for.cond: | // CHECK11: omp.inner.for.cond: | ||||
| // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] | // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] | ||||
| // CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK11: omp.inner.for.cond.cleanup: | // CHECK11: omp.inner.for.cond.cleanup: | ||||
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK11: omp.inner.for.body: | // CHECK11: omp.inner.for.body: | ||||
| // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 | // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 | ||||
| // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP19]] | // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] | ||||
| // CHECK11-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[TMP20:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP21]] | // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP15]] | ||||
| // CHECK11-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* | // CHECK11-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* | ||||
| // CHECK11-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[TMP20]] to i8* | // CHECK11-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* | ||||
| // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 4, i1 false), !llvm.access.group !12 | // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group !12 | ||||
| // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK11: omp.body.continue: | // CHECK11: omp.body.continue: | ||||
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK11: omp.inner.for.inc: | // CHECK11: omp.inner.for.inc: | ||||
| // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP24]], 1 | // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 | ||||
| // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | ||||
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] | // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] | ||||
| // CHECK11: omp.inner.for.end: | // CHECK11: omp.inner.for.end: | ||||
| // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK11: omp.loop.exit: | // CHECK11: omp.loop.exit: | ||||
| // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 | // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 | ||||
| // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | ||||
| // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | ||||
| // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| Show All 29 Lines | |||||
| // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] | // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] | ||||
| // CHECK11: omp.arraycpy.done11: | // CHECK11: omp.arraycpy.done11: | ||||
| // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 | // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 | ||||
| // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* | // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* | ||||
| // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* | // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* | ||||
| // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) | // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) | ||||
| // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | ||||
| // CHECK11: .omp.lastprivate.done: | // CHECK11: .omp.lastprivate.done: | ||||
| // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] | // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] | ||||
| // CHECK11-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 | // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 | ||||
| // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2 | // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 | ||||
| // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | ||||
| // CHECK11: arraydestroy.body: | // CHECK11: arraydestroy.body: | ||||
| // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | ||||
| // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 | // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 | ||||
| // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | ||||
| // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] | // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] | ||||
| // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] | // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] | ||||
| // CHECK11: arraydestroy.done10: | // CHECK11: arraydestroy.done13: | ||||
| // CHECK11-NEXT: ret void | // CHECK11-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | ||||
| // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | ||||
| // CHECK11-NEXT: entry: | // CHECK11-NEXT: entry: | ||||
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 | // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 | ||||
| // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 | // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 | ||||
| ▲ Show 20 Lines • Show All 199 Lines • ▼ Show 20 Lines | |||||
| // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 | // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4 | ||||
| // CHECK12-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4 | // CHECK12-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4 | ||||
| // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 | // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4 | ||||
| // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]]) | // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]]) | ||||
| // CHECK12-NEXT: ret void | // CHECK12-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. | // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. | ||||
| // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR4:[0-9]+]] { | // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR4:[0-9]+]] { | ||||
| // CHECK12-NEXT: entry: | // CHECK12-NEXT: entry: | ||||
| // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 | // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 | ||||
| // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 | // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4 | ||||
| // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 | // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4 | ||||
| // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| ▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines | |||||
| // CHECK12-NEXT: br label [[COND_END]] | // CHECK12-NEXT: br label [[COND_END]] | ||||
| // CHECK12: cond.end: | // CHECK12: cond.end: | ||||
| // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | ||||
| // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK12: omp.inner.for.cond: | // CHECK12: omp.inner.for.cond: | ||||
| // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] | // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] | ||||
| // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK12: omp.inner.for.cond.cleanup: | // CHECK12: omp.inner.for.cond.cleanup: | ||||
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK12: omp.inner.for.body: | // CHECK12: omp.inner.for.body: | ||||
| // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 | // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 | ||||
| // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP21]] | // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] | ||||
| // CHECK12-NEXT: store i32 [[TMP20]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: [[TMP14:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP23]] | // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP15]] | ||||
| // CHECK12-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* | // CHECK12-NEXT: [[TMP16:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8* | ||||
| // CHECK12-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP22]] to i8* | // CHECK12-NEXT: [[TMP17:%.*]] = bitcast %struct.S* [[TMP14]] to i8* | ||||
| // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 4, i1 false), !llvm.access.group !6 | // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group !6 | ||||
| // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK12: omp.body.continue: | // CHECK12: omp.body.continue: | ||||
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK12: omp.inner.for.inc: | // CHECK12: omp.inner.for.inc: | ||||
| // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP26]], 1 | // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 | ||||
| // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 | ||||
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] | // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] | ||||
| // CHECK12: omp.inner.for.end: | // CHECK12: omp.inner.for.end: | ||||
| // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK12: omp.loop.exit: | // CHECK12: omp.loop.exit: | ||||
| // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 | // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 | ||||
| // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | ||||
| // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | ||||
| // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| Show All 31 Lines | |||||
| // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 | // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4 | ||||
| // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* | // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP3]] to i8* | ||||
| // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* | // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8* | ||||
| // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) | // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) | ||||
| // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 | // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR7]], align 4 | ||||
| // CHECK12-NEXT: store i32 [[TMP35]], i32* [[SVAR_ADDR]], align 4 | // CHECK12-NEXT: store i32 [[TMP35]], i32* [[SVAR_ADDR]], align 4 | ||||
| // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | ||||
| // CHECK12: .omp.lastprivate.done: | // CHECK12: .omp.lastprivate.done: | ||||
| // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] | // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] | ||||
| // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 | // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0 | ||||
| // CHECK12-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2 | // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2 | ||||
| // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | ||||
| // CHECK12: arraydestroy.body: | // CHECK12: arraydestroy.body: | ||||
| // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | ||||
| // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 | // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 | ||||
| // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | ||||
| // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] | // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] | ||||
| // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] | // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] | ||||
| // CHECK12: arraydestroy.done11: | // CHECK12: arraydestroy.done14: | ||||
| // CHECK12-NEXT: ret void | // CHECK12-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | ||||
| // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | ||||
| // CHECK12-NEXT: entry: | // CHECK12-NEXT: entry: | ||||
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 | // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4 | ||||
| // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 | // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4 | ||||
| ▲ Show 20 Lines • Show All 168 Lines • ▼ Show 20 Lines | |||||
| // CHECK12-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 | // CHECK12-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4 | ||||
| // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 | // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 | ||||
| // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 | // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4 | ||||
| // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) | // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]]) | ||||
| // CHECK12-NEXT: ret void | // CHECK12-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 | // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 | ||||
| // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR4]] { | // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR4]] { | ||||
| // CHECK12-NEXT: entry: | // CHECK12-NEXT: entry: | ||||
| // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 | ||||
| // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 | // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4 | ||||
| // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | ||||
| // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 | // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4 | ||||
| // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 | // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4 | ||||
| // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 | // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4 | ||||
| ▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines | |||||
| // CHECK12-NEXT: br label [[COND_END]] | // CHECK12-NEXT: br label [[COND_END]] | ||||
| // CHECK12: cond.end: | // CHECK12: cond.end: | ||||
| // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] | ||||
| // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 | ||||
| // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 | ||||
| // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 | ||||
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] | ||||
| // CHECK12: omp.inner.for.cond: | // CHECK12: omp.inner.for.cond: | ||||
| // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] | // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] | ||||
| // CHECK12-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] | ||||
| // CHECK12: omp.inner.for.cond.cleanup: | // CHECK12: omp.inner.for.cond.cleanup: | ||||
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]] | ||||
| // CHECK12: omp.inner.for.body: | // CHECK12: omp.inner.for.body: | ||||
| // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 | // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 | ||||
| // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] | ||||
| // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP19]] | // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP13]] | ||||
| // CHECK12-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: store i32 [[TMP12]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[TMP20:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: [[TMP14:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP21]] | // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP15]] | ||||
| // CHECK12-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* | // CHECK12-NEXT: [[TMP16:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8* | ||||
| // CHECK12-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[TMP20]] to i8* | // CHECK12-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP14]] to i8* | ||||
| // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 4, i1 false), !llvm.access.group !12 | // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group !12 | ||||
| // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] | ||||
| // CHECK12: omp.body.continue: | // CHECK12: omp.body.continue: | ||||
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] | ||||
| // CHECK12: omp.inner.for.inc: | // CHECK12: omp.inner.for.inc: | ||||
| // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP24]], 1 | // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1 | ||||
| // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 | ||||
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] | // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] | ||||
| // CHECK12: omp.inner.for.end: | // CHECK12: omp.inner.for.end: | ||||
| // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] | ||||
| // CHECK12: omp.loop.exit: | // CHECK12: omp.loop.exit: | ||||
| // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 | // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 | ||||
| // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 | ||||
| // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]]) | ||||
| // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 | ||||
| Show All 29 Lines | |||||
| // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] | // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] | ||||
| // CHECK12: omp.arraycpy.done11: | // CHECK12: omp.arraycpy.done11: | ||||
| // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 | // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4 | ||||
| // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* | // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* | ||||
| // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* | // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8* | ||||
| // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) | // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false) | ||||
| // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] | ||||
| // CHECK12: .omp.lastprivate.done: | // CHECK12: .omp.lastprivate.done: | ||||
| // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] | // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR5]] | ||||
| // CHECK12-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 | // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0 | ||||
| // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2 | // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2 | ||||
| // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] | ||||
| // CHECK12: arraydestroy.body: | // CHECK12: arraydestroy.body: | ||||
| // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] | ||||
| // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 | // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 | ||||
| // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] | ||||
| // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] | // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] | ||||
| // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] | // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] | ||||
| // CHECK12: arraydestroy.done10: | // CHECK12: arraydestroy.done13: | ||||
| // CHECK12-NEXT: ret void | // CHECK12-NEXT: ret void | ||||
| // | // | ||||
| // | // | ||||
| // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | ||||
| // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | ||||
| // CHECK12-NEXT: entry: | // CHECK12-NEXT: entry: | ||||
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 | // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4 | ||||
| // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 | // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4 | ||||
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