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clang/test/OpenMP/declare_target_codegen_globalization.cpp
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// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*)* @__omp_outlined__ to i8*), i8* null, i8** [[TMP5]], i64 1) | // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*)* @__omp_outlined__ to i8*), i8* null, i8** [[TMP5]], i64 1) | ||||
// CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 true) | // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 true) | ||||
// CHECK1-NEXT: ret void | // CHECK1-NEXT: ret void | ||||
// CHECK1: worker.exit: | // CHECK1: worker.exit: | ||||
// CHECK1-NEXT: ret void | // CHECK1-NEXT: ret void | ||||
// | // | ||||
// | // | ||||
// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__ | // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__ | ||||
// CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] { | // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] { | ||||
// CHECK1-NEXT: entry: | // CHECK1-NEXT: entry: | ||||
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 | ||||
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 | // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 | ||||
// CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 | // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 | ||||
// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 | // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 | ||||
// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 | // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 | ||||
// CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 | // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 | ||||
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