Changeset View
Changeset View
Standalone View
Standalone View
llvm/include/llvm/IR/IntrinsicsPowerPC.td
| Show First 20 Lines • Show All 1,529 Lines • ▼ Show 20 Lines | def int_ppc_stwcx : GCCBuiltin<"__builtin_ppc_stwcx">, | ||||
| Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], | Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], | ||||
| [IntrWriteMem]>; | [IntrWriteMem]>; | ||||
| def int_ppc_lwarx : GCCBuiltin<"__builtin_ppc_lwarx">, | def int_ppc_lwarx : GCCBuiltin<"__builtin_ppc_lwarx">, | ||||
| Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>; | Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>; | ||||
| def int_ppc_ldarx : GCCBuiltin<"__builtin_ppc_ldarx">, | def int_ppc_ldarx : GCCBuiltin<"__builtin_ppc_ldarx">, | ||||
| Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrNoMem]>; | Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrNoMem]>; | ||||
| } | } | ||||
| //===----------------------------------------------------------------------===// | |||||
| // PowerPC Atomic Intrinsic Definitions. | |||||
| let TargetPrefix = "ppc" in { | |||||
| class AtomicRMW128Intrinsic | |||||
| : Intrinsic<[llvm_i64_ty, llvm_i64_ty], | |||||
| [llvm_ptr_ty, llvm_i64_ty, llvm_i64_ty], | |||||
| [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>; | |||||
| def int_ppc_atomicrmw_xchg_i128 : AtomicRMW128Intrinsic; | |||||
| def int_ppc_atomicrmw_add_i128 : AtomicRMW128Intrinsic; | |||||
| def int_ppc_atomicrmw_sub_i128 : AtomicRMW128Intrinsic; | |||||
| def int_ppc_atomicrmw_and_i128 : AtomicRMW128Intrinsic; | |||||
| def int_ppc_atomicrmw_or_i128 : AtomicRMW128Intrinsic; | |||||
| def int_ppc_atomicrmw_xor_i128 : AtomicRMW128Intrinsic; | |||||
| def int_ppc_atomicrmw_nand_i128 : AtomicRMW128Intrinsic; | |||||
| def int_ppc_cmpxchg_i128 : Intrinsic<[llvm_i64_ty, llvm_i64_ty], | |||||
| [llvm_ptr_ty, | |||||
| llvm_i64_ty, llvm_i64_ty, | |||||
| llvm_i64_ty, llvm_i64_ty], | |||||
efriedma: Adding IR intrinsics for this is a little weird. Is there any reason you can't just use… | |||||
Exploit AtomicExpandPass looks easier from my side :). And what's more current PPC backend also has spilling issues with -O0(fastregalloc enabled), see https://bugs.llvm.org/show_bug.cgi?id=50780. Maybe we should unify PPC's instruction selection of atomic operations one day (PPC also has partword atomics which is feasible to use MaskedIntrinsic) which I need more feedback from @nemanjai and @jsji . lkail: Exploit AtomicExpandPass looks easier from my side :). And what's more current PPC backend also… | |||||
Not Done ReplyInline ActionsYes, I think we should refactor partword atomics to use AtomicExpandPass as well, although not necessary do it now. jsji: Yes, I think we should refactor partword atomics to use AtomicExpandPass as well, although not… | |||||
| [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>; | |||||
| } | |||||
Adding IR intrinsics for this is a little weird. Is there any reason you can't just use SelectionDAG custom legalization for these operations? I mean, not that it doesn't work this way, but it seems more complicated overall.