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Differential D98247 Diff 329531 llvm/test/Transforms/InstCombine/X86/x86-amx.ll

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llvm/test/Transforms/InstCombine/X86/x86-amx.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -instcombine -S < %s | FileCheck %s ; RUN: opt -instcombine -S < %s | FileCheck %s
; RUN: opt -passes=instcombine -S < %s | FileCheck %s ; RUN: opt -passes=instcombine -S < %s | FileCheck %s
define linkonce_odr dso_local void @foo(<256 x i32>* %arrayidx16, <256 x i32>* %arrayidx29, <256 x i32>* %arrayidx35) local_unnamed_addr { define linkonce_odr dso_local void @foo(<256 x i32>* %arrayidx16, <256 x i32>* %arrayidx29, <256 x i32>* %arrayidx35) local_unnamed_addr {
; CHECK-LABEL: @foo( ; CHECK-LABEL: @foo(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND9:%.*]] ; CHECK-NEXT: br label [[FOR_COND9:%.*]]
; CHECK: for.cond9: ; CHECK: for.cond9:
; CHECK-NEXT: br i1 undef, label [[FOR_BODY14:%.*]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 undef, label [[FOR_BODY14:%.*]], label [[EXIT:%.*]]
; CHECK: for.body14: ; CHECK: for.body14:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <256 x i32>* [[ARRAYIDX16:%.*]] to x86_amx* ; CHECK-NEXT: [[T5:%.*]] = load <256 x i32>, <256 x i32>* [[ARRAYIDX16:%.*]], align 64
; CHECK-NEXT: [[T51:%.*]] = load x86_amx, x86_amx* [[TMP0]], align 64
; CHECK-NEXT: br label [[FOR_COND18:%.*]] ; CHECK-NEXT: br label [[FOR_COND18:%.*]]
; CHECK: for.cond18: ; CHECK: for.cond18:
; CHECK-NEXT: [[TMP1:%.*]] = phi x86_amx [ [[T51]], [[FOR_BODY14]] ], [ [[T11:%.*]], [[FOR_BODY24:%.*]] ] ; CHECK-NEXT: [[SUB_C_SROA_0_0:%.*]] = phi <256 x i32> [ [[T5]], [[FOR_BODY14]] ], [ [[T12:%.*]], [[FOR_BODY24:%.*]] ]
; CHECK-NEXT: br i1 undef, label [[FOR_BODY24]], label [[FOR_COND_CLEANUP23:%.*]] ; CHECK-NEXT: br i1 undef, label [[FOR_BODY24]], label [[FOR_COND_CLEANUP23:%.*]]
; CHECK: for.cond.cleanup23: ; CHECK: for.cond.cleanup23:
; CHECK-NEXT: [[TMP2:%.*]] = bitcast x86_amx [[TMP1]] to <256 x i32> ; CHECK-NEXT: store <256 x i32> [[SUB_C_SROA_0_0]], <256 x i32>* [[ARRAYIDX16]], align 64
; CHECK-NEXT: store <256 x i32> [[TMP2]], <256 x i32>* [[ARRAYIDX16]], align 64
; CHECK-NEXT: br label [[FOR_COND9]] ; CHECK-NEXT: br label [[FOR_COND9]]
; CHECK: for.body24: ; CHECK: for.body24:
; CHECK-NEXT: [[T6:%.*]] = load <256 x i32>, <256 x i32>* [[ARRAYIDX29:%.*]], align 64 ; CHECK-NEXT: [[T6:%.*]] = load <256 x i32>, <256 x i32>* [[ARRAYIDX29:%.*]], align 64
; CHECK-NEXT: [[T7:%.*]] = load <256 x i32>, <256 x i32>* [[ARRAYIDX35:%.*]], align 64 ; CHECK-NEXT: [[T7:%.*]] = load <256 x i32>, <256 x i32>* [[ARRAYIDX35:%.*]], align 64
; CHECK-NEXT: [[T8:%.*]] = bitcast <256 x i32> [[SUB_C_SROA_0_0]] to x86_amx
; CHECK-NEXT: [[T9:%.*]] = bitcast <256 x i32> [[T6]] to x86_amx ; CHECK-NEXT: [[T9:%.*]] = bitcast <256 x i32> [[T6]] to x86_amx
; CHECK-NEXT: [[T10:%.*]] = bitcast <256 x i32> [[T7]] to x86_amx ; CHECK-NEXT: [[T10:%.*]] = bitcast <256 x i32> [[T7]] to x86_amx
; CHECK-NEXT: [[T11]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 1, i16 4, i16 4, x86_amx [[TMP1]], x86_amx [[T9]], x86_amx [[T10]]) ; CHECK-NEXT: [[T11:%.*]] = call x86_amx @llvm.x86.tdpbssd.internal(i16 1, i16 4, i16 4, x86_amx [[T8]], x86_amx [[T9]], x86_amx [[T10]])
; CHECK-NEXT: [[T12]] = bitcast x86_amx [[T11]] to <256 x i32>
; CHECK-NEXT: br label [[FOR_COND18]] ; CHECK-NEXT: br label [[FOR_COND18]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
br label %for.cond9 br label %for.cond9
for.cond9: ; preds = %for.cond, %for.cond.cleanup23 for.cond9: ; preds = %for.cond, %for.cond.cleanup23
br i1 undef, label %for.body14, label %exit br i1 undef, label %for.body14, label %exit
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