Differential D96340 Diff 323224 llvm/test/CodeGen/AMDGPU/wave32.ll

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	; Test save/restore of VGPR needed for SGPR spilling.			; Test save/restore of VGPR needed for SGPR spilling.

	; GCN-LABEL: {{^}}callee_no_stack_with_call:			; GCN-LABEL: {{^}}callee_no_stack_with_call:
	; GCN: s_waitcnt			; GCN: s_waitcnt
	; GCN-NEXT: s_waitcnt_vscnt			; GCN-NEXT: s_waitcnt_vscnt

	; GFX1064-NEXT: s_or_saveexec_b64 [[COPY_EXEC0:s\[[0-9]+:[0-9]+\]]], -1{{$}}			; GFX1064-NEXT: s_or_saveexec_b64 [[COPY_EXEC0:s\[[0-9]+:[0-9]+\]]], -1{{$}}
	; GFX1032-NEXT: s_or_saveexec_b32 [[COPY_EXEC0:s[0-9]]], -1{{$}}			; GFX1032-NEXT: s_or_saveexec_b32 [[COPY_EXEC0:s[0-9]+]], -1{{$}}
	; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill			; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
	; GCN-NEXT: s_waitcnt_depctr 0xffe3			; GCN-NEXT: s_waitcnt_depctr 0xffe3
	; GFX1064-NEXT: s_mov_b64 exec, [[COPY_EXEC0]]			; GFX1064-NEXT: s_mov_b64 exec, [[COPY_EXEC0]]
	; GFX1032-NEXT: s_mov_b32 exec_lo, [[COPY_EXEC0]]			; GFX1032-NEXT: s_mov_b32 exec_lo, [[COPY_EXEC0]]

	; GCN-NEXT: v_writelane_b32 v40, s33, 2			; GCN-NEXT: v_writelane_b32 v40, s33, 2
	; GCN: s_mov_b32 s33, s32			; GCN: s_mov_b32 s33, s32
	; GFX1064: s_add_u32 s32, s32, 0x400			; GFX1064: s_add_u32 s32, s32, 0x400
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