Page MenuHomePhabricator
Differential D84765 Diff 283946 llvm/test/CodeGen/PowerPC/aix-sret-param.ll

Changeset View

Standalone View

View Options

llvm/test/CodeGen/PowerPC/aix-sret-param.ll

Show All 33 Lines
; MIR: name: test1 ; MIR: name: test1
; MIR: stack: ; MIR: stack:
; MIR-NEXT: - { id: 0, name: s, type: default, offset: 0, size: 1, alignment: 8, ; MIR-NEXT: - { id: 0, name: s, type: default, offset: 0, size: 1, alignment: 8,
; MIR32: bb.0.entry: ; MIR32: bb.0.entry:
; MIR32-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 ; MIR32-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
; MIR32-NEXT: renamable $r3 = ADDI %stack.0.s, 0 ; MIR32-NEXT: renamable $r3 = ADDI %stack.0.s, 0
; MIR32-NEXT: BL_NOP <mcsymbol .foo>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1 ; MIR32-NEXT: BL_NOP <mcsymbol .foo[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1
; MIR32-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 ; MIR32-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
; MIR64: bb.0.entry: ; MIR64: bb.0.entry:
; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.s, 0 ; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.s, 0
; MIR64-NEXT: BL8_NOP <mcsymbol .foo>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; MIR64-NEXT: BL8_NOP <mcsymbol .foo[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
; ASM-LABEL: .test1: ; ASM-LABEL: .test1:
; ASM32: stwu 1, -64(1) ; ASM32: stwu 1, -64(1)
; ASM32-NEXT: addi 3, 1, 56 ; ASM32-NEXT: addi 3, 1, 56
; ASM32-NEXT: bl .foo ; ASM32-NEXT: bl .foo[PR]
; ASM32-NEXT: nop ; ASM32-NEXT: nop
; ASM32-NEXT: addi 1, 1, 64 ; ASM32-NEXT: addi 1, 1, 64
; ASM64: stdu 1, -128(1) ; ASM64: stdu 1, -128(1)
; ASM64-NEXT: addi 3, 1, 120 ; ASM64-NEXT: addi 3, 1, 120
; ASM64-NEXT: bl .foo ; ASM64-NEXT: bl .foo[PR]
; ASM64-NEXT: nop ; ASM64-NEXT: nop
; ASM64-NEXT: addi 1, 1, 128 ; ASM64-NEXT: addi 1, 1, 128
; MIR: name: test2 ; MIR: name: test2
; MIR: stack: ; MIR: stack:
; MIR-NEXT: - { id: 0, name: t, type: default, offset: 0, size: 24, alignment: 8, ; MIR-NEXT: - { id: 0, name: t, type: default, offset: 0, size: 24, alignment: 8,
; MIR32: bb.0.entry: ; MIR32: bb.0.entry:
; MIR32-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 ; MIR32-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
; MIR32-NEXT: renamable $r3 = ADDI %stack.0.t, 0 ; MIR32-NEXT: renamable $r3 = ADDI %stack.0.t, 0
; MIR32-NEXT: BL_NOP <mcsymbol .bar>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1 ; MIR32-NEXT: BL_NOP <mcsymbol .bar[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1
; MIR32-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 ; MIR32-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
; MIR64: bb.0.entry: ; MIR64: bb.0.entry:
; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 ; MIR64-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.t, 0 ; MIR64-NEXT: renamable $x3 = ADDI8 %stack.0.t, 0
; MIR64-NEXT: BL8_NOP <mcsymbol .bar>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 ; MIR64-NEXT: BL8_NOP <mcsymbol .bar[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 ; MIR64-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
; ASM-LABEL: .test2: ; ASM-LABEL: .test2:
; ASM32: stwu 1, -80(1) ; ASM32: stwu 1, -80(1)
; ASM32-NEXT: addi 3, 1, 56 ; ASM32-NEXT: addi 3, 1, 56
; ASM32-NEXT: bl .bar ; ASM32-NEXT: bl .bar[PR]
; ASM32-NEXT: nop ; ASM32-NEXT: nop
; ASM32-NEXT: addi 1, 1, 80 ; ASM32-NEXT: addi 1, 1, 80
; ASM64: stdu 1, -144(1) ; ASM64: stdu 1, -144(1)
; ASM64-NEXT: addi 3, 1, 120 ; ASM64-NEXT: addi 3, 1, 120
; ASM64-NEXT: bl .bar ; ASM64-NEXT: bl .bar[PR]
; ASM64-NEXT: nop ; ASM64-NEXT: nop
; ASM64-NEXT: addi 1, 1, 144 ; ASM64-NEXT: addi 1, 1, 144