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clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
| Context not available. | |||||
| #include <arm_neon.h> | #include <arm_neon.h> | ||||
| // CHECK-LABEL: define float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 { | // CHECK-LABEL: define noundef float @test_vmuls_lane_f32(float noundef %a, <2 x float> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1 | // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1 | ||||
| // CHECK: [[MUL:%.*]] = fmul float %a, [[VGET_LANE]] | // CHECK: [[MUL:%.*]] = fmul float %a, [[VGET_LANE]] | ||||
| // CHECK: ret float [[MUL]] | // CHECK: ret float [[MUL]] | ||||
| Context not available. | |||||
| return vmuls_lane_f32(a, b, 1); | return vmuls_lane_f32(a, b, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 { | // CHECK-LABEL: define noundef double @test_vmuld_lane_f64(double noundef %a, <1 x double> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0 | // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0 | ||||
| // CHECK: [[MUL:%.*]] = fmul double %a, [[VGET_LANE]] | // CHECK: [[MUL:%.*]] = fmul double %a, [[VGET_LANE]] | ||||
| // CHECK: ret double [[MUL]] | // CHECK: ret double [[MUL]] | ||||
| Context not available. | |||||
| return vmuld_lane_f64(a, b, 0); | return vmuld_lane_f64(a, b, 0); | ||||
| } | } | ||||
| // CHECK-LABEL: define float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 { | // CHECK-LABEL: define noundef float @test_vmuls_laneq_f32(float noundef %a, <4 x float> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3 | ||||
| // CHECK: [[MUL:%.*]] = fmul float %a, [[VGETQ_LANE]] | // CHECK: [[MUL:%.*]] = fmul float %a, [[VGETQ_LANE]] | ||||
| // CHECK: ret float [[MUL]] | // CHECK: ret float [[MUL]] | ||||
| Context not available. | |||||
| return vmuls_laneq_f32(a, b, 3); | return vmuls_laneq_f32(a, b, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 { | // CHECK-LABEL: define noundef double @test_vmuld_laneq_f64(double noundef %a, <2 x double> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 | ||||
| // CHECK: [[MUL:%.*]] = fmul double %a, [[VGETQ_LANE]] | // CHECK: [[MUL:%.*]] = fmul double %a, [[VGETQ_LANE]] | ||||
| // CHECK: ret double [[MUL]] | // CHECK: ret double [[MUL]] | ||||
| Context not available. | |||||
| return vmuld_laneq_f64(a, b, 1); | return vmuld_laneq_f64(a, b, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 { | // CHECK-LABEL: define noundef <1 x double> @test_vmul_n_f64(<1 x double> noundef %a, double noundef %b) #0 { | ||||
| // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %a to double | // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %a to double | ||||
| // CHECK: [[TMP3:%.*]] = fmul double [[TMP2]], %b | // CHECK: [[TMP3:%.*]] = fmul double [[TMP2]], %b | ||||
| // CHECK: [[TMP4:%.*]] = bitcast double [[TMP3]] to <1 x double> | // CHECK: [[TMP4:%.*]] = bitcast double [[TMP3]] to <1 x double> | ||||
| Context not available. | |||||
| return vmul_n_f64(a, b); | return vmul_n_f64(a, b); | ||||
| } | } | ||||
| // CHECK-LABEL: define float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 { | // CHECK-LABEL: define noundef float @test_vmulxs_lane_f32(float noundef %a, <2 x float> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1 | // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1 | ||||
| // CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGET_LANE]]) | // CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGET_LANE]]) | ||||
| // CHECK: ret float [[VMULXS_F32_I]] | // CHECK: ret float [[VMULXS_F32_I]] | ||||
| Context not available. | |||||
| return vmulxs_lane_f32(a, b, 1); | return vmulxs_lane_f32(a, b, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 { | // CHECK-LABEL: define noundef float @test_vmulxs_laneq_f32(float noundef %a, <4 x float> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3 | ||||
| // CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGETQ_LANE]]) | // CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGETQ_LANE]]) | ||||
| // CHECK: ret float [[VMULXS_F32_I]] | // CHECK: ret float [[VMULXS_F32_I]] | ||||
| Context not available. | |||||
| return vmulxs_laneq_f32(a, b, 3); | return vmulxs_laneq_f32(a, b, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 { | // CHECK-LABEL: define noundef double @test_vmulxd_lane_f64(double noundef %a, <1 x double> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0 | // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0 | ||||
| // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGET_LANE]]) | // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGET_LANE]]) | ||||
| // CHECK: ret double [[VMULXD_F64_I]] | // CHECK: ret double [[VMULXD_F64_I]] | ||||
| Context not available. | |||||
| return vmulxd_lane_f64(a, b, 0); | return vmulxd_lane_f64(a, b, 0); | ||||
| } | } | ||||
| // CHECK-LABEL: define double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 { | // CHECK-LABEL: define noundef double @test_vmulxd_laneq_f64(double noundef %a, <2 x double> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 | ||||
| // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGETQ_LANE]]) | // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGETQ_LANE]]) | ||||
| // CHECK: ret double [[VMULXD_F64_I]] | // CHECK: ret double [[VMULXD_F64_I]] | ||||
| Context not available. | |||||
| return vmulxd_laneq_f64(a, b, 1); | return vmulxd_laneq_f64(a, b, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 { | // CHECK-LABEL: define noundef <1 x double> @test_vmulx_lane_f64(<1 x double> noundef %a, <1 x double> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 | // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 | ||||
| // CHECK: [[VGET_LANE6:%.*]] = extractelement <1 x double> %b, i32 0 | // CHECK: [[VGET_LANE6:%.*]] = extractelement <1 x double> %b, i32 0 | ||||
| // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE6]]) | // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE6]]) | ||||
| Context not available. | |||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 { | // CHECK-LABEL: define noundef <1 x double> @test_vmulx_laneq_f64_0(<1 x double> noundef %a, <2 x double> noundef %b) #1 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 | // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 0 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 0 | ||||
| // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]]) | // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]]) | ||||
| Context not available. | |||||
| return vmulx_laneq_f64(a, b, 0); | return vmulx_laneq_f64(a, b, 0); | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 { | // CHECK-LABEL: define noundef <1 x double> @test_vmulx_laneq_f64_1(<1 x double> noundef %a, <2 x double> noundef %b) #1 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 | // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0 | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1 | ||||
| // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]]) | // CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]]) | ||||
| Context not available. | |||||
| } | } | ||||
| // CHECK-LABEL: define float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 { | // CHECK-LABEL: define noundef float @test_vfmas_lane_f32(float noundef %a, float noundef %b, <2 x float> noundef %c) #0 { | ||||
| // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 | // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 | ||||
| // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float %b, float [[EXTRACT]], float %a) | // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float %b, float [[EXTRACT]], float %a) | ||||
| // CHECK: ret float [[TMP2]] | // CHECK: ret float [[TMP2]] | ||||
| Context not available. | |||||
| return vfmas_lane_f32(a, b, c, 1); | return vfmas_lane_f32(a, b, c, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 { | // CHECK-LABEL: define noundef double @test_vfmad_lane_f64(double noundef %a, double noundef %b, <1 x double> noundef %c) #0 { | ||||
| // CHECK: [[EXTRACT:%.*]] = extractelement <1 x double> %c, i32 0 | // CHECK: [[EXTRACT:%.*]] = extractelement <1 x double> %c, i32 0 | ||||
| // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a) | // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a) | ||||
| // CHECK: ret double [[TMP2]] | // CHECK: ret double [[TMP2]] | ||||
| Context not available. | |||||
| return vfmad_lane_f64(a, b, c, 0); | return vfmad_lane_f64(a, b, c, 0); | ||||
| } | } | ||||
| // CHECK-LABEL: define double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 { | // CHECK-LABEL: define noundef double @test_vfmad_laneq_f64(double noundef %a, double noundef %b, <2 x double> noundef %c) #1 { | ||||
| // CHECK: [[EXTRACT:%.*]] = extractelement <2 x double> %c, i32 1 | // CHECK: [[EXTRACT:%.*]] = extractelement <2 x double> %c, i32 1 | ||||
| // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a) | // CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a) | ||||
| // CHECK: ret double [[TMP2]] | // CHECK: ret double [[TMP2]] | ||||
| Context not available. | |||||
| return vfmad_laneq_f64(a, b, c, 1); | return vfmad_laneq_f64(a, b, c, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 { | // CHECK-LABEL: define noundef float @test_vfmss_lane_f32(float noundef %a, float noundef %b, <2 x float> noundef %c) #0 { | ||||
| // CHECK: [[SUB:%.*]] = fneg float %b | // CHECK: [[SUB:%.*]] = fneg float %b | ||||
| // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 | // CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1 | ||||
| // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a) | // CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a) | ||||
| Context not available. | |||||
| return vfmss_lane_f32(a, b, c, 1); | return vfmss_lane_f32(a, b, c, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 { | // CHECK-LABEL: define noundef <1 x double> @test_vfma_lane_f64(<1 x double> noundef %a, <1 x double> noundef %b, <1 x double> noundef %v) #0 { | ||||
| // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> | // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> | ||||
| // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> | // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> | ||||
| // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8> | // CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8> | ||||
| Context not available. | |||||
| return vfma_lane_f64(a, b, v, 0); | return vfma_lane_f64(a, b, v, 0); | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 { | // CHECK-LABEL: define noundef <1 x double> @test_vfms_lane_f64(<1 x double> noundef %a, <1 x double> noundef %b, <1 x double> noundef %v) #0 { | ||||
| // CHECK: [[SUB:%.*]] = fneg <1 x double> %b | // CHECK: [[SUB:%.*]] = fneg <1 x double> %b | ||||
| // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> | // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> | ||||
| // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> | // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> | ||||
| Context not available. | |||||
| return vfms_lane_f64(a, b, v, 0); | return vfms_lane_f64(a, b, v, 0); | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 { | // CHECK-LABEL: define noundef <1 x double> @test_vfma_laneq_f64(<1 x double> noundef %a, <1 x double> noundef %b, <2 x double> noundef %v) #1 { | ||||
| // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> | // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> | ||||
| // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> | // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> | ||||
| // CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8> | // CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8> | ||||
| Context not available. | |||||
| return vfma_laneq_f64(a, b, v, 0); | return vfma_laneq_f64(a, b, v, 0); | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 { | // CHECK-LABEL: define noundef <1 x double> @test_vfms_laneq_f64(<1 x double> noundef %a, <1 x double> noundef %b, <2 x double> noundef %v) #1 { | ||||
| // CHECK: [[SUB:%.*]] = fneg <1 x double> %b | // CHECK: [[SUB:%.*]] = fneg <1 x double> %b | ||||
| // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> | // CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8> | ||||
| // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> | // CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8> | ||||
| Context not available. | |||||
| return vfms_laneq_f64(a, b, v, 0); | return vfms_laneq_f64(a, b, v, 0); | ||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 { | // CHECK-LABEL: define noundef i32 @test_vqdmullh_lane_s16(i16 noundef %a, <4 x i16> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 | // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 | ||||
| Context not available. | |||||
| return vqdmullh_lane_s16(a, b, 3); | return vqdmullh_lane_s16(a, b, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 { | // CHECK-LABEL: define noundef i64 @test_vqdmulls_lane_s32(i32 noundef %a, <2 x i32> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 | // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 | ||||
| // CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGET_LANE]]) | // CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGET_LANE]]) | ||||
| // CHECK: ret i64 [[VQDMULLS_S32_I]] | // CHECK: ret i64 [[VQDMULLS_S32_I]] | ||||
| Context not available. | |||||
| return vqdmulls_lane_s32(a, b, 1); | return vqdmulls_lane_s32(a, b, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 { | // CHECK-LABEL: define noundef i32 @test_vqdmullh_laneq_s16(i16 noundef %a, <8 x i16> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 | ||||
| Context not available. | |||||
| return vqdmullh_laneq_s16(a, b, 7); | return vqdmullh_laneq_s16(a, b, 7); | ||||
| } | } | ||||
| // CHECK-LABEL: define i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 { | // CHECK-LABEL: define noundef i64 @test_vqdmulls_laneq_s32(i32 noundef %a, <4 x i32> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 | ||||
| // CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGETQ_LANE]]) | // CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGETQ_LANE]]) | ||||
| // CHECK: ret i64 [[VQDMULLS_S32_I]] | // CHECK: ret i64 [[VQDMULLS_S32_I]] | ||||
| Context not available. | |||||
| return vqdmulls_laneq_s32(a, b, 3); | return vqdmulls_laneq_s32(a, b, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 { | // CHECK-LABEL: define noundef i16 @test_vqdmulhh_lane_s16(i16 noundef %a, <4 x i16> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 | // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 | ||||
| Context not available. | |||||
| return vqdmulhh_lane_s16(a, b, 3); | return vqdmulhh_lane_s16(a, b, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 { | // CHECK-LABEL: define noundef i32 @test_vqdmulhs_lane_s32(i32 noundef %a, <2 x i32> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 | // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 | ||||
| // CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGET_LANE]]) | // CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGET_LANE]]) | ||||
| // CHECK: ret i32 [[VQDMULHS_S32_I]] | // CHECK: ret i32 [[VQDMULHS_S32_I]] | ||||
| Context not available. | |||||
| } | } | ||||
| // CHECK-LABEL: define i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 { | // CHECK-LABEL: define noundef i16 @test_vqdmulhh_laneq_s16(i16 noundef %a, <8 x i16> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 | ||||
| Context not available. | |||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 { | // CHECK-LABEL: define noundef i32 @test_vqdmulhs_laneq_s32(i32 noundef %a, <4 x i32> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 | ||||
| // CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGETQ_LANE]]) | // CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGETQ_LANE]]) | ||||
| // CHECK: ret i32 [[VQDMULHS_S32_I]] | // CHECK: ret i32 [[VQDMULHS_S32_I]] | ||||
| Context not available. | |||||
| return vqdmulhs_laneq_s32(a, b, 3); | return vqdmulhs_laneq_s32(a, b, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 { | // CHECK-LABEL: define noundef i16 @test_vqrdmulhh_lane_s16(i16 noundef %a, <4 x i16> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 | // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0 | ||||
| Context not available. | |||||
| return vqrdmulhh_lane_s16(a, b, 3); | return vqrdmulhh_lane_s16(a, b, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 { | // CHECK-LABEL: define noundef i32 @test_vqrdmulhs_lane_s32(i32 noundef %a, <2 x i32> noundef %b) #0 { | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 | // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1 | ||||
| // CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGET_LANE]]) | // CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGET_LANE]]) | ||||
| // CHECK: ret i32 [[VQRDMULHS_S32_I]] | // CHECK: ret i32 [[VQRDMULHS_S32_I]] | ||||
| Context not available. | |||||
| } | } | ||||
| // CHECK-LABEL: define i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 { | // CHECK-LABEL: define noundef i16 @test_vqrdmulhh_laneq_s16(i16 noundef %a, <8 x i16> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0 | ||||
| Context not available. | |||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 { | // CHECK-LABEL: define noundef i32 @test_vqrdmulhs_laneq_s32(i32 noundef %a, <4 x i32> noundef %b) #1 { | ||||
| // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 | // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3 | ||||
| // CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGETQ_LANE]]) | // CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGETQ_LANE]]) | ||||
| // CHECK: ret i32 [[VQRDMULHS_S32_I]] | // CHECK: ret i32 [[VQRDMULHS_S32_I]] | ||||
| Context not available. | |||||
| return vqrdmulhs_laneq_s32(a, b, 3); | return vqrdmulhs_laneq_s32(a, b, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 { | // CHECK-LABEL: define noundef i32 @test_vqdmlalh_lane_s16(i32 noundef %a, i16 noundef %b, <4 x i16> noundef %c) #0 { | ||||
| // CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3 | // CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 | ||||
| Context not available. | |||||
| return vqdmlalh_lane_s16(a, b, c, 3); | return vqdmlalh_lane_s16(a, b, c, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 { | // CHECK-LABEL: define noundef i64 @test_vqdmlals_lane_s32(i64 noundef %a, i32 noundef %b, <2 x i32> noundef %c) #0 { | ||||
| // CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1 | // CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1 | ||||
| // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) | // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) | ||||
| // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]]) | // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]]) | ||||
| Context not available. | |||||
| return vqdmlals_lane_s32(a, b, c, 1); | return vqdmlals_lane_s32(a, b, c, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 { | // CHECK-LABEL: define noundef i32 @test_vqdmlalh_laneq_s16(i32 noundef %a, i16 noundef %b, <8 x i16> noundef %c) #1 { | ||||
| // CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7 | // CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 | ||||
| Context not available. | |||||
| return vqdmlalh_laneq_s16(a, b, c, 7); | return vqdmlalh_laneq_s16(a, b, c, 7); | ||||
| } | } | ||||
| // CHECK-LABEL: define i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 { | // CHECK-LABEL: define noundef i64 @test_vqdmlals_laneq_s32(i64 noundef %a, i32 noundef %b, <4 x i32> noundef %c) #1 { | ||||
| // CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3 | // CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3 | ||||
| // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) | // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) | ||||
| // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]]) | // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]]) | ||||
| Context not available. | |||||
| return vqdmlals_laneq_s32(a, b, c, 3); | return vqdmlals_laneq_s32(a, b, c, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 { | // CHECK-LABEL: define noundef i32 @test_vqdmlslh_lane_s16(i32 noundef %a, i16 noundef %b, <4 x i16> noundef %c) #0 { | ||||
| // CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3 | // CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 | ||||
| Context not available. | |||||
| return vqdmlslh_lane_s16(a, b, c, 3); | return vqdmlslh_lane_s16(a, b, c, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 { | // CHECK-LABEL: define noundef i64 @test_vqdmlsls_lane_s32(i64 noundef %a, i32 noundef %b, <2 x i32> noundef %c) #0 { | ||||
| // CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1 | // CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1 | ||||
| // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) | // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) | ||||
| // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]]) | // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]]) | ||||
| Context not available. | |||||
| return vqdmlsls_lane_s32(a, b, c, 1); | return vqdmlsls_lane_s32(a, b, c, 1); | ||||
| } | } | ||||
| // CHECK-LABEL: define i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 { | // CHECK-LABEL: define noundef i32 @test_vqdmlslh_laneq_s16(i32 noundef %a, i16 noundef %b, <8 x i16> noundef %c) #1 { | ||||
| // CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7 | // CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7 | ||||
| // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 | // CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0 | ||||
| // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 | // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0 | ||||
| Context not available. | |||||
| return vqdmlslh_laneq_s16(a, b, c, 7); | return vqdmlslh_laneq_s16(a, b, c, 7); | ||||
| } | } | ||||
| // CHECK-LABEL: define i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 { | // CHECK-LABEL: define noundef i64 @test_vqdmlsls_laneq_s32(i64 noundef %a, i32 noundef %b, <4 x i32> noundef %c) #1 { | ||||
| // CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3 | // CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3 | ||||
| // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) | // CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]]) | ||||
| // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]]) | // CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]]) | ||||
| Context not available. | |||||
| return vqdmlsls_laneq_s32(a, b, c, 3); | return vqdmlsls_laneq_s32(a, b, c, 3); | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64_0() #0 { | // CHECK-LABEL: define noundef <1 x double> @test_vmulx_lane_f64_0() #0 { | ||||
| // CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double> | // CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double> | ||||
| // CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double> | // CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double> | ||||
| // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0 | // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0 | ||||
| Context not available. | |||||
| return result; | return result; | ||||
| } | } | ||||
| // CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_2() #1 { | // CHECK-LABEL: define noundef <1 x double> @test_vmulx_laneq_f64_2() #1 { | ||||
| // CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double> | // CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double> | ||||
| // CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double> | // CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double> | ||||
| // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> [[TMP0]], <1 x double> [[TMP1]], <2 x i32> <i32 0, i32 1> | // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> [[TMP0]], <1 x double> [[TMP1]], <2 x i32> <i32 0, i32 1> | ||||
| Context not available. | |||||