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llvm/lib/Target/Sparc/SparcInstrInfo.td
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| // True when generating 32-bit code. | // True when generating 32-bit code. | ||||
| def Is32Bit : Predicate<"!Subtarget->is64Bit()">; | def Is32Bit : Predicate<"!Subtarget->is64Bit()">; | ||||
| // True when generating 64-bit code. This also implies HasV9. | // True when generating 64-bit code. This also implies HasV9. | ||||
| def Is64Bit : Predicate<"Subtarget->is64Bit()">; | def Is64Bit : Predicate<"Subtarget->is64Bit()">; | ||||
| def UseSoftMulDiv : Predicate<"Subtarget->useSoftMulDiv()">, | def UseSoftMulDiv : Predicate<"Subtarget->useSoftMulDiv()">, | ||||
| AssemblerPredicate<"FeatureSoftMulDiv">; | AssemblerPredicate<(all_of FeatureSoftMulDiv)>; | ||||
| // HasV9 - This predicate is true when the target processor supports V9 | // HasV9 - This predicate is true when the target processor supports V9 | ||||
| // instructions. Note that the machine may be running in 32-bit mode. | // instructions. Note that the machine may be running in 32-bit mode. | ||||
| def HasV9 : Predicate<"Subtarget->isV9()">, | def HasV9 : Predicate<"Subtarget->isV9()">, | ||||
| AssemblerPredicate<"FeatureV9">; | AssemblerPredicate<(all_of FeatureV9)>; | ||||
| // HasNoV9 - This predicate is true when the target doesn't have V9 | // HasNoV9 - This predicate is true when the target doesn't have V9 | ||||
| // instructions. Use of this is just a hack for the isel not having proper | // instructions. Use of this is just a hack for the isel not having proper | ||||
| // costs for V8 instructions that are more expensive than their V9 ones. | // costs for V8 instructions that are more expensive than their V9 ones. | ||||
| def HasNoV9 : Predicate<"!Subtarget->isV9()">; | def HasNoV9 : Predicate<"!Subtarget->isV9()">; | ||||
| // HasVIS - This is true when the target processor has VIS extensions. | // HasVIS - This is true when the target processor has VIS extensions. | ||||
| def HasVIS : Predicate<"Subtarget->isVIS()">, | def HasVIS : Predicate<"Subtarget->isVIS()">, | ||||
| AssemblerPredicate<"FeatureVIS">; | AssemblerPredicate<(all_of FeatureVIS)>; | ||||
| def HasVIS2 : Predicate<"Subtarget->isVIS2()">, | def HasVIS2 : Predicate<"Subtarget->isVIS2()">, | ||||
| AssemblerPredicate<"FeatureVIS2">; | AssemblerPredicate<(all_of FeatureVIS2)>; | ||||
| def HasVIS3 : Predicate<"Subtarget->isVIS3()">, | def HasVIS3 : Predicate<"Subtarget->isVIS3()">, | ||||
| AssemblerPredicate<"FeatureVIS3">; | AssemblerPredicate<(all_of FeatureVIS3)>; | ||||
| // HasHardQuad - This is true when the target processor supports quad floating | // HasHardQuad - This is true when the target processor supports quad floating | ||||
| // point instructions. | // point instructions. | ||||
| def HasHardQuad : Predicate<"Subtarget->hasHardQuad()">; | def HasHardQuad : Predicate<"Subtarget->hasHardQuad()">; | ||||
| // HasLeonCASA - This is true when the target processor supports the CASA | // HasLeonCASA - This is true when the target processor supports the CASA | ||||
| // instruction | // instruction | ||||
| def HasLeonCASA : Predicate<"Subtarget->hasLeonCasa()">; | def HasLeonCASA : Predicate<"Subtarget->hasLeonCasa()">; | ||||
| // HasPWRPSR - This is true when the target processor supports partial | // HasPWRPSR - This is true when the target processor supports partial | ||||
| // writes to the PSR register that only affects the ET field. | // writes to the PSR register that only affects the ET field. | ||||
| def HasPWRPSR : Predicate<"Subtarget->hasPWRPSR()">, | def HasPWRPSR : Predicate<"Subtarget->hasPWRPSR()">, | ||||
| AssemblerPredicate<"FeaturePWRPSR">; | AssemblerPredicate<(all_of FeaturePWRPSR)>; | ||||
| // HasUMAC_SMAC - This is true when the target processor supports the | // HasUMAC_SMAC - This is true when the target processor supports the | ||||
| // UMAC and SMAC instructions | // UMAC and SMAC instructions | ||||
| def HasUMAC_SMAC : Predicate<"Subtarget->hasUmacSmac()">; | def HasUMAC_SMAC : Predicate<"Subtarget->hasUmacSmac()">; | ||||
| def HasNoFdivSqrtFix : Predicate<"!Subtarget->fixAllFDIVSQRT()">; | def HasNoFdivSqrtFix : Predicate<"!Subtarget->fixAllFDIVSQRT()">; | ||||
| def HasFMULS : Predicate<"!Subtarget->hasNoFMULS()">; | def HasFMULS : Predicate<"!Subtarget->hasNoFMULS()">; | ||||
| def HasFSMULD : Predicate<"!Subtarget->hasNoFSMULD()">; | def HasFSMULD : Predicate<"!Subtarget->hasNoFSMULD()">; | ||||
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