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llvm/lib/Target/Mips/Mips.td
| Show First 20 Lines • Show All 48 Lines • ▼ Show 20 Lines | |||||
| } | } | ||||
| // Like Requires<> but for the AdditionalPredicates list | // Like Requires<> but for the AdditionalPredicates list | ||||
| class AdditionalRequires<list<Predicate> preds> { | class AdditionalRequires<list<Predicate> preds> { | ||||
| list<Predicate> AdditionalPredicates = preds; | list<Predicate> AdditionalPredicates = preds; | ||||
| } | } | ||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| // Register File, Calling Conv, Instruction Descriptions | |||||
| //===----------------------------------------------------------------------===// | |||||
| include "MipsRegisterInfo.td" | |||||
| include "MipsSchedule.td" | |||||
| include "MipsInstrInfo.td" | |||||
| include "MipsCallingConv.td" | |||||
| include "MipsRegisterBanks.td" | |||||
| // Avoid forward declaration issues. | |||||
| include "MipsScheduleP5600.td" | |||||
| include "MipsScheduleGeneric.td" | |||||
| def MipsInstrInfo : InstrInfo; | |||||
| //===----------------------------------------------------------------------===// | |||||
| // Mips Subtarget features // | // Mips Subtarget features // | ||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| def FeatureNoABICalls : SubtargetFeature<"noabicalls", "NoABICalls", "true", | def FeatureNoABICalls : SubtargetFeature<"noabicalls", "NoABICalls", "true", | ||||
| "Disable SVR4-style position-independent code">; | "Disable SVR4-style position-independent code">; | ||||
| def FeaturePTR64Bit : SubtargetFeature<"ptr64", "IsPTR64bit", "true", | def FeaturePTR64Bit : SubtargetFeature<"ptr64", "IsPTR64bit", "true", | ||||
| "Pointers are 64-bit wide">; | "Pointers are 64-bit wide">; | ||||
| def FeatureGP64Bit : SubtargetFeature<"gp64", "IsGP64bit", "true", | def FeatureGP64Bit : SubtargetFeature<"gp64", "IsGP64bit", "true", | ||||
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| def FeatureXGOT | def FeatureXGOT | ||||
| : SubtargetFeature<"xgot", "UseXGOT", "true", "Assume 32-bit GOT">; | : SubtargetFeature<"xgot", "UseXGOT", "true", "Assume 32-bit GOT">; | ||||
| def FeatureUseIndirectJumpsHazard : SubtargetFeature<"use-indirect-jump-hazard", | def FeatureUseIndirectJumpsHazard : SubtargetFeature<"use-indirect-jump-hazard", | ||||
| "UseIndirectJumpsHazard", | "UseIndirectJumpsHazard", | ||||
| "true", "Use indirect jump" | "true", "Use indirect jump" | ||||
| " guards to prevent certain speculation based attacks">; | " guards to prevent certain speculation based attacks">; | ||||
| //===----------------------------------------------------------------------===// | |||||
| // Register File, Calling Conv, Instruction Descriptions | |||||
| //===----------------------------------------------------------------------===// | |||||
| include "MipsRegisterInfo.td" | |||||
| include "MipsSchedule.td" | |||||
| include "MipsInstrInfo.td" | |||||
| include "MipsCallingConv.td" | |||||
| include "MipsRegisterBanks.td" | |||||
| // Avoid forward declaration issues. | |||||
| include "MipsScheduleP5600.td" | |||||
| include "MipsScheduleGeneric.td" | |||||
| def MipsInstrInfo : InstrInfo; | |||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| // Mips processors supported. | // Mips processors supported. | ||||
| //===----------------------------------------------------------------------===// | //===----------------------------------------------------------------------===// | ||||
| def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl", | def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl", | ||||
| "MipsSubtarget::CPU::P5600", | "MipsSubtarget::CPU::P5600", | ||||
| "The P5600 Processor", [FeatureMips32r5]>; | "The P5600 Processor", [FeatureMips32r5]>; | ||||
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