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llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
| Show First 20 Lines • Show All 113 Lines • ▼ Show 20 Lines | unsigned AArch64InstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { | ||||
| case AArch64::JumpTableDest32: | case AArch64::JumpTableDest32: | ||||
| case AArch64::JumpTableDest16: | case AArch64::JumpTableDest16: | ||||
| case AArch64::JumpTableDest8: | case AArch64::JumpTableDest8: | ||||
| NumBytes = 12; | NumBytes = 12; | ||||
| break; | break; | ||||
| case AArch64::SPACE: | case AArch64::SPACE: | ||||
| NumBytes = MI.getOperand(1).getImm(); | NumBytes = MI.getOperand(1).getImm(); | ||||
| break; | break; | ||||
| case TargetOpcode::BUNDLE: | |||||
| NumBytes = getInstBundleLength(MI); | |||||
| break; | |||||
| } | } | ||||
| return NumBytes; | return NumBytes; | ||||
| } | } | ||||
| unsigned AArch64InstrInfo::getInstBundleLength(const MachineInstr &MI) const { | |||||
| unsigned Size = 0; | |||||
| MachineBasicBlock::const_instr_iterator I = MI.getIterator(); | |||||
| MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end(); | |||||
| while (++I != E && I->isInsideBundle()) { | |||||
| assert(!I->isBundle() && "No nested bundle!"); | |||||
| Size += getInstSizeInBytes(*I); | |||||
| } | |||||
| return Size; | |||||
| } | |||||
| static void parseCondBranch(MachineInstr *LastInst, MachineBasicBlock *&Target, | static void parseCondBranch(MachineInstr *LastInst, MachineBasicBlock *&Target, | ||||
| SmallVectorImpl<MachineOperand> &Cond) { | SmallVectorImpl<MachineOperand> &Cond) { | ||||
| // Block ends with fall-through condbranch. | // Block ends with fall-through condbranch. | ||||
| switch (LastInst->getOpcode()) { | switch (LastInst->getOpcode()) { | ||||
| default: | default: | ||||
| llvm_unreachable("Unknown branch instruction?"); | llvm_unreachable("Unknown branch instruction?"); | ||||
| case AArch64::Bcc: | case AArch64::Bcc: | ||||
| Target = LastInst->getOperand(1).getMBB(); | Target = LastInst->getOperand(1).getMBB(); | ||||
| ▲ Show 20 Lines • Show All 6,540 Lines • ▼ Show 20 Lines | AArch64InstrInfo::describeLoadedValue(const MachineInstr &MI, | ||||
| case AArch64::ORRWrs: | case AArch64::ORRWrs: | ||||
| case AArch64::ORRXrs: | case AArch64::ORRXrs: | ||||
| return describeORRLoadedValue(MI, Reg, this, TRI); | return describeORRLoadedValue(MI, Reg, this, TRI); | ||||
| } | } | ||||
| return TargetInstrInfo::describeLoadedValue(MI, Reg); | return TargetInstrInfo::describeLoadedValue(MI, Reg); | ||||
| } | } | ||||
| uint64_t AArch64InstrInfo::getElementSizeForOpcode(unsigned Opc) const { | |||||
| return get(Opc).TSFlags & AArch64::ElementSizeMask; | |||||
| } | |||||
| #define GET_INSTRINFO_HELPERS | #define GET_INSTRINFO_HELPERS | ||||
| #define GET_INSTRMAP_INFO | |||||
| #include "AArch64GenInstrInfo.inc" | #include "AArch64GenInstrInfo.inc" | ||||