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Differential D74594 Diff 244599 llvm/test/CodeGen/AMDGPU/urem64.ll

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llvm/test/CodeGen/AMDGPU/urem64.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s ; RUN: llc -march=amdgcn -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
define amdgpu_kernel void @s_test_urem_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) { define amdgpu_kernel void @s_test_urem_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
; GCN-LABEL: s_test_urem_i64: ; GCN-LABEL: s_test_urem_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0xd
; GCN-NEXT: v_mov_b32_e32 v2, 0
; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
; GCN-NEXT: s_mov_b32 s7, 0xf000 ; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: s_mov_b32 s6, -1 ; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: v_mov_b32_e32 v0, 0
; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s12
; GCN-NEXT: v_cvt_f32_u32_e32 v1, s13
; GCN-NEXT: s_sub_u32 s2, 0, s12
; GCN-NEXT: s_subb_u32 s3, 0, s13
; GCN-NEXT: s_mov_b32 s4, s8 ; GCN-NEXT: s_mov_b32 s4, s8
; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
; GCN-NEXT: v_rcp_f32_e32 v0, v0
; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: s_mov_b32 s5, s9 ; GCN-NEXT: s_mov_b32 s5, s9
; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2 ; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
; GCN-NEXT: v_cvt_f32_u32_e32 v3, s3 ; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v0
; GCN-NEXT: s_sub_u32 s8, 0, s2
; GCN-NEXT: v_mov_b32_e32 v4, s3
; GCN-NEXT: v_mov_b32_e32 v5, s11
; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3
; GCN-NEXT: s_subb_u32 s9, 0, s3
; GCN-NEXT: v_rcp_f32_e32 v2, v2
; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
; GCN-NEXT: v_trunc_f32_e32 v3, v3 ; GCN-NEXT: v_trunc_f32_e32 v3, v3
; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 ; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v3
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 ; GCN-NEXT: v_mul_hi_u32 v5, s2, v0
; GCN-NEXT: v_mul_lo_u32 v6, s8, v3 ; GCN-NEXT: v_mul_lo_u32 v4, s2, v3
; GCN-NEXT: v_mul_lo_u32 v7, s9, v2 ; GCN-NEXT: v_mul_lo_u32 v7, s3, v0
; GCN-NEXT: v_mul_hi_u32 v8, s8, v2 ; GCN-NEXT: v_mul_lo_u32 v6, s2, v0
; GCN-NEXT: v_mul_lo_u32 v9, s8, v2 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v7
; GCN-NEXT: v_mul_hi_u32 v8, v2, v9 ; GCN-NEXT: v_mul_hi_u32 v5, v0, v6
; GCN-NEXT: v_mul_hi_u32 v10, v3, v9 ; GCN-NEXT: v_mul_lo_u32 v7, v0, v4
; GCN-NEXT: v_mul_lo_u32 v9, v3, v9 ; GCN-NEXT: v_mul_hi_u32 v9, v0, v4
; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7 ; GCN-NEXT: v_mul_lo_u32 v8, v3, v6
; GCN-NEXT: v_mul_hi_u32 v7, v2, v6 ; GCN-NEXT: v_mul_hi_u32 v6, v3, v6
; GCN-NEXT: v_mul_lo_u32 v11, v2, v6 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7
; GCN-NEXT: v_mul_hi_u32 v12, v3, v6 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v2, v9, vcc
; GCN-NEXT: v_mul_lo_u32 v6, v3, v6 ; GCN-NEXT: v_mul_hi_u32 v9, v3, v4
; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v11 ; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v7, vcc ; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v6, vcc
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v10, vcc ; GCN-NEXT: v_addc_u32_e32 v6, vcc, v9, v1, vcc
; GCN-NEXT: v_addc_u32_e32 v8, vcc, v12, v0, vcc ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v4
; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
; GCN-NEXT: v_mul_lo_u32 v6, s2, v4
; GCN-NEXT: v_mul_hi_u32 v7, s2, v0
; GCN-NEXT: v_mul_lo_u32 v8, s3, v0
; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v8, vcc ; GCN-NEXT: v_mul_lo_u32 v7, s2, v0
; GCN-NEXT: v_add_i32_e64 v2, s[0:1], v2, v6
; GCN-NEXT: v_addc_u32_e64 v6, vcc, v3, v7, s[0:1]
; GCN-NEXT: v_mul_hi_u32 v8, s8, v2
; GCN-NEXT: v_mul_lo_u32 v9, s9, v2
; GCN-NEXT: v_mul_lo_u32 v10, s8, v2
; GCN-NEXT: v_mul_lo_u32 v11, s8, v6
; GCN-NEXT: v_mul_hi_u32 v12, v6, v10
; GCN-NEXT: v_mul_lo_u32 v13, v6, v10
; GCN-NEXT: v_mul_hi_u32 v10, v2, v10
; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v11
; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
; GCN-NEXT: v_mul_hi_u32 v9, v6, v8
; GCN-NEXT: v_mul_hi_u32 v11, v2, v8
; GCN-NEXT: v_mul_lo_u32 v14, v2, v8
; GCN-NEXT: v_mul_lo_u32 v6, v6, v8
; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v14
; GCN-NEXT: v_addc_u32_e32 v10, vcc, v1, v11, vcc
; GCN-NEXT: v_add_i32_e32 v8, vcc, v13, v8
; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v12, vcc
; GCN-NEXT: v_addc_u32_e32 v9, vcc, v9, v0, vcc
; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7
; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v9, vcc ; GCN-NEXT: v_mul_lo_u32 v10, v0, v6
; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v7, s[0:1] ; GCN-NEXT: v_mul_hi_u32 v12, v0, v6
; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6 ; GCN-NEXT: v_mul_hi_u32 v11, v0, v7
; GCN-NEXT: v_mul_hi_u32 v9, v4, v7
; GCN-NEXT: v_mul_lo_u32 v7, v4, v7
; GCN-NEXT: v_mul_hi_u32 v8, v4, v6
; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
; GCN-NEXT: v_addc_u32_e32 v11, vcc, v2, v12, vcc
; GCN-NEXT: v_mul_lo_u32 v4, v4, v6
; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v9, vcc
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v1, vcc
; GCN-NEXT: v_add_i32_e32 v4, vcc, v7, v4
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v6, vcc
; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; GCN-NEXT: v_mul_hi_u32 v6, s10, v2 ; GCN-NEXT: v_mul_lo_u32 v4, s10, v3
; GCN-NEXT: v_mul_hi_u32 v7, s11, v2 ; GCN-NEXT: v_mul_hi_u32 v5, s10, v0
; GCN-NEXT: v_mul_lo_u32 v2, s11, v2 ; GCN-NEXT: v_mul_hi_u32 v6, s10, v3
; GCN-NEXT: v_mul_hi_u32 v8, s10, v3 ; GCN-NEXT: v_mul_hi_u32 v7, s11, v3
; GCN-NEXT: v_mul_lo_u32 v9, s10, v3
; GCN-NEXT: v_mul_hi_u32 v10, s11, v3
; GCN-NEXT: v_mul_lo_u32 v3, s11, v3 ; GCN-NEXT: v_mul_lo_u32 v3, s11, v3
; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v9 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
; GCN-NEXT: v_addc_u32_e32 v8, vcc, v1, v8, vcc ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6 ; GCN-NEXT: v_mul_lo_u32 v6, s11, v0
; GCN-NEXT: v_addc_u32_e32 v2, vcc, v8, v7, vcc ; GCN-NEXT: v_mul_hi_u32 v0, s11, v0
; GCN-NEXT: v_addc_u32_e32 v0, vcc, v10, v0, vcc ; GCN-NEXT: v_add_i32_e32 v4, vcc, v6, v4
; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3 ; GCN-NEXT: v_addc_u32_e32 v0, vcc, v5, v0, vcc
; GCN-NEXT: v_addc_u32_e32 v0, vcc, v1, v0, vcc ; GCN-NEXT: v_addc_u32_e32 v1, vcc, v7, v1, vcc
; GCN-NEXT: v_mul_hi_u32 v1, s2, v2
; GCN-NEXT: v_mul_lo_u32 v3, s3, v2
; GCN-NEXT: v_mul_lo_u32 v2, s2, v2
; GCN-NEXT: v_mul_lo_u32 v0, s2, v0
; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0
; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3
; GCN-NEXT: v_sub_i32_e32 v1, vcc, s11, v0 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, v2, v1, vcc
; GCN-NEXT: v_sub_i32_e32 v2, vcc, s10, v2 ; GCN-NEXT: v_mul_lo_u32 v1, s12, v1
; GCN-NEXT: v_subb_u32_e64 v1, s[0:1], v1, v4, vcc ; GCN-NEXT: v_mul_hi_u32 v2, s12, v0
; GCN-NEXT: v_subb_u32_e32 v0, vcc, v5, v0, vcc ; GCN-NEXT: v_mul_lo_u32 v3, s13, v0
; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v2 ; GCN-NEXT: v_mul_lo_u32 v0, s12, v0
; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
; GCN-NEXT: v_sub_i32_e32 v2, vcc, s11, v1
; GCN-NEXT: v_mov_b32_e32 v3, s13
; GCN-NEXT: v_sub_i32_e32 v0, vcc, s10, v0
; GCN-NEXT: v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
; GCN-NEXT: v_subrev_i32_e64 v4, s[0:1], s12, v0
; GCN-NEXT: v_subb_u32_e64 v3, s[2:3], v2, v3, s[0:1]
; GCN-NEXT: v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s13, v2
; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s12, v4
; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s13, v2
; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[0:1]
; GCN-NEXT: v_subrev_i32_e64 v6, s[0:1], s12, v4
; GCN-NEXT: v_subbrev_u32_e64 v3, s[0:1], 0, v3, s[0:1]
; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]
; GCN-NEXT: v_mov_b32_e32 v3, s11
; GCN-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc
; GCN-NEXT: v_cmp_le_u32_e32 vcc, s13, v1
; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc ; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc
; GCN-NEXT: v_subrev_i32_e32 v5, vcc, s2, v2 ; GCN-NEXT: v_cmp_le_u32_e32 vcc, s12, v0
; GCN-NEXT: v_subb_u32_e64 v4, s[0:1], v1, v4, vcc ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
; GCN-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s13, v1
; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v5 ; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3
; GCN-NEXT: v_subrev_i32_e32 v7, vcc, s2, v5 ; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v0 ; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v6, s[0:1]
; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[0:1] ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v1
; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[0:1]
; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v0
; GCN-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1
; GCN-NEXT: v_cndmask_b32_e32 v6, v9, v6, vcc
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6
; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v3
; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v1, s[0:1]
; GCN-NEXT: v_cndmask_b32_e32 v0, v5, v7, vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%result = urem i64 %x, %y %result = urem i64 %x, %y
store i64 %result, i64 addrspace(1)* %out store i64 %result, i64 addrspace(1)* %out
ret void ret void
} }
define i64 @v_test_urem_i64(i64 %x, i64 %y) { define i64 @v_test_urem_i64(i64 %x, i64 %y) {
; GCN-LABEL: v_test_urem_i64: ; GCN-LABEL: v_test_urem_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2 ; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2
; GCN-NEXT: v_cvt_f32_u32_e32 v5, v3 ; GCN-NEXT: v_cvt_f32_u32_e32 v5, v3
; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v2 ; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v2
; GCN-NEXT: v_subb_u32_e32 v7, vcc, 0, v3, vcc ; GCN-NEXT: v_subb_u32_e32 v7, vcc, 0, v3, vcc
; GCN-NEXT: v_mov_b32_e32 v8, 0 ; GCN-NEXT: v_mov_b32_e32 v14, 0
; GCN-NEXT: v_mov_b32_e32 v9, 0
; GCN-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 ; GCN-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5
; GCN-NEXT: v_rcp_f32_e32 v4, v4 ; GCN-NEXT: v_rcp_f32_e32 v4, v4
; GCN-NEXT: v_mov_b32_e32 v13, 0
; GCN-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 ; GCN-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4
; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 ; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4
; GCN-NEXT: v_trunc_f32_e32 v5, v5 ; GCN-NEXT: v_trunc_f32_e32 v5, v5
; GCN-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 ; GCN-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5
; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5
; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4 ; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4
; GCN-NEXT: v_mul_lo_u32 v10, v6, v5 ; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5
; GCN-NEXT: v_mul_lo_u32 v11, v7, v4 ; GCN-NEXT: v_mul_hi_u32 v8, v6, v4
; GCN-NEXT: v_mul_hi_u32 v12, v6, v4 ; GCN-NEXT: v_mul_lo_u32 v9, v6, v5
; GCN-NEXT: v_mul_lo_u32 v13, v6, v4 ; GCN-NEXT: v_mul_lo_u32 v10, v7, v4
; GCN-NEXT: v_add_i32_e32 v10, vcc, v12, v10 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v9
; GCN-NEXT: v_mul_hi_u32 v12, v4, v13 ; GCN-NEXT: v_mul_lo_u32 v9, v6, v4
; GCN-NEXT: v_mul_hi_u32 v14, v5, v13 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v10
; GCN-NEXT: v_mul_lo_u32 v13, v5, v13 ; GCN-NEXT: v_mul_lo_u32 v11, v4, v8
; GCN-NEXT: v_add_i32_e32 v10, vcc, v10, v11 ; GCN-NEXT: v_mul_hi_u32 v10, v4, v8
; GCN-NEXT: v_mul_hi_u32 v11, v4, v10 ; GCN-NEXT: v_mul_hi_u32 v12, v4, v9
; GCN-NEXT: v_mul_lo_u32 v15, v4, v10 ; GCN-NEXT: v_mul_hi_u32 v15, v5, v8
; GCN-NEXT: v_mul_hi_u32 v16, v5, v10 ; GCN-NEXT: v_mul_lo_u32 v8, v5, v8
; GCN-NEXT: v_mul_lo_u32 v10, v5, v10 ; GCN-NEXT: v_add_i32_e32 v11, vcc, v12, v11
; GCN-NEXT: v_add_i32_e32 v12, vcc, v12, v15 ; GCN-NEXT: v_mul_lo_u32 v12, v5, v9
; GCN-NEXT: v_addc_u32_e32 v11, vcc, v9, v11, vcc ; GCN-NEXT: v_mul_hi_u32 v9, v5, v9
; GCN-NEXT: v_add_i32_e32 v12, vcc, v13, v12 ; GCN-NEXT: v_addc_u32_e32 v10, vcc, v14, v10, vcc
; GCN-NEXT: v_addc_u32_e32 v11, vcc, v11, v14, vcc ; GCN-NEXT: v_add_i32_e32 v11, vcc, v12, v11
; GCN-NEXT: v_addc_u32_e32 v12, vcc, v16, v8, vcc ; GCN-NEXT: v_addc_u32_e32 v9, vcc, v10, v9, vcc
; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10 ; GCN-NEXT: v_addc_u32_e32 v10, vcc, v15, v13, vcc
; GCN-NEXT: v_addc_u32_e32 v11, vcc, v9, v12, vcc ; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
; GCN-NEXT: v_add_i32_e64 v4, s[4:5], v4, v10 ; GCN-NEXT: v_add_i32_e64 v4, s[4:5], v4, v8
; GCN-NEXT: v_addc_u32_e64 v10, vcc, v5, v11, s[4:5] ; GCN-NEXT: v_addc_u32_e32 v9, vcc, v14, v10, vcc
; GCN-NEXT: v_mul_hi_u32 v12, v6, v4 ; GCN-NEXT: v_addc_u32_e64 v8, vcc, v5, v9, s[4:5]
; GCN-NEXT: v_mul_lo_u32 v10, v6, v8
; GCN-NEXT: v_mul_hi_u32 v11, v6, v4
; GCN-NEXT: v_mul_lo_u32 v7, v7, v4 ; GCN-NEXT: v_mul_lo_u32 v7, v7, v4
; GCN-NEXT: v_mul_lo_u32 v13, v6, v4 ; GCN-NEXT: v_mul_lo_u32 v6, v6, v4
; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v11 ; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
; GCN-NEXT: v_mul_lo_u32 v6, v6, v10 ; GCN-NEXT: v_add_i32_e32 v7, vcc, v10, v7
; GCN-NEXT: v_mul_hi_u32 v11, v10, v13 ; GCN-NEXT: v_mul_lo_u32 v12, v4, v7
; GCN-NEXT: v_mul_lo_u32 v14, v10, v13 ; GCN-NEXT: v_mul_hi_u32 v15, v4, v6
; GCN-NEXT: v_mul_hi_u32 v13, v4, v13 ; GCN-NEXT: v_mul_hi_u32 v16, v4, v7
; GCN-NEXT: v_add_i32_e32 v6, vcc, v12, v6 ; GCN-NEXT: v_mul_hi_u32 v11, v8, v6
; GCN-NEXT: v_mul_lo_u32 v6, v8, v6
; GCN-NEXT: v_add_i32_e32 v12, vcc, v15, v12
; GCN-NEXT: v_mul_hi_u32 v10, v8, v7
; GCN-NEXT: v_addc_u32_e32 v15, vcc, v14, v16, vcc
; GCN-NEXT: v_mul_lo_u32 v7, v8, v7
; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v12
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v15, v11, vcc
; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v13, vcc
; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7
; GCN-NEXT: v_mul_hi_u32 v7, v10, v6 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v14, v8, vcc
; GCN-NEXT: v_mul_hi_u32 v12, v4, v6 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v9
; GCN-NEXT: v_mul_lo_u32 v15, v4, v6
; GCN-NEXT: v_mul_lo_u32 v6, v10, v6
; GCN-NEXT: v_add_i32_e32 v10, vcc, v13, v15
; GCN-NEXT: v_addc_u32_e32 v12, vcc, v9, v12, vcc
; GCN-NEXT: v_add_i32_e32 v10, vcc, v14, v10
; GCN-NEXT: v_addc_u32_e32 v10, vcc, v12, v11, vcc
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v8, vcc
; GCN-NEXT: v_add_i32_e32 v6, vcc, v10, v6
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v9, v7, vcc
; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5] ; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5]
; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-NEXT: v_mul_hi_u32 v6, v0, v4 ; GCN-NEXT: v_mul_lo_u32 v6, v0, v5
; GCN-NEXT: v_mul_hi_u32 v7, v1, v4 ; GCN-NEXT: v_mul_hi_u32 v7, v0, v4
; GCN-NEXT: v_mul_lo_u32 v4, v1, v4 ; GCN-NEXT: v_mul_hi_u32 v8, v0, v5
; GCN-NEXT: v_mul_hi_u32 v10, v0, v5 ; GCN-NEXT: v_mul_hi_u32 v9, v1, v5
; GCN-NEXT: v_mul_lo_u32 v11, v0, v5
; GCN-NEXT: v_mul_hi_u32 v12, v1, v5
; GCN-NEXT: v_mul_lo_u32 v5, v1, v5 ; GCN-NEXT: v_mul_lo_u32 v5, v1, v5
; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v11 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
; GCN-NEXT: v_addc_u32_e32 v10, vcc, v9, v10, vcc ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v14, v8, vcc
; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6 ; GCN-NEXT: v_mul_lo_u32 v8, v1, v4
; GCN-NEXT: v_addc_u32_e32 v4, vcc, v10, v7, vcc ; GCN-NEXT: v_mul_hi_u32 v4, v1, v4
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v12, v8, vcc ; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6
; GCN-NEXT: v_addc_u32_e32 v4, vcc, v7, v4, vcc
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v9, v13, vcc
; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
; GCN-NEXT: v_addc_u32_e32 v5, vcc, v9, v6, vcc ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v14, v6, vcc
; GCN-NEXT: v_mul_lo_u32 v5, v2, v5
; GCN-NEXT: v_mul_hi_u32 v6, v2, v4 ; GCN-NEXT: v_mul_hi_u32 v6, v2, v4
; GCN-NEXT: v_mul_lo_u32 v7, v3, v4 ; GCN-NEXT: v_mul_lo_u32 v7, v3, v4
; GCN-NEXT: v_mul_lo_u32 v4, v2, v4 ; GCN-NEXT: v_mul_lo_u32 v4, v2, v4
; GCN-NEXT: v_mul_lo_u32 v5, v2, v5
; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5
; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7
; GCN-NEXT: v_sub_i32_e32 v6, vcc, v1, v5 ; GCN-NEXT: v_sub_i32_e32 v6, vcc, v1, v5
; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4
; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v6, v3, vcc ; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v6, v3, vcc
; GCN-NEXT: v_sub_i32_e64 v6, s[4:5], v0, v2
; GCN-NEXT: v_subb_u32_e64 v7, s[6:7], v4, v3, s[4:5]
; GCN-NEXT: v_subbrev_u32_e64 v4, s[4:5], 0, v4, s[4:5]
; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc ; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc
; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2
; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
; GCN-NEXT: v_sub_i32_e32 v6, vcc, v0, v2
; GCN-NEXT: v_subb_u32_e64 v7, s[4:5], v4, v3, vcc
; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc
; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v2
; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc
; GCN-NEXT: v_sub_i32_e32 v2, vcc, v6, v2
; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v1, v3
; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5]
; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3
; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] ; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5]
; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v3 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v2
; GCN-NEXT: v_cndmask_b32_e64 v5, v9, v5, s[4:5] ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3
; GCN-NEXT: v_subbrev_u32_e32 v7, vcc, 0, v7, vcc ; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5]
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v4, v3 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v4, v3
; GCN-NEXT: v_cndmask_b32_e32 v3, v10, v8, vcc ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2
; GCN-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc ; GCN-NEXT: v_cndmask_b32_e64 v8, v8, v9, s[4:5]
; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5 ; GCN-NEXT: v_sub_i32_e64 v9, s[4:5], v6, v2
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] ; GCN-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc
; GCN-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3
; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5] ; GCN-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc
; GCN-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v8
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2
; GCN-NEXT: v_subbrev_u32_e64 v2, s[4:5], 0, v7, s[4:5]
; GCN-NEXT: v_cndmask_b32_e64 v6, v6, v9, s[6:7]
; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v2, s[6:7]
; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc
; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GCN-NEXT: s_setpc_b64 s[30:31] ; GCN-NEXT: s_setpc_b64 s[30:31]
%result = urem i64 %x, %y %result = urem i64 %x, %y
ret i64 %result ret i64 %result
} }
define amdgpu_kernel void @s_test_urem31_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) { define amdgpu_kernel void @s_test_urem31_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
; GCN-LABEL: s_test_urem31_i64: ; GCN-LABEL: s_test_urem31_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN-NEXT: s_load_dword s2, s[0:1], 0xe ; GCN-NEXT: s_load_dword s2, s[0:1], 0xe
; GCN-NEXT: s_mov_b32 s11, 0xf000 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN-NEXT: s_mov_b32 s10, -1
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_mov_b32 s8, s4 ; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: s_mov_b32 s9, s5 ; GCN-NEXT: s_lshr_b32 s8, s2, 1
; GCN-NEXT: s_lshr_b32 s3, s7, 1 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
; GCN-NEXT: s_lshr_b32 s4, s2, 1 ; GCN-NEXT: s_lshr_b32 s0, s7, 1
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s4 ; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 ; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 ; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_mul_hi_u32 v1, v0, s4 ; GCN-NEXT: v_mul_lo_u32 v1, v0, s8
; GCN-NEXT: v_mul_lo_u32 v2, v0, s4 ; GCN-NEXT: v_mul_hi_u32 v2, v0, s8
; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 ; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v2
; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[2:3]
; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 ; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[2:3]
; GCN-NEXT: v_mul_hi_u32 v0, v0, s3 ; GCN-NEXT: v_mul_hi_u32 v0, v0, s0
; GCN-NEXT: v_mul_lo_u32 v0, v0, s4 ; GCN-NEXT: v_mul_lo_u32 v0, v0, s8
; GCN-NEXT: v_sub_i32_e32 v1, vcc, s3, v0 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, s0, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, s4, v1 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s0, v0
; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s3, v0 ; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s4, v1 ; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v1
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s4, v1 ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v1
; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] ; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
; GCN-NEXT: v_mov_b32_e32 v1, 0 ; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%1 = lshr i64 %x, 33 %1 = lshr i64 %x, 33
%2 = lshr i64 %y, 33 %2 = lshr i64 %y, 33
%result = urem i64 %1, %2 %result = urem i64 %1, %2
store i64 %result, i64 addrspace(1)* %out store i64 %result, i64 addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @s_test_urem31_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) { define amdgpu_kernel void @s_test_urem31_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) {
; GCN-LABEL: s_test_urem31_v2i64: ; GCN-LABEL: s_test_urem31_v2i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x9
; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0xd
; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x11 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x11
; GCN-NEXT: s_mov_b32 s11, 0xf000
; GCN-NEXT: s_mov_b32 s10, -1
; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s4, s13, 1 ; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: s_lshr_b32 s6, s15, 1 ; GCN-NEXT: s_lshr_b32 s9, s7, 1
; GCN-NEXT: s_lshr_b32 s12, s5, 1 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s9
; GCN-NEXT: s_lshr_b32 s5, s7, 1 ; GCN-NEXT: s_lshr_b32 s10, s5, 1
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s5 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, s10
; GCN-NEXT: v_cvt_f32_u32_e32 v2, s12 ; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0xd
; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 ; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v2 ; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1
; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 ; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
; GCN-NEXT: v_mul_f32_e32 v2, 0x4f800000, v2
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_mul_hi_u32 v3, v0, s5 ; GCN-NEXT: s_lshr_b32 s8, s1, 1
; GCN-NEXT: v_mul_lo_u32 v4, v0, s5 ; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1
; GCN-NEXT: v_mul_hi_u32 v5, v2, s12 ; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
; GCN-NEXT: v_mul_lo_u32 v6, v2, s12 ; GCN-NEXT: v_mul_lo_u32 v2, v0, s9
; GCN-NEXT: v_sub_i32_e32 v7, vcc, 0, v4 ; GCN-NEXT: v_mul_hi_u32 v3, v0, s9
; GCN-NEXT: v_sub_i32_e32 v8, vcc, 0, v6 ; GCN-NEXT: s_lshr_b32 s2, s3, 1
; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v2
; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v3 ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v3
; GCN-NEXT: v_cndmask_b32_e64 v3, v4, v7, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1]
; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v5 ; GCN-NEXT: v_mul_hi_u32 v2, v2, v0
; GCN-NEXT: v_cndmask_b32_e64 v4, v6, v8, s[2:3] ; GCN-NEXT: v_mul_lo_u32 v3, v1, s10
; GCN-NEXT: v_mul_hi_u32 v3, v3, v0 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v2, v0
; GCN-NEXT: v_mul_hi_u32 v4, v4, v2 ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v2, v0
; GCN-NEXT: v_add_i32_e32 v5, vcc, v3, v0 ; GCN-NEXT: v_mul_hi_u32 v2, v1, s10
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v3, v0 ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v2 ; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
; GCN-NEXT: v_subrev_i32_e32 v2, vcc, v4, v2 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[0:1] ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[2:3] ; GCN-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[0:1]
; GCN-NEXT: v_mul_hi_u32 v0, v0, s6 ; GCN-NEXT: v_mul_lo_u32 v0, v0, s9
; GCN-NEXT: v_mul_hi_u32 v2, v2, s4 ; GCN-NEXT: v_mul_hi_u32 v2, v2, v1
; GCN-NEXT: v_mul_lo_u32 v0, v0, s5 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, s2, v0
; GCN-NEXT: v_mul_lo_u32 v2, v2, s12 ; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], s2, v0
; GCN-NEXT: v_sub_i32_e32 v3, vcc, s6, v0 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v1
; GCN-NEXT: v_sub_i32_e32 v4, vcc, s4, v2 ; GCN-NEXT: v_subrev_i32_e32 v1, vcc, v2, v1
; GCN-NEXT: v_add_i32_e32 v5, vcc, s5, v3 ; GCN-NEXT: v_cndmask_b32_e64 v0, v1, v0, s[0:1]
; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s6, v0 ; GCN-NEXT: v_mul_hi_u32 v0, v0, s8
; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s5, v3 ; GCN-NEXT: v_add_i32_e32 v4, vcc, s9, v3
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s5, v3 ; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s9, v3
; GCN-NEXT: v_add_i32_e32 v6, vcc, s12, v4 ; GCN-NEXT: v_subrev_i32_e32 v1, vcc, s9, v3
; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], s4, v2 ; GCN-NEXT: v_mul_lo_u32 v0, v0, s10
; GCN-NEXT: v_cmp_le_u32_e64 s[6:7], s12, v4 ; GCN-NEXT: s_and_b64 vcc, s[0:1], s[2:3]
; GCN-NEXT: v_subrev_i32_e32 v2, vcc, s12, v4 ; GCN-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v1, s[2:3]
; GCN-NEXT: v_sub_i32_e32 v1, vcc, s8, v0
; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s8, v0
; GCN-NEXT: v_add_i32_e32 v3, vcc, s10, v1
; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s10, v1
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s10, v1
; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] ; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
; GCN-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc ; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GCN-NEXT: s_and_b64 vcc, s[6:7], s[4:5] ; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: v_cndmask_b32_e32 v3, v4, v2, vcc ; GCN-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[0:1]
; GCN-NEXT: v_cndmask_b32_e64 v2, v5, v0, s[0:1]
; GCN-NEXT: v_cndmask_b32_e64 v0, v6, v3, s[4:5]
; GCN-NEXT: v_mov_b32_e32 v3, v1 ; GCN-NEXT: v_mov_b32_e32 v3, v1
; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%1 = lshr <2 x i64> %x, <i64 33, i64 33> %1 = lshr <2 x i64> %x, <i64 33, i64 33>
%2 = lshr <2 x i64> %y, <i64 33, i64 33> %2 = lshr <2 x i64> %y, <i64 33, i64 33>
%result = urem <2 x i64> %1, %2 %result = urem <2 x i64> %1, %2
store <2 x i64> %result, <2 x i64> addrspace(1)* %out store <2 x i64> %result, <2 x i64> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @s_test_urem24_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) { define amdgpu_kernel void @s_test_urem24_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
; GCN-LABEL: s_test_urem24_i64: ; GCN-LABEL: s_test_urem24_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN-NEXT: s_load_dword s2, s[0:1], 0xe ; GCN-NEXT: s_load_dword s2, s[0:1], 0xe
; GCN-NEXT: s_mov_b32 s11, 0xf000 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN-NEXT: s_mov_b32 s10, -1
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_mov_b32 s8, s4 ; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: s_mov_b32 s9, s5 ; GCN-NEXT: s_lshr_b32 s8, s2, 8
; GCN-NEXT: s_lshr_b32 s3, s7, 8 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
; GCN-NEXT: s_lshr_b32 s4, s2, 8 ; GCN-NEXT: s_lshr_b32 s0, s7, 8
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s4 ; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 ; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 ; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_mul_hi_u32 v1, v0, s4 ; GCN-NEXT: v_mul_lo_u32 v1, v0, s8
; GCN-NEXT: v_mul_lo_u32 v2, v0, s4 ; GCN-NEXT: v_mul_hi_u32 v2, v0, s8
; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 ; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v2
; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[2:3]
; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 ; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[2:3]
; GCN-NEXT: v_mul_hi_u32 v0, v0, s3 ; GCN-NEXT: v_mul_hi_u32 v0, v0, s0
; GCN-NEXT: v_mul_lo_u32 v0, v0, s4 ; GCN-NEXT: v_mul_lo_u32 v0, v0, s8
; GCN-NEXT: v_sub_i32_e32 v1, vcc, s3, v0 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, s0, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, s4, v1 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s0, v0
; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s3, v0 ; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s4, v1 ; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v1
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s4, v1 ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v1
; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] ; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
; GCN-NEXT: v_mov_b32_e32 v1, 0 ; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%1 = lshr i64 %x, 40 %1 = lshr i64 %x, 40
%2 = lshr i64 %y, 40 %2 = lshr i64 %y, 40
%result = urem i64 %1, %2 %result = urem i64 %1, %2
store i64 %result, i64 addrspace(1)* %out store i64 %result, i64 addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @s_test_urem23_64_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) { define amdgpu_kernel void @s_test_urem23_64_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) {
; GCN-LABEL: s_test_urem23_64_v2i64: ; GCN-LABEL: s_test_urem23_64_v2i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x11
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: s_lshr_b32 s10, s5, 1
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s10
; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9 ; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0xd ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0xd
; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x11 ; GCN-NEXT: s_lshr_b32 s9, s7, 9
; GCN-NEXT: s_mov_b32 s7, 0xf000 ; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s2, s11, 9
; GCN-NEXT: s_lshr_b32 s3, s9, 1
; GCN-NEXT: s_lshr_b32 s8, s15, 9
; GCN-NEXT: s_lshr_b32 s9, s13, 1
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s9
; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2
; GCN-NEXT: v_cvt_f32_u32_e32 v3, s8
; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 ; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v3 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s2, s1, 1
; GCN-NEXT: s_lshr_b32 s8, s3, 9
; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 ; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
; GCN-NEXT: v_mul_f32_e32 v4, v2, v4
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_trunc_f32_e32 v4, v4 ; GCN-NEXT: v_mul_lo_u32 v1, v0, s10
; GCN-NEXT: v_mul_hi_u32 v5, v0, s9 ; GCN-NEXT: v_mul_hi_u32 v2, v0, s10
; GCN-NEXT: v_mul_lo_u32 v6, v0, s9 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
; GCN-NEXT: v_mad_f32 v2, -v4, v3, v2 ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4 ; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
; GCN-NEXT: v_sub_i32_e32 v7, vcc, 0, v6 ; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, |v3| ; GCN-NEXT: v_cvt_f32_u32_e32 v3, s9
; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v4, vcc ; GCN-NEXT: v_cvt_f32_u32_e32 v2, s8
; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v1, v0
; GCN-NEXT: v_cndmask_b32_e64 v3, v6, v7, s[0:1] ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
; GCN-NEXT: v_mul_lo_u32 v2, v2, s8
; GCN-NEXT: v_mul_hi_u32 v3, v3, v0
; GCN-NEXT: v_sub_i32_e32 v2, vcc, s2, v2
; GCN-NEXT: v_add_i32_e32 v4, vcc, v3, v0
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v3, v0
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
; GCN-NEXT: v_mul_hi_u32 v0, v0, s3 ; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
; GCN-NEXT: v_mul_lo_u32 v0, v0, s9 ; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v3
; GCN-NEXT: v_sub_i32_e32 v3, vcc, s3, v0 ; GCN-NEXT: v_mul_lo_u32 v0, v0, s10
; GCN-NEXT: v_add_i32_e32 v4, vcc, s9, v3 ; GCN-NEXT: v_mul_f32_e32 v1, v2, v1
; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s3, v0 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s9, v3 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, s2, v0
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s9, v3 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0
; GCN-NEXT: v_add_i32_e32 v5, vcc, s10, v4
; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s10, v4
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s10, v4
; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] ; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
; GCN-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc ; GCN-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v4, v0, s[0:1] ; GCN-NEXT: v_cvt_u32_f32_e32 v4, v1
; GCN-NEXT: v_and_b32_e32 v2, 0x7fffff, v2 ; GCN-NEXT: v_mad_f32 v1, -v1, v3, v2
; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v3|
; GCN-NEXT: v_cndmask_b32_e64 v0, v5, v0, s[0:1]
; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v4, vcc
; GCN-NEXT: v_mul_lo_u32 v2, v1, s9
; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: v_mov_b32_e32 v3, v1 ; GCN-NEXT: v_mov_b32_e32 v3, v1
; GCN-NEXT: v_sub_i32_e32 v2, vcc, s8, v2
; GCN-NEXT: v_and_b32_e32 v2, 0x7fffff, v2
; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 ; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%1 = lshr <2 x i64> %x, <i64 33, i64 41> %1 = lshr <2 x i64> %x, <i64 33, i64 41>
%2 = lshr <2 x i64> %y, <i64 33, i64 41> %2 = lshr <2 x i64> %y, <i64 33, i64 41>
%result = urem <2 x i64> %1, %2 %result = urem <2 x i64> %1, %2
store <2 x i64> %result, <2 x i64> addrspace(1)* %out store <2 x i64> %result, <2 x i64> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @s_test_urem_k_num_i64(i64 addrspace(1)* %out, i64 %x) { define amdgpu_kernel void @s_test_urem_k_num_i64(i64 addrspace(1)* %out, i64 %x) {
; GCN-LABEL: s_test_urem_k_num_i64: ; GCN-LABEL: s_test_urem_k_num_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN-NEXT: s_mov_b32 s7, 0xf000 ; GCN-NEXT: v_mov_b32_e32 v2, 0
; GCN-NEXT: s_mov_b32 s6, -1 ; GCN-NEXT: s_mov_b32 s11, 0xf000
; GCN-NEXT: v_mov_b32_e32 v0, 0 ; GCN-NEXT: s_mov_b32 s10, -1
; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_mov_b32 s4, s0 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s6
; GCN-NEXT: s_mov_b32 s5, s1 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, s7
; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2 ; GCN-NEXT: s_sub_u32 s2, 0, s6
; GCN-NEXT: v_cvt_f32_u32_e32 v3, s3 ; GCN-NEXT: s_subb_u32 s3, 0, s7
; GCN-NEXT: s_sub_u32 s8, 0, s2 ; GCN-NEXT: s_mov_b32 s8, s4
; GCN-NEXT: v_mov_b32_e32 v4, s3 ; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 ; GCN-NEXT: v_rcp_f32_e32 v0, v0
; GCN-NEXT: s_subb_u32 s9, 0, s3 ; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: v_rcp_f32_e32 v2, v2 ; GCN-NEXT: s_mov_b32 s9, s5
; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 ; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 ; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v0
; GCN-NEXT: v_trunc_f32_e32 v3, v3 ; GCN-NEXT: v_trunc_f32_e32 v3, v3
; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 ; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v3
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 ; GCN-NEXT: v_mul_hi_u32 v5, s2, v0
; GCN-NEXT: v_mul_lo_u32 v5, s8, v3 ; GCN-NEXT: v_mul_lo_u32 v4, s2, v3
; GCN-NEXT: v_mul_lo_u32 v6, s9, v2 ; GCN-NEXT: v_mul_lo_u32 v7, s3, v0
; GCN-NEXT: v_mul_hi_u32 v7, s8, v2 ; GCN-NEXT: v_mul_lo_u32 v6, s2, v0
; GCN-NEXT: v_mul_lo_u32 v8, s8, v2 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v7
; GCN-NEXT: v_mul_hi_u32 v7, v2, v8 ; GCN-NEXT: v_mul_hi_u32 v5, v0, v6
; GCN-NEXT: v_mul_hi_u32 v9, v3, v8 ; GCN-NEXT: v_mul_lo_u32 v7, v0, v4
; GCN-NEXT: v_mul_lo_u32 v8, v3, v8 ; GCN-NEXT: v_mul_hi_u32 v9, v0, v4
; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v6 ; GCN-NEXT: v_mul_lo_u32 v8, v3, v6
; GCN-NEXT: v_mul_hi_u32 v6, v2, v5 ; GCN-NEXT: v_mul_hi_u32 v6, v3, v6
; GCN-NEXT: v_mul_lo_u32 v10, v2, v5 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7
; GCN-NEXT: v_mul_hi_u32 v11, v3, v5 ; GCN-NEXT: v_mul_hi_u32 v10, v3, v4
; GCN-NEXT: v_mul_lo_u32 v5, v3, v5 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v2, v9, vcc
; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10 ; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v6, vcc ; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v6, vcc
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v6, v9, vcc ; GCN-NEXT: v_addc_u32_e32 v6, vcc, v10, v1, vcc
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v0, vcc ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5 ; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v4
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v7, vcc ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
; GCN-NEXT: v_add_i32_e64 v2, s[0:1], v2, v5 ; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
; GCN-NEXT: v_addc_u32_e64 v5, vcc, v3, v6, s[0:1] ; GCN-NEXT: v_mul_lo_u32 v6, s2, v4
; GCN-NEXT: v_mul_hi_u32 v7, s8, v2 ; GCN-NEXT: v_mul_hi_u32 v7, s2, v0
; GCN-NEXT: v_mul_lo_u32 v8, s9, v2 ; GCN-NEXT: v_mul_lo_u32 v8, s3, v0
; GCN-NEXT: v_mul_lo_u32 v9, s8, v2 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
; GCN-NEXT: v_mul_lo_u32 v10, s8, v5 ; GCN-NEXT: v_mul_lo_u32 v7, s2, v0
; GCN-NEXT: v_mul_hi_u32 v11, v5, v9 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6
; GCN-NEXT: v_mul_lo_u32 v12, v5, v9 ; GCN-NEXT: v_mul_lo_u32 v10, v0, v6
; GCN-NEXT: v_mul_hi_u32 v9, v2, v9 ; GCN-NEXT: v_mul_hi_u32 v12, v0, v6
; GCN-NEXT: v_mul_hi_u32 v11, v0, v7
; GCN-NEXT: v_mul_hi_u32 v9, v4, v7
; GCN-NEXT: v_mul_lo_u32 v7, v4, v7
; GCN-NEXT: v_mul_hi_u32 v8, v4, v6
; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
; GCN-NEXT: v_addc_u32_e32 v11, vcc, v2, v12, vcc
; GCN-NEXT: v_mul_lo_u32 v4, v4, v6
; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10 ; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10
; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v9, vcc
; GCN-NEXT: v_mul_hi_u32 v8, v5, v7 ; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v1, vcc
; GCN-NEXT: v_mul_hi_u32 v10, v2, v7 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v7, v4
; GCN-NEXT: v_mul_lo_u32 v13, v2, v7 ; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v6, vcc
; GCN-NEXT: v_mul_lo_u32 v5, v5, v7 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
; GCN-NEXT: v_add_i32_e32 v7, vcc, v9, v13
; GCN-NEXT: v_addc_u32_e32 v9, vcc, v1, v10, vcc
; GCN-NEXT: v_add_i32_e32 v7, vcc, v12, v7
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v9, v11, vcc
; GCN-NEXT: v_addc_u32_e32 v8, vcc, v8, v0, vcc
; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v6
; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v8, vcc
; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1] ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v5 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; GCN-NEXT: v_mul_hi_u32 v2, v2, 24 ; GCN-NEXT: v_mul_lo_u32 v4, v3, 24
; GCN-NEXT: v_mul_hi_u32 v5, v3, 24 ; GCN-NEXT: v_mul_hi_u32 v0, v0, 24
; GCN-NEXT: v_mul_lo_u32 v3, v3, 24 ; GCN-NEXT: v_mul_hi_u32 v3, v3, 24
; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v5, vcc ; GCN-NEXT: v_addc_u32_e32 v0, vcc, v2, v3, vcc
; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v0, vcc ; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NEXT: v_mul_hi_u32 v2, s2, v1 ; GCN-NEXT: v_mul_lo_u32 v1, s6, v1
; GCN-NEXT: v_mul_lo_u32 v3, s3, v1 ; GCN-NEXT: v_mul_hi_u32 v2, s6, v0
; GCN-NEXT: v_mul_lo_u32 v1, s2, v1 ; GCN-NEXT: v_mul_lo_u32 v3, s7, v0
; GCN-NEXT: v_mul_lo_u32 v0, s2, v0 ; GCN-NEXT: v_mul_lo_u32 v0, s6, v0
; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v0 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0, v0 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0, v1
; GCN-NEXT: v_sub_i32_e32 v3, vcc, 24, v1 ; GCN-NEXT: v_mov_b32_e32 v3, s7
; GCN-NEXT: v_subb_u32_e64 v1, s[0:1], v2, v4, vcc ; GCN-NEXT: v_sub_i32_e32 v0, vcc, 24, v0
; GCN-NEXT: v_subb_u32_e32 v0, vcc, 0, v0, vcc ; GCN-NEXT: v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v3 ; GCN-NEXT: v_subrev_i32_e64 v4, s[0:1], s6, v0
; GCN-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc ; GCN-NEXT: v_subb_u32_e64 v3, s[2:3], v2, v3, s[0:1]
; GCN-NEXT: v_subrev_i32_e32 v5, vcc, s2, v3 ; GCN-NEXT: v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
; GCN-NEXT: v_subb_u32_e64 v4, s[0:1], v1, v4, vcc ; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s7, v2
; GCN-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v5 ; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s6, v4
; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc ; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
; GCN-NEXT: v_subrev_i32_e32 v7, vcc, s2, v5 ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s7, v2
; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v0 ; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[0:1]
; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[0:1] ; GCN-NEXT: v_subrev_i32_e64 v6, s[0:1], s6, v4
; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v1 ; GCN-NEXT: v_subb_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[0:1] ; GCN-NEXT: v_subbrev_u32_e64 v3, s[0:1], 0, v3, s[0:1]
; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc ; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v0 ; GCN-NEXT: v_cmp_le_u32_e32 vcc, s7, v1
; GCN-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc ; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1 ; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc
; GCN-NEXT: v_cndmask_b32_e32 v6, v9, v6, vcc ; GCN-NEXT: v_cmp_le_u32_e32 vcc, s6, v0
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s7, v1
; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v2 ; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v1, s[0:1] ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3
; GCN-NEXT: v_cndmask_b32_e32 v0, v5, v7, vcc ; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v6, s[0:1]
; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%result = urem i64 24, %x %result = urem i64 24, %x
store i64 %result, i64 addrspace(1)* %out store i64 %result, i64 addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @s_test_urem_k_den_i64(i64 addrspace(1)* %out, i64 %x) { define amdgpu_kernel void @s_test_urem_k_den_i64(i64 addrspace(1)* %out, i64 %x) {
; GCN-LABEL: s_test_urem_k_den_i64: ; GCN-LABEL: s_test_urem_k_den_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: v_mov_b32_e32 v0, 0x4f800000 ; GCN-NEXT: v_mov_b32_e32 v0, 0x4f800000
; GCN-NEXT: s_movk_i32 s8, 0xffe8
; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: v_mov_b32_e32 v2, 0
; GCN-NEXT: v_madak_f32 v0, 0, v0, 0x41c00000 ; GCN-NEXT: v_madak_f32 v0, 0, v0, 0x41c00000
; GCN-NEXT: v_rcp_f32_e32 v0, v0 ; GCN-NEXT: v_rcp_f32_e32 v0, v0
; GCN-NEXT: s_movk_i32 s2, 0xffe8
; GCN-NEXT: v_mov_b32_e32 v8, 0
; GCN-NEXT: v_mov_b32_e32 v7, 0
; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 ; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
; GCN-NEXT: s_mov_b32 s4, s0 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
; GCN-NEXT: s_mov_b32 s5, s1 ; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v0
; GCN-NEXT: v_mov_b32_e32 v4, s3
; GCN-NEXT: v_trunc_f32_e32 v3, v3
; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v3
; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_mul_lo_u32 v5, v3, s8 ; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
; GCN-NEXT: v_mul_hi_u32 v6, v0, s8 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN-NEXT: v_mul_lo_u32 v7, v0, s8 ; GCN-NEXT: s_mov_b32 s11, 0xf000
; GCN-NEXT: v_subrev_i32_e32 v6, vcc, v0, v6 ; GCN-NEXT: v_mul_hi_u32 v2, v0, s2
; GCN-NEXT: v_mul_hi_u32 v8, v0, v7 ; GCN-NEXT: v_mul_lo_u32 v3, v1, s2
; GCN-NEXT: v_mul_hi_u32 v9, v3, v7 ; GCN-NEXT: v_mul_lo_u32 v4, v0, s2
; GCN-NEXT: v_mul_lo_u32 v7, v3, v7 ; GCN-NEXT: s_mov_b32 s10, -1
; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v6 ; GCN-NEXT: v_subrev_i32_e32 v2, vcc, v0, v2
; GCN-NEXT: v_mul_hi_u32 v6, v0, v5 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
; GCN-NEXT: v_mul_lo_u32 v10, v0, v5 ; GCN-NEXT: v_mul_lo_u32 v5, v0, v2
; GCN-NEXT: v_mul_hi_u32 v11, v3, v5 ; GCN-NEXT: v_mul_hi_u32 v6, v0, v4
; GCN-NEXT: v_mul_lo_u32 v5, v3, v5 ; GCN-NEXT: v_mul_hi_u32 v3, v0, v2
; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v10 ; GCN-NEXT: v_mul_hi_u32 v9, v1, v2
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v6, vcc ; GCN-NEXT: v_mul_lo_u32 v2, v1, v2
; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v8
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v6, v9, vcc
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v1, vcc
; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v7, vcc ; GCN-NEXT: v_mul_lo_u32 v6, v1, v4
; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v5 ; GCN-NEXT: v_mul_hi_u32 v4, v1, v4
; GCN-NEXT: v_addc_u32_e64 v5, vcc, v3, v6, s[0:1] ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v8, v3, vcc
; GCN-NEXT: v_mul_hi_u32 v7, v0, s8 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_mul_lo_u32 v8, v0, s8 ; GCN-NEXT: s_mov_b32 s8, s4
; GCN-NEXT: v_mul_lo_u32 v9, v5, s8 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5
; GCN-NEXT: v_subrev_i32_e32 v7, vcc, v0, v7 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v4, vcc
; GCN-NEXT: v_mul_hi_u32 v10, v0, v8 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, v9, v7, vcc
; GCN-NEXT: v_mul_hi_u32 v11, v5, v8 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
; GCN-NEXT: v_mul_lo_u32 v8, v5, v8 ; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v2
; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v9 ; GCN-NEXT: v_addc_u32_e32 v3, vcc, v8, v4, vcc
; GCN-NEXT: v_mul_hi_u32 v9, v0, v7 ; GCN-NEXT: v_mul_hi_u32 v4, v0, s2
; GCN-NEXT: v_mul_lo_u32 v12, v0, v7 ; GCN-NEXT: v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
; GCN-NEXT: v_mul_hi_u32 v13, v5, v7 ; GCN-NEXT: v_mul_lo_u32 v5, v2, s2
; GCN-NEXT: v_mul_lo_u32 v5, v5, v7 ; GCN-NEXT: v_mul_lo_u32 v6, v0, s2
; GCN-NEXT: v_add_i32_e32 v7, vcc, v10, v12 ; GCN-NEXT: v_subrev_i32_e32 v4, vcc, v0, v4
; GCN-NEXT: v_addc_u32_e32 v9, vcc, v2, v9, vcc ; GCN-NEXT: s_mov_b32 s9, s5
; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v9, v11, vcc ; GCN-NEXT: v_mul_lo_u32 v5, v0, v4
; GCN-NEXT: v_addc_u32_e32 v8, vcc, v13, v1, vcc ; GCN-NEXT: v_mul_hi_u32 v9, v0, v6
; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v6 ; GCN-NEXT: v_mul_hi_u32 v10, v0, v4
; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5 ; GCN-NEXT: v_mul_hi_u32 v11, v2, v4
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v8, vcc ; GCN-NEXT: v_add_i32_e32 v5, vcc, v9, v5
; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1] ; GCN-NEXT: v_addc_u32_e32 v9, vcc, v8, v10, vcc
; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v5 ; GCN-NEXT: v_mul_lo_u32 v10, v2, v6
; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GCN-NEXT: v_mul_hi_u32 v6, v2, v6
; GCN-NEXT: v_mul_hi_u32 v5, s2, v0 ; GCN-NEXT: v_mul_lo_u32 v2, v2, v4
; GCN-NEXT: v_mul_hi_u32 v6, s3, v0 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v10, v5
; GCN-NEXT: v_mul_lo_u32 v0, s3, v0 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v9, v6, vcc
; GCN-NEXT: v_mul_hi_u32 v7, s2, v3 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, v11, v7, vcc
; GCN-NEXT: v_mul_lo_u32 v8, s2, v3 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v5, v2
; GCN-NEXT: v_mul_hi_u32 v9, s3, v3 ; GCN-NEXT: v_addc_u32_e32 v4, vcc, v8, v4, vcc
; GCN-NEXT: v_mul_lo_u32 v3, s3, v3 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v8 ; GCN-NEXT: v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
; GCN-NEXT: v_addc_u32_e32 v7, vcc, v2, v7, vcc ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v5 ; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NEXT: v_addc_u32_e32 v0, vcc, v7, v6, vcc ; GCN-NEXT: v_mul_lo_u32 v2, s6, v1
; GCN-NEXT: v_addc_u32_e32 v1, vcc, v9, v1, vcc ; GCN-NEXT: v_mul_hi_u32 v3, s6, v0
; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 ; GCN-NEXT: v_mul_hi_u32 v4, s6, v1
; GCN-NEXT: v_addc_u32_e32 v1, vcc, v2, v1, vcc ; GCN-NEXT: v_mul_hi_u32 v5, s7, v1
; GCN-NEXT: v_mul_lo_u32 v1, s7, v1
; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
; GCN-NEXT: v_addc_u32_e32 v3, vcc, v8, v4, vcc
; GCN-NEXT: v_mul_lo_u32 v4, s7, v0
; GCN-NEXT: v_mul_hi_u32 v0, s7, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, v4, v2
; GCN-NEXT: v_addc_u32_e32 v0, vcc, v3, v0, vcc
; GCN-NEXT: v_addc_u32_e32 v2, vcc, v5, v7, vcc
; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
; GCN-NEXT: v_addc_u32_e32 v1, vcc, v8, v2, vcc
; GCN-NEXT: v_mul_hi_u32 v2, v0, 24 ; GCN-NEXT: v_mul_hi_u32 v2, v0, 24
; GCN-NEXT: v_mul_lo_u32 v0, v0, 24
; GCN-NEXT: v_mul_lo_u32 v1, v1, 24 ; GCN-NEXT: v_mul_lo_u32 v1, v1, 24
; GCN-NEXT: v_mul_lo_u32 v0, v0, 24
; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
; GCN-NEXT: v_sub_i32_e32 v0, vcc, s2, v0 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, s6, v0
; GCN-NEXT: v_subb_u32_e32 v1, vcc, v4, v1, vcc ; GCN-NEXT: v_mov_b32_e32 v2, s7
; GCN-NEXT: v_subb_u32_e32 v1, vcc, v2, v1, vcc
; GCN-NEXT: v_subrev_i32_e32 v2, vcc, 24, v0 ; GCN-NEXT: v_subrev_i32_e32 v2, vcc, 24, v0
; GCN-NEXT: v_cmp_lt_u32_e64 s[0:1], 23, v0 ; GCN-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v1, vcc
; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, s[0:1] ; GCN-NEXT: v_subrev_i32_e32 v4, vcc, 24, v2
; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v1, vcc ; GCN-NEXT: v_subbrev_u32_e32 v5, vcc, 0, v3, vcc
; GCN-NEXT: v_subrev_i32_e32 v5, vcc, 24, v2 ; GCN-NEXT: v_cmp_lt_u32_e32 vcc, 23, v2
; GCN-NEXT: v_cmp_lt_u32_e64 s[0:1], 23, v2 ; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1] ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1
; GCN-NEXT: v_cndmask_b32_e64 v3, -1, v3, s[0:1]
; GCN-NEXT: v_subbrev_u32_e32 v7, vcc, 0, v4, vcc
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4
; GCN-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc ; GCN-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6
; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc ; GCN-NEXT: v_cmp_lt_u32_e64 s[0:1], 23, v0
; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v3 ; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1
; GCN-NEXT: v_cndmask_b32_e64 v5, -1, v5, s[0:1]
; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%result = urem i64 %x, 24 %result = urem i64 %x, 24
store i64 %result, i64 addrspace(1)* %out store i64 %result, i64 addrspace(1)* %out
ret void ret void
} }
; FIXME: Constant bus violation ; FIXME: Constant bus violation
; define i64 @v_test_urem_k_num_i64(i64 %x) { ; define i64 @v_test_urem_k_num_i64(i64 %x) {
; %result = urem i64 24, %x ; %result = urem i64 24, %x
; ret i64 %result ; ret i64 %result
; } ; }
define i64 @v_test_urem_pow2_k_num_i64(i64 %x) { define i64 @v_test_urem_pow2_k_num_i64(i64 %x) {
; GCN-LABEL: v_test_urem_pow2_k_num_i64: ; GCN-LABEL: v_test_urem_pow2_k_num_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0 ; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0
; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1 ; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1
; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v0 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v0
; GCN-NEXT: v_subb_u32_e32 v5, vcc, 0, v1, vcc ; GCN-NEXT: v_subb_u32_e32 v5, vcc, 0, v1, vcc
; GCN-NEXT: v_mov_b32_e32 v6, 0 ; GCN-NEXT: v_mov_b32_e32 v12, 0
; GCN-NEXT: v_mov_b32_e32 v7, 0
; GCN-NEXT: s_mov_b32 s6, 0x8000
; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 ; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3
; GCN-NEXT: v_rcp_f32_e32 v2, v2 ; GCN-NEXT: v_rcp_f32_e32 v2, v2
; GCN-NEXT: v_mov_b32_e32 v11, 0
; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 ; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 ; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
; GCN-NEXT: v_trunc_f32_e32 v3, v3 ; GCN-NEXT: v_trunc_f32_e32 v3, v3
; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 ; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 ; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2
; GCN-NEXT: v_mul_lo_u32 v8, v4, v3 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
; GCN-NEXT: v_mul_lo_u32 v9, v5, v2 ; GCN-NEXT: v_mul_hi_u32 v7, v4, v2
; GCN-NEXT: v_mul_hi_u32 v10, v4, v2 ; GCN-NEXT: v_mul_lo_u32 v6, v4, v3
; GCN-NEXT: v_mul_lo_u32 v11, v4, v2 ; GCN-NEXT: v_mul_lo_u32 v8, v5, v2
; GCN-NEXT: v_mul_lo_u32 v9, v4, v2
; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8
; GCN-NEXT: v_mul_lo_u32 v8, v2, v6
; GCN-NEXT: v_mul_hi_u32 v10, v2, v9
; GCN-NEXT: v_mul_hi_u32 v7, v2, v6
; GCN-NEXT: v_mul_hi_u32 v13, v3, v6
; GCN-NEXT: v_mul_lo_u32 v6, v3, v6
; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v8 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v8
; GCN-NEXT: v_mul_hi_u32 v10, v2, v11 ; GCN-NEXT: v_mul_lo_u32 v10, v3, v9
; GCN-NEXT: v_mul_hi_u32 v12, v3, v11 ; GCN-NEXT: v_mul_hi_u32 v9, v3, v9
; GCN-NEXT: v_mul_lo_u32 v11, v3, v11 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v12, v7, vcc
; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v9 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v8
; GCN-NEXT: v_mul_hi_u32 v9, v2, v8 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v9, vcc
; GCN-NEXT: v_mul_lo_u32 v13, v2, v8 ; GCN-NEXT: v_addc_u32_e32 v8, vcc, v13, v11, vcc
; GCN-NEXT: v_mul_hi_u32 v14, v3, v8 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
; GCN-NEXT: v_mul_lo_u32 v8, v3, v8 ; GCN-NEXT: v_add_i32_e64 v2, s[4:5], v2, v6
; GCN-NEXT: v_add_i32_e32 v10, vcc, v10, v13 ; GCN-NEXT: v_addc_u32_e32 v7, vcc, v12, v8, vcc
; GCN-NEXT: v_addc_u32_e32 v9, vcc, v7, v9, vcc ; GCN-NEXT: v_addc_u32_e64 v6, vcc, v3, v7, s[4:5]
; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10 ; GCN-NEXT: v_mul_lo_u32 v8, v4, v6
; GCN-NEXT: v_addc_u32_e32 v9, vcc, v9, v12, vcc ; GCN-NEXT: v_mul_hi_u32 v9, v4, v2
; GCN-NEXT: v_addc_u32_e32 v10, vcc, v14, v6, vcc
; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
; GCN-NEXT: v_addc_u32_e32 v9, vcc, v7, v10, vcc
; GCN-NEXT: v_add_i32_e64 v2, s[4:5], v2, v8
; GCN-NEXT: v_addc_u32_e64 v8, vcc, v3, v9, s[4:5]
; GCN-NEXT: v_mul_hi_u32 v10, v4, v2
; GCN-NEXT: v_mul_lo_u32 v5, v5, v2 ; GCN-NEXT: v_mul_lo_u32 v5, v5, v2
; GCN-NEXT: v_mul_lo_u32 v11, v4, v2 ; GCN-NEXT: v_mul_lo_u32 v4, v4, v2
; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v9 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
; GCN-NEXT: v_mul_lo_u32 v4, v4, v8 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
; GCN-NEXT: v_mul_hi_u32 v9, v8, v11 ; GCN-NEXT: v_mul_lo_u32 v10, v2, v5
; GCN-NEXT: v_mul_lo_u32 v12, v8, v11 ; GCN-NEXT: v_mul_hi_u32 v13, v2, v4
; GCN-NEXT: v_mul_hi_u32 v11, v2, v11 ; GCN-NEXT: v_mul_hi_u32 v14, v2, v5
; GCN-NEXT: v_add_i32_e32 v4, vcc, v10, v4 ; GCN-NEXT: v_mul_hi_u32 v9, v6, v4
; GCN-NEXT: v_mul_lo_u32 v4, v6, v4
; GCN-NEXT: v_add_i32_e32 v10, vcc, v13, v10
; GCN-NEXT: v_mul_hi_u32 v8, v6, v5
; GCN-NEXT: v_addc_u32_e32 v13, vcc, v12, v14, vcc
; GCN-NEXT: v_mul_lo_u32 v5, v6, v5
; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v10
; GCN-NEXT: v_addc_u32_e32 v4, vcc, v13, v9, vcc
; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v11, vcc
; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
; GCN-NEXT: v_mul_hi_u32 v5, v8, v4 ; GCN-NEXT: v_addc_u32_e32 v5, vcc, v12, v6, vcc
; GCN-NEXT: v_mul_hi_u32 v10, v2, v4 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7
; GCN-NEXT: v_mul_lo_u32 v13, v2, v4
; GCN-NEXT: v_mul_lo_u32 v4, v8, v4
; GCN-NEXT: v_add_i32_e32 v8, vcc, v11, v13
; GCN-NEXT: v_addc_u32_e32 v10, vcc, v7, v10, vcc
; GCN-NEXT: v_add_i32_e32 v8, vcc, v12, v8
; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v9, vcc
; GCN-NEXT: v_addc_u32_e32 v5, vcc, v5, v6, vcc
; GCN-NEXT: v_add_i32_e32 v4, vcc, v8, v4
; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v5, vcc
; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v5, s[4:5] ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v5, s[4:5]
; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v3, vcc ; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v3, vcc
; GCN-NEXT: v_lshrrev_b32_e32 v2, 17, v2 ; GCN-NEXT: v_lshrrev_b32_e32 v2, 17, v2
; GCN-NEXT: v_mul_lo_u32 v3, v1, v2 ; GCN-NEXT: v_mul_lo_u32 v3, v1, v2
; GCN-NEXT: v_mul_hi_u32 v4, v0, v2 ; GCN-NEXT: v_mul_hi_u32 v4, v0, v2
; GCN-NEXT: v_mul_lo_u32 v2, v0, v2 ; GCN-NEXT: v_mul_lo_u32 v2, v0, v2
; GCN-NEXT: s_mov_b32 s4, 0x8000
; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
; GCN-NEXT: v_sub_i32_e32 v2, vcc, s6, v2 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3
; GCN-NEXT: v_sub_i32_e64 v4, s[4:5], 0, v3 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, s4, v2
; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v0
; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5]
; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v4, v1, vcc ; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v4, v1, vcc
; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc ; GCN-NEXT: v_sub_i32_e64 v5, s[4:5], v2, v0
; GCN-NEXT: v_sub_i32_e32 v6, vcc, v2, v0 ; GCN-NEXT: v_subb_u32_e64 v6, s[6:7], v4, v1, s[4:5]
; GCN-NEXT: v_subb_u32_e64 v7, s[4:5], v4, v1, vcc ; GCN-NEXT: v_subbrev_u32_e64 v4, s[4:5], 0, v4, s[4:5]
; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc
; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0
; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc
; GCN-NEXT: v_sub_i32_e32 v0, vcc, v6, v0
; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v3, v1
; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5]
; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1
; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] ; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5]
; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v1 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v0
; GCN-NEXT: v_cndmask_b32_e64 v5, v9, v5, s[4:5] ; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc
; GCN-NEXT: v_subbrev_u32_e32 v7, vcc, 0, v7, vcc ; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5]
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v4, v1 ; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v4, v1
; GCN-NEXT: v_cndmask_b32_e32 v1, v10, v8, vcc ; GCN-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5]
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v3, v1
; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc ; GCN-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v7
; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5 ; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5] ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v0
; GCN-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc ; GCN-NEXT: v_sub_i32_e64 v8, s[4:5], v5, v0
; GCN-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ; GCN-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v3, v1
; GCN-NEXT: v_cndmask_b32_e32 v0, v7, v0, vcc
; GCN-NEXT: v_subbrev_u32_e64 v1, s[4:5], 0, v6, s[4:5]
; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v8, s[6:7]
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GCN-NEXT: v_cndmask_b32_e64 v1, v4, v1, s[6:7]
; GCN-NEXT: v_cndmask_b32_e32 v0, v2, v5, vcc
; GCN-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
; GCN-NEXT: s_setpc_b64 s[30:31] ; GCN-NEXT: s_setpc_b64 s[30:31]
%result = urem i64 32768, %x %result = urem i64 32768, %x
ret i64 %result ret i64 %result
} }
define i64 @v_test_urem_pow2_k_den_i64(i64 %x) { define i64 @v_test_urem_pow2_k_den_i64(i64 %x) {
; GCN-LABEL: v_test_urem_pow2_k_den_i64: ; GCN-LABEL: v_test_urem_pow2_k_den_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_and_b32_e32 v0, 0x7fff, v0 ; GCN-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GCN-NEXT: v_mov_b32_e32 v1, 0 ; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: s_setpc_b64 s[30:31] ; GCN-NEXT: s_setpc_b64 s[30:31]
%result = urem i64 %x, 32768 %result = urem i64 %x, 32768
ret i64 %result ret i64 %result
} }
define amdgpu_kernel void @s_test_urem24_k_num_i64(i64 addrspace(1)* %out, i64 %x) { define amdgpu_kernel void @s_test_urem24_k_num_i64(i64 addrspace(1)* %out, i64 %x) {
; GCN-LABEL: s_test_urem24_k_num_i64: ; GCN-LABEL: s_test_urem24_k_num_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_mov_b32 s4, s0 ; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: s_mov_b32 s5, s1 ; GCN-NEXT: s_lshr_b32 s8, s7, 8
; GCN-NEXT: s_lshr_b32 s8, s3, 8
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8 ; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 ; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 ; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_mul_hi_u32 v1, v0, s8 ; GCN-NEXT: v_mul_lo_u32 v1, v0, s8
; GCN-NEXT: v_mul_lo_u32 v2, v0, s8 ; GCN-NEXT: v_mul_hi_u32 v2, v0, s8
; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 ; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GCN-NEXT: v_mul_hi_u32 v0, v0, 24 ; GCN-NEXT: v_mul_hi_u32 v0, v0, 24
; GCN-NEXT: v_mul_lo_u32 v0, v0, s8 ; GCN-NEXT: v_mul_lo_u32 v0, v0, s8
; GCN-NEXT: v_sub_i32_e32 v1, vcc, 24, v0 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, 24, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
; GCN-NEXT: v_cmp_gt_u32_e64 s[0:1], 25, v0 ; GCN-NEXT: v_cmp_gt_u32_e64 s[0:1], 25, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v1 ; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v1
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v1 ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v1
; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] ; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
; GCN-NEXT: v_mov_b32_e32 v1, 0 ; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%x.shr = lshr i64 %x, 40 %x.shr = lshr i64 %x, 40
%result = urem i64 24, %x.shr %result = urem i64 24, %x.shr
store i64 %result, i64 addrspace(1)* %out store i64 %result, i64 addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @s_test_urem24_k_den_i64(i64 addrspace(1)* %out, i64 %x) { define amdgpu_kernel void @s_test_urem24_k_den_i64(i64 addrspace(1)* %out, i64 %x) {
; GCN-LABEL: s_test_urem24_k_den_i64: ; GCN-LABEL: s_test_urem24_k_den_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_movk_i32 s8, 0x5b7f
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN-NEXT: s_movk_i32 s9, 0x5b7e
; GCN-NEXT: s_mov_b32 s7, 0xf000 ; GCN-NEXT: s_mov_b32 s7, 0xf000
; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GCN-NEXT: s_mov_b32 s6, -1 ; GCN-NEXT: s_mov_b32 s6, -1
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_movk_i32 s2, 0x5b7f
; GCN-NEXT: s_movk_i32 s8, 0x5b7e
; GCN-NEXT: v_cvt_f32_u32_e32 v0, s2
; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
; GCN-NEXT: s_mov_b32 s4, s0 ; GCN-NEXT: s_mov_b32 s4, s0
; GCN-NEXT: s_mov_b32 s5, s1 ; GCN-NEXT: s_mov_b32 s5, s1
; GCN-NEXT: s_lshr_b32 s3, s3, 8 ; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
; GCN-NEXT: v_mul_hi_u32 v1, v0, s2 ; GCN-NEXT: s_lshr_b32 s2, s3, 8
; GCN-NEXT: v_mul_lo_u32 v2, v0, s2 ; GCN-NEXT: v_mul_lo_u32 v1, v0, s8
; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 ; GCN-NEXT: v_mul_hi_u32 v2, v0, s8
; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] ; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 ; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 ; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GCN-NEXT: v_mul_hi_u32 v0, v0, s3 ; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
; GCN-NEXT: v_mul_lo_u32 v0, v0, s2 ; GCN-NEXT: v_mul_lo_u32 v0, v0, s8
; GCN-NEXT: v_sub_i32_e32 v1, vcc, s3, v0 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, s2, v0
; GCN-NEXT: v_add_i32_e32 v2, vcc, s2, v1 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0
; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s3, v0 ; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
; GCN-NEXT: v_cmp_lt_u32_e64 s[2:3], s8, v1 ; GCN-NEXT: v_cmp_lt_u32_e64 s[2:3], s9, v1
; GCN-NEXT: v_add_i32_e32 v0, vcc, 0xffffa481, v1 ; GCN-NEXT: v_add_i32_e32 v0, vcc, 0xffffa481, v1
; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] ; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
; GCN-NEXT: v_mov_b32_e32 v1, 0 ; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%x.shr = lshr i64 %x, 40 %x.shr = lshr i64 %x, 40
%result = urem i64 %x.shr, 23423 %result = urem i64 %x.shr, 23423
store i64 %result, i64 addrspace(1)* %out store i64 %result, i64 addrspace(1)* %out
ret void ret void
} }
define i64 @v_test_urem24_k_num_i64(i64 %x) { define i64 @v_test_urem24_k_num_i64(i64 %x) {
; GCN-LABEL: v_test_urem24_k_num_i64: ; GCN-LABEL: v_test_urem24_k_num_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0
; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1 ; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1
; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1 ; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1
; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1 ; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
; GCN-NEXT: v_mul_hi_u32 v2, v1, v0 ; GCN-NEXT: v_mul_lo_u32 v2, v1, v0
; GCN-NEXT: v_mul_lo_u32 v3, v1, v0 ; GCN-NEXT: v_mul_hi_u32 v3, v1, v0
; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v2
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
; GCN-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc ; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GCN-NEXT: v_mul_hi_u32 v2, v2, v1 ; GCN-NEXT: v_mul_hi_u32 v2, v2, v1
; GCN-NEXT: v_add_i32_e64 v3, s[4:5], v1, v2 ; GCN-NEXT: v_add_i32_e64 v3, s[4:5], v1, v2
; GCN-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2 ; GCN-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2
; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GCN-NEXT: v_mul_hi_u32 v1, v1, 24 ; GCN-NEXT: v_mul_hi_u32 v1, v1, 24
; GCN-NEXT: v_mul_lo_u32 v1, v1, v0 ; GCN-NEXT: v_mul_lo_u32 v1, v1, v0
; GCN-NEXT: v_sub_i32_e32 v2, vcc, 24, v1 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, 24, v1
; GCN-NEXT: v_add_i32_e32 v3, vcc, v2, v0 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v2, v0
Show All 10 Lines; GCN-NEXT: s_setpc_b64 s[30:31]
ret i64 %result ret i64 %result
} }
define i64 @v_test_urem24_pow2_k_num_i64(i64 %x) { define i64 @v_test_urem24_pow2_k_num_i64(i64 %x) {
; GCN-LABEL: v_test_urem24_pow2_k_num_i64: ; GCN-LABEL: v_test_urem24_pow2_k_num_i64:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GCN-NEXT: s_mov_b32 s6, 0x8001
; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0 ; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0
; GCN-NEXT: s_mov_b32 s6, 0x8001
; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1 ; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1
; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1 ; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1
; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1 ; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
; GCN-NEXT: v_mul_hi_u32 v2, v1, v0 ; GCN-NEXT: v_mul_lo_u32 v2, v1, v0
; GCN-NEXT: v_mul_lo_u32 v3, v1, v0 ; GCN-NEXT: v_mul_hi_u32 v3, v1, v0
; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v2
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
; GCN-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc ; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GCN-NEXT: v_mul_hi_u32 v2, v2, v1 ; GCN-NEXT: v_mul_hi_u32 v2, v2, v1
; GCN-NEXT: v_add_i32_e64 v3, s[4:5], v1, v2 ; GCN-NEXT: v_add_i32_e64 v3, s[4:5], v1, v2
; GCN-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2 ; GCN-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2
; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GCN-NEXT: v_lshrrev_b32_e32 v1, 17, v1 ; GCN-NEXT: v_lshrrev_b32_e32 v1, 17, v1
; GCN-NEXT: v_mul_u32_u24_e32 v1, v1, v0 ; GCN-NEXT: v_mul_u32_u24_e32 v1, v1, v0
; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0x8000, v1 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0x8000, v1
; GCN-NEXT: v_add_i32_e32 v3, vcc, v2, v0 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v2, v0
Show All 24 Lines