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Differential D74594 Diff 244599 llvm/test/CodeGen/AMDGPU/urem64.ll

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llvm/test/CodeGen/AMDGPU/urem64.ll

1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 1​; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2​; RUN: llc -march=amdgcn -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3 3​
4define amdgpu_kernel void @s_test_urem_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 4​define amdgpu_kernel void @s_test_urem_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
5; GCN-LABEL: s_test_urem_i64: 5​; GCN-LABEL: s_test_urem_i64:
6; GCN: ; %bb.0: 6​; GCN: ; %bb.0:
7​; GCN-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0xd
8​; GCN-NEXT: v_mov_b32_e32 v2, 0
7; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 9​; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
8; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd ​
9; GCN-NEXT: s_mov_b32 s7, 0xf000 10​; GCN-NEXT: s_mov_b32 s7, 0xf000
10; GCN-NEXT: s_mov_b32 s6, -1 11​; GCN-NEXT: s_mov_b32 s6, -1
11; GCN-NEXT: v_mov_b32_e32 v0, 0 ​
12; GCN-NEXT: v_mov_b32_e32 v1, 0 ​
13; GCN-NEXT: s_waitcnt lgkmcnt(0) 12​; GCN-NEXT: s_waitcnt lgkmcnt(0)
13​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s12
14​; GCN-NEXT: v_cvt_f32_u32_e32 v1, s13
15​; GCN-NEXT: s_sub_u32 s2, 0, s12
16​; GCN-NEXT: s_subb_u32 s3, 0, s13
14; GCN-NEXT: s_mov_b32 s4, s8 17​; GCN-NEXT: s_mov_b32 s4, s8
18​; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
19​; GCN-NEXT: v_rcp_f32_e32 v0, v0
20​; GCN-NEXT: v_mov_b32_e32 v1, 0
15; GCN-NEXT: s_mov_b32 s5, s9 21​; GCN-NEXT: s_mov_b32 s5, s9
16; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2 22​; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
17; GCN-NEXT: v_cvt_f32_u32_e32 v3, s3 23​; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v0
18; GCN-NEXT: s_sub_u32 s8, 0, s2 ​
19; GCN-NEXT: v_mov_b32_e32 v4, s3 ​
20; GCN-NEXT: v_mov_b32_e32 v5, s11 ​
21; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 ​
22; GCN-NEXT: s_subb_u32 s9, 0, s3 ​
23; GCN-NEXT: v_rcp_f32_e32 v2, v2 ​
24; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 ​
25; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 ​
26; GCN-NEXT: v_trunc_f32_e32 v3, v3 24​; GCN-NEXT: v_trunc_f32_e32 v3, v3
27; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 25​; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v3
26​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
28; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3 27​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
29; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 28​; GCN-NEXT: v_mul_hi_u32 v5, s2, v0
30; GCN-NEXT: v_mul_lo_u32 v6, s8, v3 29​; GCN-NEXT: v_mul_lo_u32 v4, s2, v3
31; GCN-NEXT: v_mul_lo_u32 v7, s9, v2 30​; GCN-NEXT: v_mul_lo_u32 v7, s3, v0
32; GCN-NEXT: v_mul_hi_u32 v8, s8, v2 31​; GCN-NEXT: v_mul_lo_u32 v6, s2, v0
33; GCN-NEXT: v_mul_lo_u32 v9, s8, v2 32​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
34; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6 33​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v7
35; GCN-NEXT: v_mul_hi_u32 v8, v2, v9 34​; GCN-NEXT: v_mul_hi_u32 v5, v0, v6
36; GCN-NEXT: v_mul_hi_u32 v10, v3, v9 35​; GCN-NEXT: v_mul_lo_u32 v7, v0, v4
37; GCN-NEXT: v_mul_lo_u32 v9, v3, v9 36​; GCN-NEXT: v_mul_hi_u32 v9, v0, v4
38; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7 37​; GCN-NEXT: v_mul_lo_u32 v8, v3, v6
39; GCN-NEXT: v_mul_hi_u32 v7, v2, v6 38​; GCN-NEXT: v_mul_hi_u32 v6, v3, v6
40; GCN-NEXT: v_mul_lo_u32 v11, v2, v6 39​; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7
41; GCN-NEXT: v_mul_hi_u32 v12, v3, v6 40​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v2, v9, vcc
42; GCN-NEXT: v_mul_lo_u32 v6, v3, v6 41​; GCN-NEXT: v_mul_hi_u32 v9, v3, v4
43; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v11 42​; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
44; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v7, vcc 43​; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
45; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8 44​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v6, vcc
46; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v10, vcc 45​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v9, v1, vcc
47; GCN-NEXT: v_addc_u32_e32 v8, vcc, v12, v0, vcc 46​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
47​; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v4
48​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
49​; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
50​; GCN-NEXT: v_mul_lo_u32 v6, s2, v4
51​; GCN-NEXT: v_mul_hi_u32 v7, s2, v0
52​; GCN-NEXT: v_mul_lo_u32 v8, s3, v0
48; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6 53​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
49; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v8, vcc 54​; GCN-NEXT: v_mul_lo_u32 v7, s2, v0
50; GCN-NEXT: v_add_i32_e64 v2, s[0:1], v2, v6 ​
51; GCN-NEXT: v_addc_u32_e64 v6, vcc, v3, v7, s[0:1] ​
52; GCN-NEXT: v_mul_hi_u32 v8, s8, v2 ​
53; GCN-NEXT: v_mul_lo_u32 v9, s9, v2 ​
54; GCN-NEXT: v_mul_lo_u32 v10, s8, v2 ​
55; GCN-NEXT: v_mul_lo_u32 v11, s8, v6 ​
56; GCN-NEXT: v_mul_hi_u32 v12, v6, v10 ​
57; GCN-NEXT: v_mul_lo_u32 v13, v6, v10 ​
58; GCN-NEXT: v_mul_hi_u32 v10, v2, v10 ​
59; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v11 ​
60; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8 ​
61; GCN-NEXT: v_mul_hi_u32 v9, v6, v8 ​
62; GCN-NEXT: v_mul_hi_u32 v11, v2, v8 ​
63; GCN-NEXT: v_mul_lo_u32 v14, v2, v8 ​
64; GCN-NEXT: v_mul_lo_u32 v6, v6, v8 ​
65; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v14 ​
66; GCN-NEXT: v_addc_u32_e32 v10, vcc, v1, v11, vcc ​
67; GCN-NEXT: v_add_i32_e32 v8, vcc, v13, v8 ​
68; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v12, vcc ​
69; GCN-NEXT: v_addc_u32_e32 v9, vcc, v9, v0, vcc ​
70; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7 ​
71; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6 55​; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6
72; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v9, vcc 56​; GCN-NEXT: v_mul_lo_u32 v10, v0, v6
73; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v7, s[0:1] 57​; GCN-NEXT: v_mul_hi_u32 v12, v0, v6
74; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6 58​; GCN-NEXT: v_mul_hi_u32 v11, v0, v7
59​; GCN-NEXT: v_mul_hi_u32 v9, v4, v7
60​; GCN-NEXT: v_mul_lo_u32 v7, v4, v7
61​; GCN-NEXT: v_mul_hi_u32 v8, v4, v6
62​; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
63​; GCN-NEXT: v_addc_u32_e32 v11, vcc, v2, v12, vcc
64​; GCN-NEXT: v_mul_lo_u32 v4, v4, v6
65​; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10
66​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v9, vcc
67​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v1, vcc
68​; GCN-NEXT: v_add_i32_e32 v4, vcc, v7, v4
69​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v6, vcc
70​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
71​; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
72​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
75; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 73​; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
76; GCN-NEXT: v_mul_hi_u32 v6, s10, v2 74​; GCN-NEXT: v_mul_lo_u32 v4, s10, v3
77; GCN-NEXT: v_mul_hi_u32 v7, s11, v2 75​; GCN-NEXT: v_mul_hi_u32 v5, s10, v0
78; GCN-NEXT: v_mul_lo_u32 v2, s11, v2 76​; GCN-NEXT: v_mul_hi_u32 v6, s10, v3
79; GCN-NEXT: v_mul_hi_u32 v8, s10, v3 77​; GCN-NEXT: v_mul_hi_u32 v7, s11, v3
80; GCN-NEXT: v_mul_lo_u32 v9, s10, v3 ​
81; GCN-NEXT: v_mul_hi_u32 v10, s11, v3 ​
82; GCN-NEXT: v_mul_lo_u32 v3, s11, v3 78​; GCN-NEXT: v_mul_lo_u32 v3, s11, v3
83; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v9 79​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
84; GCN-NEXT: v_addc_u32_e32 v8, vcc, v1, v8, vcc 80​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
85; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6 81​; GCN-NEXT: v_mul_lo_u32 v6, s11, v0
86; GCN-NEXT: v_addc_u32_e32 v2, vcc, v8, v7, vcc 82​; GCN-NEXT: v_mul_hi_u32 v0, s11, v0
87; GCN-NEXT: v_addc_u32_e32 v0, vcc, v10, v0, vcc 83​; GCN-NEXT: v_add_i32_e32 v4, vcc, v6, v4
88; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3 84​; GCN-NEXT: v_addc_u32_e32 v0, vcc, v5, v0, vcc
89; GCN-NEXT: v_addc_u32_e32 v0, vcc, v1, v0, vcc 85​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v7, v1, vcc
90; GCN-NEXT: v_mul_hi_u32 v1, s2, v2 ​
91; GCN-NEXT: v_mul_lo_u32 v3, s3, v2 ​
92; GCN-NEXT: v_mul_lo_u32 v2, s2, v2 ​
93; GCN-NEXT: v_mul_lo_u32 v0, s2, v0 ​
94; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0 ​
95; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 86​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3
96; GCN-NEXT: v_sub_i32_e32 v1, vcc, s11, v0 87​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v2, v1, vcc
97; GCN-NEXT: v_sub_i32_e32 v2, vcc, s10, v2 88​; GCN-NEXT: v_mul_lo_u32 v1, s12, v1
98; GCN-NEXT: v_subb_u32_e64 v1, s[0:1], v1, v4, vcc 89​; GCN-NEXT: v_mul_hi_u32 v2, s12, v0
99; GCN-NEXT: v_subb_u32_e32 v0, vcc, v5, v0, vcc 90​; GCN-NEXT: v_mul_lo_u32 v3, s13, v0
100; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v2 91​; GCN-NEXT: v_mul_lo_u32 v0, s12, v0
92​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
93​; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
94​; GCN-NEXT: v_sub_i32_e32 v2, vcc, s11, v1
95​; GCN-NEXT: v_mov_b32_e32 v3, s13
96​; GCN-NEXT: v_sub_i32_e32 v0, vcc, s10, v0
97​; GCN-NEXT: v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
98​; GCN-NEXT: v_subrev_i32_e64 v4, s[0:1], s12, v0
99​; GCN-NEXT: v_subb_u32_e64 v3, s[2:3], v2, v3, s[0:1]
100​; GCN-NEXT: v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
101​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s13, v2
102​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
103​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s12, v4
104​; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
105​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s13, v2
106​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[0:1]
107​; GCN-NEXT: v_subrev_i32_e64 v6, s[0:1], s12, v4
108​; GCN-NEXT: v_subbrev_u32_e64 v3, s[0:1], 0, v3, s[0:1]
109​; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
110​; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]
111​; GCN-NEXT: v_mov_b32_e32 v3, s11
112​; GCN-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc
113​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s13, v1
101; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc 114​; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc
102; GCN-NEXT: v_subrev_i32_e32 v5, vcc, s2, v2 115​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s12, v0
103; GCN-NEXT: v_subb_u32_e64 v4, s[0:1], v1, v4, vcc 116​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
104; GCN-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 117​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s13, v1
105; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v5 118​; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
106; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 119​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3
107; GCN-NEXT: v_subrev_i32_e32 v7, vcc, s2, v5 120​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
108; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v0 121​; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v6, s[0:1]
109; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[0:1] 122​; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
110; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v1 ​
111; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[0:1] ​
112; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc ​
113; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v0 ​
114; GCN-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc ​
115; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1 ​
116; GCN-NEXT: v_cndmask_b32_e32 v6, v9, v6, vcc ​
117; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 ​
118; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ​
119; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v3 ​
120; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v1, s[0:1] ​
121; GCN-NEXT: v_cndmask_b32_e32 v0, v5, v7, vcc ​
122; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] ​
123; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 123​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
124; GCN-NEXT: s_endpgm 124​; GCN-NEXT: s_endpgm
125 %result = urem i64 %x, %y 125​ %result = urem i64 %x, %y
126 store i64 %result, i64 addrspace(1)* %out 126​ store i64 %result, i64 addrspace(1)* %out
127 ret void 127​ ret void
128} 128​}
129 129​
130define i64 @v_test_urem_i64(i64 %x, i64 %y) { 130​define i64 @v_test_urem_i64(i64 %x, i64 %y) {
131; GCN-LABEL: v_test_urem_i64: 131​; GCN-LABEL: v_test_urem_i64:
132; GCN: ; %bb.0: 132​; GCN: ; %bb.0:
133; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 133​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
134; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2 134​; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2
135; GCN-NEXT: v_cvt_f32_u32_e32 v5, v3 135​; GCN-NEXT: v_cvt_f32_u32_e32 v5, v3
136; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v2 136​; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v2
137; GCN-NEXT: v_subb_u32_e32 v7, vcc, 0, v3, vcc 137​; GCN-NEXT: v_subb_u32_e32 v7, vcc, 0, v3, vcc
138; GCN-NEXT: v_mov_b32_e32 v8, 0 138​; GCN-NEXT: v_mov_b32_e32 v14, 0
139; GCN-NEXT: v_mov_b32_e32 v9, 0 ​
140; GCN-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 139​; GCN-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5
141; GCN-NEXT: v_rcp_f32_e32 v4, v4 140​; GCN-NEXT: v_rcp_f32_e32 v4, v4
141​; GCN-NEXT: v_mov_b32_e32 v13, 0
142; GCN-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 142​; GCN-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4
143; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 143​; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4
144; GCN-NEXT: v_trunc_f32_e32 v5, v5 144​; GCN-NEXT: v_trunc_f32_e32 v5, v5
145; GCN-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 145​; GCN-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5
146; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5 ​
147; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4 146​; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4
148; GCN-NEXT: v_mul_lo_u32 v10, v6, v5 147​; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5
149; GCN-NEXT: v_mul_lo_u32 v11, v7, v4 148​; GCN-NEXT: v_mul_hi_u32 v8, v6, v4
150; GCN-NEXT: v_mul_hi_u32 v12, v6, v4 149​; GCN-NEXT: v_mul_lo_u32 v9, v6, v5
151; GCN-NEXT: v_mul_lo_u32 v13, v6, v4 150​; GCN-NEXT: v_mul_lo_u32 v10, v7, v4
152; GCN-NEXT: v_add_i32_e32 v10, vcc, v12, v10 151​; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v9
153; GCN-NEXT: v_mul_hi_u32 v12, v4, v13 152​; GCN-NEXT: v_mul_lo_u32 v9, v6, v4
154; GCN-NEXT: v_mul_hi_u32 v14, v5, v13 153​; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v10
155; GCN-NEXT: v_mul_lo_u32 v13, v5, v13 154​; GCN-NEXT: v_mul_lo_u32 v11, v4, v8
156; GCN-NEXT: v_add_i32_e32 v10, vcc, v10, v11 155​; GCN-NEXT: v_mul_hi_u32 v10, v4, v8
157; GCN-NEXT: v_mul_hi_u32 v11, v4, v10 156​; GCN-NEXT: v_mul_hi_u32 v12, v4, v9
158; GCN-NEXT: v_mul_lo_u32 v15, v4, v10 157​; GCN-NEXT: v_mul_hi_u32 v15, v5, v8
159; GCN-NEXT: v_mul_hi_u32 v16, v5, v10 158​; GCN-NEXT: v_mul_lo_u32 v8, v5, v8
160; GCN-NEXT: v_mul_lo_u32 v10, v5, v10 159​; GCN-NEXT: v_add_i32_e32 v11, vcc, v12, v11
161; GCN-NEXT: v_add_i32_e32 v12, vcc, v12, v15 160​; GCN-NEXT: v_mul_lo_u32 v12, v5, v9
162; GCN-NEXT: v_addc_u32_e32 v11, vcc, v9, v11, vcc 161​; GCN-NEXT: v_mul_hi_u32 v9, v5, v9
163; GCN-NEXT: v_add_i32_e32 v12, vcc, v13, v12 162​; GCN-NEXT: v_addc_u32_e32 v10, vcc, v14, v10, vcc
164; GCN-NEXT: v_addc_u32_e32 v11, vcc, v11, v14, vcc 163​; GCN-NEXT: v_add_i32_e32 v11, vcc, v12, v11
165; GCN-NEXT: v_addc_u32_e32 v12, vcc, v16, v8, vcc 164​; GCN-NEXT: v_addc_u32_e32 v9, vcc, v10, v9, vcc
166; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10 165​; GCN-NEXT: v_addc_u32_e32 v10, vcc, v15, v13, vcc
167; GCN-NEXT: v_addc_u32_e32 v11, vcc, v9, v12, vcc 166​; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
168; GCN-NEXT: v_add_i32_e64 v4, s[4:5], v4, v10 167​; GCN-NEXT: v_add_i32_e64 v4, s[4:5], v4, v8
169; GCN-NEXT: v_addc_u32_e64 v10, vcc, v5, v11, s[4:5] 168​; GCN-NEXT: v_addc_u32_e32 v9, vcc, v14, v10, vcc
170; GCN-NEXT: v_mul_hi_u32 v12, v6, v4 169​; GCN-NEXT: v_addc_u32_e64 v8, vcc, v5, v9, s[4:5]
170​; GCN-NEXT: v_mul_lo_u32 v10, v6, v8
171​; GCN-NEXT: v_mul_hi_u32 v11, v6, v4
171; GCN-NEXT: v_mul_lo_u32 v7, v7, v4 172​; GCN-NEXT: v_mul_lo_u32 v7, v7, v4
172; GCN-NEXT: v_mul_lo_u32 v13, v6, v4 173​; GCN-NEXT: v_mul_lo_u32 v6, v6, v4
173; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v11 174​; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
174; GCN-NEXT: v_mul_lo_u32 v6, v6, v10 175​; GCN-NEXT: v_add_i32_e32 v7, vcc, v10, v7
175; GCN-NEXT: v_mul_hi_u32 v11, v10, v13 176​; GCN-NEXT: v_mul_lo_u32 v12, v4, v7
176; GCN-NEXT: v_mul_lo_u32 v14, v10, v13 177​; GCN-NEXT: v_mul_hi_u32 v15, v4, v6
177; GCN-NEXT: v_mul_hi_u32 v13, v4, v13 178​; GCN-NEXT: v_mul_hi_u32 v16, v4, v7
178; GCN-NEXT: v_add_i32_e32 v6, vcc, v12, v6 179​; GCN-NEXT: v_mul_hi_u32 v11, v8, v6
180​; GCN-NEXT: v_mul_lo_u32 v6, v8, v6
181​; GCN-NEXT: v_add_i32_e32 v12, vcc, v15, v12
182​; GCN-NEXT: v_mul_hi_u32 v10, v8, v7
183​; GCN-NEXT: v_addc_u32_e32 v15, vcc, v14, v16, vcc
184​; GCN-NEXT: v_mul_lo_u32 v7, v8, v7
185​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v12
186​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v15, v11, vcc
187​; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v13, vcc
179; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7 188​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7
180; GCN-NEXT: v_mul_hi_u32 v7, v10, v6 189​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v14, v8, vcc
181; GCN-NEXT: v_mul_hi_u32 v12, v4, v6 190​; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v9
182; GCN-NEXT: v_mul_lo_u32 v15, v4, v6 ​
183; GCN-NEXT: v_mul_lo_u32 v6, v10, v6 ​
184; GCN-NEXT: v_add_i32_e32 v10, vcc, v13, v15 ​
185; GCN-NEXT: v_addc_u32_e32 v12, vcc, v9, v12, vcc ​
186; GCN-NEXT: v_add_i32_e32 v10, vcc, v14, v10 ​
187; GCN-NEXT: v_addc_u32_e32 v10, vcc, v12, v11, vcc ​
188; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v8, vcc ​
189; GCN-NEXT: v_add_i32_e32 v6, vcc, v10, v6 ​
190; GCN-NEXT: v_addc_u32_e32 v7, vcc, v9, v7, vcc ​
191; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5] 191​; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5]
192; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6 192​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
193; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 193​; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
194; GCN-NEXT: v_mul_hi_u32 v6, v0, v4 194​; GCN-NEXT: v_mul_lo_u32 v6, v0, v5
195; GCN-NEXT: v_mul_hi_u32 v7, v1, v4 195​; GCN-NEXT: v_mul_hi_u32 v7, v0, v4
196; GCN-NEXT: v_mul_lo_u32 v4, v1, v4 196​; GCN-NEXT: v_mul_hi_u32 v8, v0, v5
197; GCN-NEXT: v_mul_hi_u32 v10, v0, v5 197​; GCN-NEXT: v_mul_hi_u32 v9, v1, v5
198; GCN-NEXT: v_mul_lo_u32 v11, v0, v5 ​
199; GCN-NEXT: v_mul_hi_u32 v12, v1, v5 ​
200; GCN-NEXT: v_mul_lo_u32 v5, v1, v5 198​; GCN-NEXT: v_mul_lo_u32 v5, v1, v5
201; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v11 199​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
202; GCN-NEXT: v_addc_u32_e32 v10, vcc, v9, v10, vcc 200​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v14, v8, vcc
203; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6 201​; GCN-NEXT: v_mul_lo_u32 v8, v1, v4
204; GCN-NEXT: v_addc_u32_e32 v4, vcc, v10, v7, vcc 202​; GCN-NEXT: v_mul_hi_u32 v4, v1, v4
205; GCN-NEXT: v_addc_u32_e32 v6, vcc, v12, v8, vcc 203​; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6
204​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v7, v4, vcc
205​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v9, v13, vcc
206; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5 206​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
207; GCN-NEXT: v_addc_u32_e32 v5, vcc, v9, v6, vcc 207​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v14, v6, vcc
208​; GCN-NEXT: v_mul_lo_u32 v5, v2, v5
208; GCN-NEXT: v_mul_hi_u32 v6, v2, v4 209​; GCN-NEXT: v_mul_hi_u32 v6, v2, v4
209; GCN-NEXT: v_mul_lo_u32 v7, v3, v4 210​; GCN-NEXT: v_mul_lo_u32 v7, v3, v4
210; GCN-NEXT: v_mul_lo_u32 v4, v2, v4 211​; GCN-NEXT: v_mul_lo_u32 v4, v2, v4
211; GCN-NEXT: v_mul_lo_u32 v5, v2, v5 ​
212; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5 212​; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5
213; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7 213​; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7
214; GCN-NEXT: v_sub_i32_e32 v6, vcc, v1, v5 214​; GCN-NEXT: v_sub_i32_e32 v6, vcc, v1, v5
215; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 215​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4
216; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v6, v3, vcc 216​; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v6, v3, vcc
217​; GCN-NEXT: v_sub_i32_e64 v6, s[4:5], v0, v2
218​; GCN-NEXT: v_subb_u32_e64 v7, s[6:7], v4, v3, s[4:5]
219​; GCN-NEXT: v_subbrev_u32_e64 v4, s[4:5], 0, v4, s[4:5]
217; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 220​; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc
218; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 ​
219; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc ​
220; GCN-NEXT: v_sub_i32_e32 v6, vcc, v0, v2 ​
221; GCN-NEXT: v_subb_u32_e64 v7, s[4:5], v4, v3, vcc ​
222; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc ​
223; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v2 ​
224; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc ​
225; GCN-NEXT: v_sub_i32_e32 v2, vcc, v6, v2 ​
226; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v1, v3 ​
227; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] ​
228; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3 221​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3
229; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 222​; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5]
230; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v3 223​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v2
231; GCN-NEXT: v_cndmask_b32_e64 v5, v9, v5, s[4:5] 224​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3
232; GCN-NEXT: v_subbrev_u32_e32 v7, vcc, 0, v7, vcc 225​; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5]
233; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v4, v3 226​; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v4, v3
234; GCN-NEXT: v_cndmask_b32_e32 v3, v10, v8, vcc 227​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
235; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3 228​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2
236; GCN-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc 229​; GCN-NEXT: v_cndmask_b32_e64 v8, v8, v9, s[4:5]
237; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5 230​; GCN-NEXT: v_sub_i32_e64 v9, s[4:5], v6, v2
238; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] 231​; GCN-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc
239; GCN-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc 232​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3
240; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5] 233​; GCN-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc
234​; GCN-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v8
235​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2
236​; GCN-NEXT: v_subbrev_u32_e64 v2, s[4:5], 0, v7, s[4:5]
237​; GCN-NEXT: v_cndmask_b32_e64 v6, v6, v9, s[6:7]
238​; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v2, s[6:7]
239​; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc
240​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
241; GCN-NEXT: s_setpc_b64 s[30:31] 241​; GCN-NEXT: s_setpc_b64 s[30:31]
242 %result = urem i64 %x, %y 242​ %result = urem i64 %x, %y
243 ret i64 %result 243​ ret i64 %result
244} 244​}
245 245​
246define amdgpu_kernel void @s_test_urem31_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 246​define amdgpu_kernel void @s_test_urem31_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
247; GCN-LABEL: s_test_urem31_i64: 247​; GCN-LABEL: s_test_urem31_i64:
248; GCN: ; %bb.0: 248​; GCN: ; %bb.0:
249; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ​
250; GCN-NEXT: s_load_dword s2, s[0:1], 0xe 249​; GCN-NEXT: s_load_dword s2, s[0:1], 0xe
251; GCN-NEXT: s_mov_b32 s11, 0xf000 250​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
252; GCN-NEXT: s_mov_b32 s10, -1 ​
253; GCN-NEXT: s_waitcnt lgkmcnt(0) 251​; GCN-NEXT: s_waitcnt lgkmcnt(0)
254; GCN-NEXT: s_mov_b32 s8, s4 252​; GCN-NEXT: s_mov_b32 s6, -1
255; GCN-NEXT: s_mov_b32 s9, s5 253​; GCN-NEXT: s_lshr_b32 s8, s2, 1
256; GCN-NEXT: s_lshr_b32 s3, s7, 1 254​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
257; GCN-NEXT: s_lshr_b32 s4, s2, 1 255​; GCN-NEXT: s_lshr_b32 s0, s7, 1
258; GCN-NEXT: v_cvt_f32_u32_e32 v0, s4 256​; GCN-NEXT: s_mov_b32 s7, 0xf000
259; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 257​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
260; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 258​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
261; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 259​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
262; GCN-NEXT: v_mul_hi_u32 v1, v0, s4 260​; GCN-NEXT: v_mul_lo_u32 v1, v0, s8
263; GCN-NEXT: v_mul_lo_u32 v2, v0, s4 261​; GCN-NEXT: v_mul_hi_u32 v2, v0, s8
264; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 262​; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
265; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 263​; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v2
266; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] 264​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[2:3]
267; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 265​; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
268; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 266​; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
269; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 267​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
270; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] 268​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[2:3]
271; GCN-NEXT: v_mul_hi_u32 v0, v0, s3 269​; GCN-NEXT: v_mul_hi_u32 v0, v0, s0
272; GCN-NEXT: v_mul_lo_u32 v0, v0, s4 270​; GCN-NEXT: v_mul_lo_u32 v0, v0, s8
273; GCN-NEXT: v_sub_i32_e32 v1, vcc, s3, v0 271​; GCN-NEXT: v_sub_i32_e32 v1, vcc, s0, v0
274; GCN-NEXT: v_add_i32_e32 v2, vcc, s4, v1 272​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s0, v0
275; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s3, v0 273​; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
276; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s4, v1 274​; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v1
277; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s4, v1 275​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v1
278; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 276​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
279; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 277​; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
280; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] 278​; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
281; GCN-NEXT: v_mov_b32_e32 v1, 0 279​; GCN-NEXT: v_mov_b32_e32 v1, 0
282; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 280​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
283; GCN-NEXT: s_endpgm 281​; GCN-NEXT: s_endpgm
284 %1 = lshr i64 %x, 33 282​ %1 = lshr i64 %x, 33
285 %2 = lshr i64 %y, 33 283​ %2 = lshr i64 %y, 33
286 %result = urem i64 %1, %2 284​ %result = urem i64 %1, %2
287 store i64 %result, i64 addrspace(1)* %out 285​ store i64 %result, i64 addrspace(1)* %out
288 ret void 286​ ret void
289} 287​}
290 288​
291define amdgpu_kernel void @s_test_urem31_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) { 289​define amdgpu_kernel void @s_test_urem31_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) {
292; GCN-LABEL: s_test_urem31_v2i64: 290​; GCN-LABEL: s_test_urem31_v2i64:
293; GCN: ; %bb.0: 291​; GCN: ; %bb.0:
294; GCN-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x9 ​
295; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0xd ​
296; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x11 292​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x11
297; GCN-NEXT: s_mov_b32 s11, 0xf000 ​
298; GCN-NEXT: s_mov_b32 s10, -1 ​
299; GCN-NEXT: v_mov_b32_e32 v1, 0 ​
300; GCN-NEXT: s_waitcnt lgkmcnt(0) 293​; GCN-NEXT: s_waitcnt lgkmcnt(0)
301; GCN-NEXT: s_lshr_b32 s4, s13, 1 294​; GCN-NEXT: s_mov_b32 s6, -1
302; GCN-NEXT: s_lshr_b32 s6, s15, 1 295​; GCN-NEXT: s_lshr_b32 s9, s7, 1
303; GCN-NEXT: s_lshr_b32 s12, s5, 1 296​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s9
304; GCN-NEXT: s_lshr_b32 s5, s7, 1 297​; GCN-NEXT: s_lshr_b32 s10, s5, 1
305; GCN-NEXT: v_cvt_f32_u32_e32 v0, s5 298​; GCN-NEXT: v_cvt_f32_u32_e32 v1, s10
306; GCN-NEXT: v_cvt_f32_u32_e32 v2, s12 299​; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
300​; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0xd
307; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 301​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
308; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v2 302​; GCN-NEXT: s_mov_b32 s7, 0xf000
303​; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1
309; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 304​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
310; GCN-NEXT: v_mul_f32_e32 v2, 0x4f800000, v2 ​
311; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 305​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
312; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 306​; GCN-NEXT: s_waitcnt lgkmcnt(0)
313; GCN-NEXT: v_mul_hi_u32 v3, v0, s5 307​; GCN-NEXT: s_lshr_b32 s8, s1, 1
314; GCN-NEXT: v_mul_lo_u32 v4, v0, s5 308​; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1
315; GCN-NEXT: v_mul_hi_u32 v5, v2, s12 309​; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
316; GCN-NEXT: v_mul_lo_u32 v6, v2, s12 310​; GCN-NEXT: v_mul_lo_u32 v2, v0, s9
317; GCN-NEXT: v_sub_i32_e32 v7, vcc, 0, v4 311​; GCN-NEXT: v_mul_hi_u32 v3, v0, s9
318; GCN-NEXT: v_sub_i32_e32 v8, vcc, 0, v6 312​; GCN-NEXT: s_lshr_b32 s2, s3, 1
313​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v2
319; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v3 314​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v3
320; GCN-NEXT: v_cndmask_b32_e64 v3, v4, v7, s[0:1] 315​; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1]
321; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v5 316​; GCN-NEXT: v_mul_hi_u32 v2, v2, v0
322; GCN-NEXT: v_cndmask_b32_e64 v4, v6, v8, s[2:3] 317​; GCN-NEXT: v_mul_lo_u32 v3, v1, s10
323; GCN-NEXT: v_mul_hi_u32 v3, v3, v0 318​; GCN-NEXT: v_add_i32_e32 v4, vcc, v2, v0
324; GCN-NEXT: v_mul_hi_u32 v4, v4, v2 319​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v2, v0
325; GCN-NEXT: v_add_i32_e32 v5, vcc, v3, v0 320​; GCN-NEXT: v_mul_hi_u32 v2, v1, s10
326; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v3, v0 321​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
327; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v2 322​; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
328; GCN-NEXT: v_subrev_i32_e32 v2, vcc, v4, v2 323​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3
329; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[0:1] 324​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
330; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[2:3] 325​; GCN-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[0:1]
331; GCN-NEXT: v_mul_hi_u32 v0, v0, s6 326​; GCN-NEXT: v_mul_lo_u32 v0, v0, s9
332; GCN-NEXT: v_mul_hi_u32 v2, v2, s4 327​; GCN-NEXT: v_mul_hi_u32 v2, v2, v1
333; GCN-NEXT: v_mul_lo_u32 v0, v0, s5 328​; GCN-NEXT: v_sub_i32_e32 v3, vcc, s2, v0
334; GCN-NEXT: v_mul_lo_u32 v2, v2, s12 329​; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], s2, v0
335; GCN-NEXT: v_sub_i32_e32 v3, vcc, s6, v0 330​; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v1
336; GCN-NEXT: v_sub_i32_e32 v4, vcc, s4, v2 331​; GCN-NEXT: v_subrev_i32_e32 v1, vcc, v2, v1
337; GCN-NEXT: v_add_i32_e32 v5, vcc, s5, v3 332​; GCN-NEXT: v_cndmask_b32_e64 v0, v1, v0, s[0:1]
338; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s6, v0 333​; GCN-NEXT: v_mul_hi_u32 v0, v0, s8
339; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s5, v3 334​; GCN-NEXT: v_add_i32_e32 v4, vcc, s9, v3
340; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s5, v3 335​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s9, v3
341; GCN-NEXT: v_add_i32_e32 v6, vcc, s12, v4 336​; GCN-NEXT: v_subrev_i32_e32 v1, vcc, s9, v3
342; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], s4, v2 337​; GCN-NEXT: v_mul_lo_u32 v0, v0, s10
343; GCN-NEXT: v_cmp_le_u32_e64 s[6:7], s12, v4 338​; GCN-NEXT: s_and_b64 vcc, s[0:1], s[2:3]
344; GCN-NEXT: v_subrev_i32_e32 v2, vcc, s12, v4 339​; GCN-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
340​; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v1, s[2:3]
341​; GCN-NEXT: v_sub_i32_e32 v1, vcc, s8, v0
342​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s8, v0
343​; GCN-NEXT: v_add_i32_e32 v3, vcc, s10, v1
344​; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s10, v1
345​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s10, v1
345; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 346​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
346; GCN-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc 347​; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
347; GCN-NEXT: s_and_b64 vcc, s[6:7], s[4:5] 348​; GCN-NEXT: v_mov_b32_e32 v1, 0
348; GCN-NEXT: v_cndmask_b32_e32 v3, v4, v2, vcc 349​; GCN-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[0:1]
349; GCN-NEXT: v_cndmask_b32_e64 v2, v5, v0, s[0:1] ​
350; GCN-NEXT: v_cndmask_b32_e64 v0, v6, v3, s[4:5] ​
351; GCN-NEXT: v_mov_b32_e32 v3, v1 350​; GCN-NEXT: v_mov_b32_e32 v3, v1
352; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 351​; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
353; GCN-NEXT: s_endpgm 352​; GCN-NEXT: s_endpgm
354 %1 = lshr <2 x i64> %x, <i64 33, i64 33> 353​ %1 = lshr <2 x i64> %x, <i64 33, i64 33>
355 %2 = lshr <2 x i64> %y, <i64 33, i64 33> 354​ %2 = lshr <2 x i64> %y, <i64 33, i64 33>
356 %result = urem <2 x i64> %1, %2 355​ %result = urem <2 x i64> %1, %2
357 store <2 x i64> %result, <2 x i64> addrspace(1)* %out 356​ store <2 x i64> %result, <2 x i64> addrspace(1)* %out
358 ret void 357​ ret void
359} 358​}
360 359​
361define amdgpu_kernel void @s_test_urem24_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 360​define amdgpu_kernel void @s_test_urem24_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
362; GCN-LABEL: s_test_urem24_i64: 361​; GCN-LABEL: s_test_urem24_i64:
363; GCN: ; %bb.0: 362​; GCN: ; %bb.0:
364; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ​
365; GCN-NEXT: s_load_dword s2, s[0:1], 0xe 363​; GCN-NEXT: s_load_dword s2, s[0:1], 0xe
366; GCN-NEXT: s_mov_b32 s11, 0xf000 364​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
367; GCN-NEXT: s_mov_b32 s10, -1 ​
368; GCN-NEXT: s_waitcnt lgkmcnt(0) 365​; GCN-NEXT: s_waitcnt lgkmcnt(0)
369; GCN-NEXT: s_mov_b32 s8, s4 366​; GCN-NEXT: s_mov_b32 s6, -1
370; GCN-NEXT: s_mov_b32 s9, s5 367​; GCN-NEXT: s_lshr_b32 s8, s2, 8
371; GCN-NEXT: s_lshr_b32 s3, s7, 8 368​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
372; GCN-NEXT: s_lshr_b32 s4, s2, 8 369​; GCN-NEXT: s_lshr_b32 s0, s7, 8
373; GCN-NEXT: v_cvt_f32_u32_e32 v0, s4 370​; GCN-NEXT: s_mov_b32 s7, 0xf000
374; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 371​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
375; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 372​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
376; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 373​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
377; GCN-NEXT: v_mul_hi_u32 v1, v0, s4 374​; GCN-NEXT: v_mul_lo_u32 v1, v0, s8
378; GCN-NEXT: v_mul_lo_u32 v2, v0, s4 375​; GCN-NEXT: v_mul_hi_u32 v2, v0, s8
379; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 376​; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
380; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 377​; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v2
381; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] 378​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[2:3]
382; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 379​; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
383; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 380​; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
384; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 381​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
385; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] 382​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[2:3]
386; GCN-NEXT: v_mul_hi_u32 v0, v0, s3 383​; GCN-NEXT: v_mul_hi_u32 v0, v0, s0
387; GCN-NEXT: v_mul_lo_u32 v0, v0, s4 384​; GCN-NEXT: v_mul_lo_u32 v0, v0, s8
388; GCN-NEXT: v_sub_i32_e32 v1, vcc, s3, v0 385​; GCN-NEXT: v_sub_i32_e32 v1, vcc, s0, v0
389; GCN-NEXT: v_add_i32_e32 v2, vcc, s4, v1 386​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s0, v0
390; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s3, v0 387​; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
391; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s4, v1 388​; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v1
392; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s4, v1 389​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v1
393; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 390​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
394; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 391​; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
395; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] 392​; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
396; GCN-NEXT: v_mov_b32_e32 v1, 0 393​; GCN-NEXT: v_mov_b32_e32 v1, 0
397; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 394​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
398; GCN-NEXT: s_endpgm 395​; GCN-NEXT: s_endpgm
399 %1 = lshr i64 %x, 40 396​ %1 = lshr i64 %x, 40
400 %2 = lshr i64 %y, 40 397​ %2 = lshr i64 %y, 40
401 %result = urem i64 %1, %2 398​ %result = urem i64 %1, %2
402 store i64 %result, i64 addrspace(1)* %out 399​ store i64 %result, i64 addrspace(1)* %out
403 ret void 400​ ret void
404} 401​}
405 402​
406define amdgpu_kernel void @s_test_urem23_64_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) { 403​define amdgpu_kernel void @s_test_urem23_64_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) {
407; GCN-LABEL: s_test_urem23_64_v2i64: 404​; GCN-LABEL: s_test_urem23_64_v2i64:
408; GCN: ; %bb.0: 405​; GCN: ; %bb.0:
406​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x11
407​; GCN-NEXT: s_waitcnt lgkmcnt(0)
408​; GCN-NEXT: s_mov_b32 s6, -1
409​; GCN-NEXT: s_lshr_b32 s10, s5, 1
410​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s10
409; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9 411​; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
410; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0xd 412​; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0xd
411; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x11 413​; GCN-NEXT: s_lshr_b32 s9, s7, 9
412; GCN-NEXT: s_mov_b32 s7, 0xf000 414​; GCN-NEXT: s_mov_b32 s7, 0xf000
413; GCN-NEXT: s_mov_b32 s6, -1 ​
414; GCN-NEXT: v_mov_b32_e32 v1, 0 ​
415; GCN-NEXT: s_waitcnt lgkmcnt(0) ​
416; GCN-NEXT: s_lshr_b32 s2, s11, 9 ​
417; GCN-NEXT: s_lshr_b32 s3, s9, 1 ​
418; GCN-NEXT: s_lshr_b32 s8, s15, 9 ​
419; GCN-NEXT: s_lshr_b32 s9, s13, 1 ​
420; GCN-NEXT: v_cvt_f32_u32_e32 v0, s9 ​
421; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2 ​
422; GCN-NEXT: v_cvt_f32_u32_e32 v3, s8 ​
423; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 415​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
424; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v3 416​; GCN-NEXT: s_waitcnt lgkmcnt(0)
417​; GCN-NEXT: s_lshr_b32 s2, s1, 1
418​; GCN-NEXT: s_lshr_b32 s8, s3, 9
425; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 419​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
426; GCN-NEXT: v_mul_f32_e32 v4, v2, v4 ​
427; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 420​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
428; GCN-NEXT: v_trunc_f32_e32 v4, v4 421​; GCN-NEXT: v_mul_lo_u32 v1, v0, s10
429; GCN-NEXT: v_mul_hi_u32 v5, v0, s9 422​; GCN-NEXT: v_mul_hi_u32 v2, v0, s10
430; GCN-NEXT: v_mul_lo_u32 v6, v0, s9 423​; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
431; GCN-NEXT: v_mad_f32 v2, -v4, v3, v2 424​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
432; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4 425​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
433; GCN-NEXT: v_sub_i32_e32 v7, vcc, 0, v6 426​; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
434; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, |v3| 427​; GCN-NEXT: v_cvt_f32_u32_e32 v3, s9
435; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v4, vcc 428​; GCN-NEXT: v_cvt_f32_u32_e32 v2, s8
436; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5 429​; GCN-NEXT: v_add_i32_e32 v4, vcc, v1, v0
437; GCN-NEXT: v_cndmask_b32_e64 v3, v6, v7, s[0:1] 430​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
438; GCN-NEXT: v_mul_lo_u32 v2, v2, s8 ​
439; GCN-NEXT: v_mul_hi_u32 v3, v3, v0 ​
440; GCN-NEXT: v_sub_i32_e32 v2, vcc, s2, v2 ​
441; GCN-NEXT: v_add_i32_e32 v4, vcc, v3, v0 ​
442; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v3, v0 ​
443; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1] 431​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
444; GCN-NEXT: v_mul_hi_u32 v0, v0, s3 432​; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
445; GCN-NEXT: v_mul_lo_u32 v0, v0, s9 433​; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v3
446; GCN-NEXT: v_sub_i32_e32 v3, vcc, s3, v0 434​; GCN-NEXT: v_mul_lo_u32 v0, v0, s10
447; GCN-NEXT: v_add_i32_e32 v4, vcc, s9, v3 435​; GCN-NEXT: v_mul_f32_e32 v1, v2, v1
448; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s3, v0 436​; GCN-NEXT: v_trunc_f32_e32 v1, v1
449; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s9, v3 437​; GCN-NEXT: v_sub_i32_e32 v4, vcc, s2, v0
450; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s9, v3 438​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0
439​; GCN-NEXT: v_add_i32_e32 v5, vcc, s10, v4
440​; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s10, v4
441​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s10, v4
451; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 442​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
452; GCN-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc 443​; GCN-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc
453; GCN-NEXT: v_cndmask_b32_e64 v0, v4, v0, s[0:1] 444​; GCN-NEXT: v_cvt_u32_f32_e32 v4, v1
454; GCN-NEXT: v_and_b32_e32 v2, 0x7fffff, v2 445​; GCN-NEXT: v_mad_f32 v1, -v1, v3, v2
446​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v3|
447​; GCN-NEXT: v_cndmask_b32_e64 v0, v5, v0, s[0:1]
448​; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v4, vcc
449​; GCN-NEXT: v_mul_lo_u32 v2, v1, s9
450​; GCN-NEXT: v_mov_b32_e32 v1, 0
455; GCN-NEXT: v_mov_b32_e32 v3, v1 451​; GCN-NEXT: v_mov_b32_e32 v3, v1
452​; GCN-NEXT: v_sub_i32_e32 v2, vcc, s8, v2
453​; GCN-NEXT: v_and_b32_e32 v2, 0x7fffff, v2
456; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 454​; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
457; GCN-NEXT: s_endpgm 455​; GCN-NEXT: s_endpgm
458 %1 = lshr <2 x i64> %x, <i64 33, i64 41> 456​ %1 = lshr <2 x i64> %x, <i64 33, i64 41>
459 %2 = lshr <2 x i64> %y, <i64 33, i64 41> 457​ %2 = lshr <2 x i64> %y, <i64 33, i64 41>
460 %result = urem <2 x i64> %1, %2 458​ %result = urem <2 x i64> %1, %2
461 store <2 x i64> %result, <2 x i64> addrspace(1)* %out 459​ store <2 x i64> %result, <2 x i64> addrspace(1)* %out
462 ret void 460​ ret void
463} 461​}
464 462​
465define amdgpu_kernel void @s_test_urem_k_num_i64(i64 addrspace(1)* %out, i64 %x) { 463​define amdgpu_kernel void @s_test_urem_k_num_i64(i64 addrspace(1)* %out, i64 %x) {
466; GCN-LABEL: s_test_urem_k_num_i64: 464​; GCN-LABEL: s_test_urem_k_num_i64:
467; GCN: ; %bb.0: 465​; GCN: ; %bb.0:
468; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 466​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
469; GCN-NEXT: s_mov_b32 s7, 0xf000 467​; GCN-NEXT: v_mov_b32_e32 v2, 0
470; GCN-NEXT: s_mov_b32 s6, -1 468​; GCN-NEXT: s_mov_b32 s11, 0xf000
471; GCN-NEXT: v_mov_b32_e32 v0, 0 469​; GCN-NEXT: s_mov_b32 s10, -1
472; GCN-NEXT: v_mov_b32_e32 v1, 0 ​
473; GCN-NEXT: s_waitcnt lgkmcnt(0) 470​; GCN-NEXT: s_waitcnt lgkmcnt(0)
474; GCN-NEXT: s_mov_b32 s4, s0 471​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s6
475; GCN-NEXT: s_mov_b32 s5, s1 472​; GCN-NEXT: v_cvt_f32_u32_e32 v1, s7
476; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2 473​; GCN-NEXT: s_sub_u32 s2, 0, s6
477; GCN-NEXT: v_cvt_f32_u32_e32 v3, s3 474​; GCN-NEXT: s_subb_u32 s3, 0, s7
478; GCN-NEXT: s_sub_u32 s8, 0, s2 475​; GCN-NEXT: s_mov_b32 s8, s4
479; GCN-NEXT: v_mov_b32_e32 v4, s3 476​; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
480; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 477​; GCN-NEXT: v_rcp_f32_e32 v0, v0
481; GCN-NEXT: s_subb_u32 s9, 0, s3 478​; GCN-NEXT: v_mov_b32_e32 v1, 0
482; GCN-NEXT: v_rcp_f32_e32 v2, v2 479​; GCN-NEXT: s_mov_b32 s9, s5
483; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 480​; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
484; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 481​; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v0
485; GCN-NEXT: v_trunc_f32_e32 v3, v3 482​; GCN-NEXT: v_trunc_f32_e32 v3, v3
486; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 483​; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v3
484​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
487; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3 485​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
488; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 486​; GCN-NEXT: v_mul_hi_u32 v5, s2, v0
489; GCN-NEXT: v_mul_lo_u32 v5, s8, v3 487​; GCN-NEXT: v_mul_lo_u32 v4, s2, v3
490; GCN-NEXT: v_mul_lo_u32 v6, s9, v2 488​; GCN-NEXT: v_mul_lo_u32 v7, s3, v0
491; GCN-NEXT: v_mul_hi_u32 v7, s8, v2 489​; GCN-NEXT: v_mul_lo_u32 v6, s2, v0
492; GCN-NEXT: v_mul_lo_u32 v8, s8, v2 490​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
493; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5 491​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v7
494; GCN-NEXT: v_mul_hi_u32 v7, v2, v8 492​; GCN-NEXT: v_mul_hi_u32 v5, v0, v6
495; GCN-NEXT: v_mul_hi_u32 v9, v3, v8 493​; GCN-NEXT: v_mul_lo_u32 v7, v0, v4
496; GCN-NEXT: v_mul_lo_u32 v8, v3, v8 494​; GCN-NEXT: v_mul_hi_u32 v9, v0, v4
497; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v6 495​; GCN-NEXT: v_mul_lo_u32 v8, v3, v6
498; GCN-NEXT: v_mul_hi_u32 v6, v2, v5 496​; GCN-NEXT: v_mul_hi_u32 v6, v3, v6
499; GCN-NEXT: v_mul_lo_u32 v10, v2, v5 497​; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7
500; GCN-NEXT: v_mul_hi_u32 v11, v3, v5 498​; GCN-NEXT: v_mul_hi_u32 v10, v3, v4
501; GCN-NEXT: v_mul_lo_u32 v5, v3, v5 499​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v2, v9, vcc
502; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10 500​; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
503; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v6, vcc 501​; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
504; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 502​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v6, vcc
505; GCN-NEXT: v_addc_u32_e32 v6, vcc, v6, v9, vcc 503​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v10, v1, vcc
506; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v0, vcc 504​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
507; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5 505​; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v4
508; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v7, vcc 506​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
509; GCN-NEXT: v_add_i32_e64 v2, s[0:1], v2, v5 507​; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
510; GCN-NEXT: v_addc_u32_e64 v5, vcc, v3, v6, s[0:1] 508​; GCN-NEXT: v_mul_lo_u32 v6, s2, v4
511; GCN-NEXT: v_mul_hi_u32 v7, s8, v2 509​; GCN-NEXT: v_mul_hi_u32 v7, s2, v0
512; GCN-NEXT: v_mul_lo_u32 v8, s9, v2 510​; GCN-NEXT: v_mul_lo_u32 v8, s3, v0
513; GCN-NEXT: v_mul_lo_u32 v9, s8, v2 511​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
514; GCN-NEXT: v_mul_lo_u32 v10, s8, v5 512​; GCN-NEXT: v_mul_lo_u32 v7, s2, v0
515; GCN-NEXT: v_mul_hi_u32 v11, v5, v9 513​; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6
516; GCN-NEXT: v_mul_lo_u32 v12, v5, v9 514​; GCN-NEXT: v_mul_lo_u32 v10, v0, v6
517; GCN-NEXT: v_mul_hi_u32 v9, v2, v9 515​; GCN-NEXT: v_mul_hi_u32 v12, v0, v6
516​; GCN-NEXT: v_mul_hi_u32 v11, v0, v7
517​; GCN-NEXT: v_mul_hi_u32 v9, v4, v7
518​; GCN-NEXT: v_mul_lo_u32 v7, v4, v7
519​; GCN-NEXT: v_mul_hi_u32 v8, v4, v6
520​; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
521​; GCN-NEXT: v_addc_u32_e32 v11, vcc, v2, v12, vcc
522​; GCN-NEXT: v_mul_lo_u32 v4, v4, v6
518; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10 523​; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10
519; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 524​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v9, vcc
520; GCN-NEXT: v_mul_hi_u32 v8, v5, v7 525​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v1, vcc
521; GCN-NEXT: v_mul_hi_u32 v10, v2, v7 526​; GCN-NEXT: v_add_i32_e32 v4, vcc, v7, v4
522; GCN-NEXT: v_mul_lo_u32 v13, v2, v7 527​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v6, vcc
523; GCN-NEXT: v_mul_lo_u32 v5, v5, v7 528​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
524; GCN-NEXT: v_add_i32_e32 v7, vcc, v9, v13 ​
525; GCN-NEXT: v_addc_u32_e32 v9, vcc, v1, v10, vcc ​
526; GCN-NEXT: v_add_i32_e32 v7, vcc, v12, v7 ​
527; GCN-NEXT: v_addc_u32_e32 v7, vcc, v9, v11, vcc ​
528; GCN-NEXT: v_addc_u32_e32 v8, vcc, v8, v0, vcc ​
529; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v6 ​
530; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5 ​
531; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v8, vcc ​
532; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1] 529​; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
533; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v5 530​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
534; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 531​; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
535; GCN-NEXT: v_mul_hi_u32 v2, v2, 24 532​; GCN-NEXT: v_mul_lo_u32 v4, v3, 24
536; GCN-NEXT: v_mul_hi_u32 v5, v3, 24 533​; GCN-NEXT: v_mul_hi_u32 v0, v0, 24
537; GCN-NEXT: v_mul_lo_u32 v3, v3, 24 534​; GCN-NEXT: v_mul_hi_u32 v3, v3, 24
538; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3 535​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
539; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v5, vcc 536​; GCN-NEXT: v_addc_u32_e32 v0, vcc, v2, v3, vcc
540; GCN-NEXT: v_addc_u32_e32 v0, vcc, 0, v0, vcc 537​; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
541; GCN-NEXT: v_mul_hi_u32 v2, s2, v1 538​; GCN-NEXT: v_mul_lo_u32 v1, s6, v1
542; GCN-NEXT: v_mul_lo_u32 v3, s3, v1 539​; GCN-NEXT: v_mul_hi_u32 v2, s6, v0
543; GCN-NEXT: v_mul_lo_u32 v1, s2, v1 540​; GCN-NEXT: v_mul_lo_u32 v3, s7, v0
544; GCN-NEXT: v_mul_lo_u32 v0, s2, v0 541​; GCN-NEXT: v_mul_lo_u32 v0, s6, v0
545; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v0 542​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
546; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 543​; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
547; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0, v0 544​; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0, v1
548; GCN-NEXT: v_sub_i32_e32 v3, vcc, 24, v1 545​; GCN-NEXT: v_mov_b32_e32 v3, s7
549; GCN-NEXT: v_subb_u32_e64 v1, s[0:1], v2, v4, vcc 546​; GCN-NEXT: v_sub_i32_e32 v0, vcc, 24, v0
550; GCN-NEXT: v_subb_u32_e32 v0, vcc, 0, v0, vcc 547​; GCN-NEXT: v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
551; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v3 548​; GCN-NEXT: v_subrev_i32_e64 v4, s[0:1], s6, v0
552; GCN-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 549​; GCN-NEXT: v_subb_u32_e64 v3, s[2:3], v2, v3, s[0:1]
553; GCN-NEXT: v_subrev_i32_e32 v5, vcc, s2, v3 550​; GCN-NEXT: v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
554; GCN-NEXT: v_subb_u32_e64 v4, s[0:1], v1, v4, vcc 551​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s7, v2
555; GCN-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 552​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
556; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v5 553​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s6, v4
557; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 554​; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
558; GCN-NEXT: v_subrev_i32_e32 v7, vcc, s2, v5 555​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s7, v2
559; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v0 556​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[0:1]
560; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[0:1] 557​; GCN-NEXT: v_subrev_i32_e64 v6, s[0:1], s6, v4
561; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v1 558​; GCN-NEXT: v_subb_u32_e32 v1, vcc, 0, v1, vcc
562; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[0:1] 559​; GCN-NEXT: v_subbrev_u32_e64 v3, s[0:1], 0, v3, s[0:1]
563; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc 560​; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
564; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v0 561​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s7, v1
565; GCN-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc 562​; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]
566; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1 563​; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc
567; GCN-NEXT: v_cndmask_b32_e32 v6, v9, v6, vcc 564​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s6, v0
568; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 565​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
569; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc 566​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s7, v1
570; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v2 567​; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
571; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v1, s[0:1] 568​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3
572; GCN-NEXT: v_cndmask_b32_e32 v0, v5, v7, vcc 569​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
573; GCN-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[0:1] 570​; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v6, s[0:1]
574; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 571​; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
572​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
575; GCN-NEXT: s_endpgm 573​; GCN-NEXT: s_endpgm
576 %result = urem i64 24, %x 574​ %result = urem i64 24, %x
577 store i64 %result, i64 addrspace(1)* %out 575​ store i64 %result, i64 addrspace(1)* %out
578 ret void 576​ ret void
579} 577​}
580 578​
581define amdgpu_kernel void @s_test_urem_k_den_i64(i64 addrspace(1)* %out, i64 %x) { 579​define amdgpu_kernel void @s_test_urem_k_den_i64(i64 addrspace(1)* %out, i64 %x) {
582; GCN-LABEL: s_test_urem_k_den_i64: 580​; GCN-LABEL: s_test_urem_k_den_i64:
583; GCN: ; %bb.0: 581​; GCN: ; %bb.0:
584; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ​
585; GCN-NEXT: s_mov_b32 s7, 0xf000 ​
586; GCN-NEXT: s_mov_b32 s6, -1 ​
587; GCN-NEXT: v_mov_b32_e32 v0, 0x4f800000 582​; GCN-NEXT: v_mov_b32_e32 v0, 0x4f800000
588; GCN-NEXT: s_movk_i32 s8, 0xffe8 ​
589; GCN-NEXT: v_mov_b32_e32 v1, 0 ​
590; GCN-NEXT: v_mov_b32_e32 v2, 0 ​
591; GCN-NEXT: v_madak_f32 v0, 0, v0, 0x41c00000 583​; GCN-NEXT: v_madak_f32 v0, 0, v0, 0x41c00000
592; GCN-NEXT: v_rcp_f32_e32 v0, v0 584​; GCN-NEXT: v_rcp_f32_e32 v0, v0
585​; GCN-NEXT: s_movk_i32 s2, 0xffe8
586​; GCN-NEXT: v_mov_b32_e32 v8, 0
587​; GCN-NEXT: v_mov_b32_e32 v7, 0
593; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 588​; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
594; GCN-NEXT: s_waitcnt lgkmcnt(0) 589​; GCN-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0
595; GCN-NEXT: s_mov_b32 s4, s0 590​; GCN-NEXT: v_trunc_f32_e32 v1, v1
596; GCN-NEXT: s_mov_b32 s5, s1 591​; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1
597; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v0 ​
598; GCN-NEXT: v_mov_b32_e32 v4, s3 ​
599; GCN-NEXT: v_trunc_f32_e32 v3, v3 ​
600; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v3 ​
601; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3 ​
602; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 592​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
603; GCN-NEXT: v_mul_lo_u32 v5, v3, s8 593​; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
604; GCN-NEXT: v_mul_hi_u32 v6, v0, s8 594​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
605; GCN-NEXT: v_mul_lo_u32 v7, v0, s8 595​; GCN-NEXT: s_mov_b32 s11, 0xf000
606; GCN-NEXT: v_subrev_i32_e32 v6, vcc, v0, v6 596​; GCN-NEXT: v_mul_hi_u32 v2, v0, s2
607; GCN-NEXT: v_mul_hi_u32 v8, v0, v7 597​; GCN-NEXT: v_mul_lo_u32 v3, v1, s2
608; GCN-NEXT: v_mul_hi_u32 v9, v3, v7 598​; GCN-NEXT: v_mul_lo_u32 v4, v0, s2
609; GCN-NEXT: v_mul_lo_u32 v7, v3, v7 599​; GCN-NEXT: s_mov_b32 s10, -1
610; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v6 600​; GCN-NEXT: v_subrev_i32_e32 v2, vcc, v0, v2
611; GCN-NEXT: v_mul_hi_u32 v6, v0, v5 601​; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
612; GCN-NEXT: v_mul_lo_u32 v10, v0, v5 602​; GCN-NEXT: v_mul_lo_u32 v5, v0, v2
613; GCN-NEXT: v_mul_hi_u32 v11, v3, v5 603​; GCN-NEXT: v_mul_hi_u32 v6, v0, v4
614; GCN-NEXT: v_mul_lo_u32 v5, v3, v5 604​; GCN-NEXT: v_mul_hi_u32 v3, v0, v2
615; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v10 605​; GCN-NEXT: v_mul_hi_u32 v9, v1, v2
616; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v6, vcc 606​; GCN-NEXT: v_mul_lo_u32 v2, v1, v2
617; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v8 ​
618; GCN-NEXT: v_addc_u32_e32 v6, vcc, v6, v9, vcc ​
619; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v1, vcc ​
620; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5 607​; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5
621; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v7, vcc 608​; GCN-NEXT: v_mul_lo_u32 v6, v1, v4
622; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v5 609​; GCN-NEXT: v_mul_hi_u32 v4, v1, v4
623; GCN-NEXT: v_addc_u32_e64 v5, vcc, v3, v6, s[0:1] 610​; GCN-NEXT: v_addc_u32_e32 v3, vcc, v8, v3, vcc
624; GCN-NEXT: v_mul_hi_u32 v7, v0, s8 611​; GCN-NEXT: s_waitcnt lgkmcnt(0)
625; GCN-NEXT: v_mul_lo_u32 v8, v0, s8 612​; GCN-NEXT: s_mov_b32 s8, s4
626; GCN-NEXT: v_mul_lo_u32 v9, v5, s8 613​; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5
627; GCN-NEXT: v_subrev_i32_e32 v7, vcc, v0, v7 614​; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v4, vcc
628; GCN-NEXT: v_mul_hi_u32 v10, v0, v8 615​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v9, v7, vcc
629; GCN-NEXT: v_mul_hi_u32 v11, v5, v8 616​; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
630; GCN-NEXT: v_mul_lo_u32 v8, v5, v8 617​; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v2
631; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v9 618​; GCN-NEXT: v_addc_u32_e32 v3, vcc, v8, v4, vcc
632; GCN-NEXT: v_mul_hi_u32 v9, v0, v7 619​; GCN-NEXT: v_mul_hi_u32 v4, v0, s2
633; GCN-NEXT: v_mul_lo_u32 v12, v0, v7 620​; GCN-NEXT: v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
634; GCN-NEXT: v_mul_hi_u32 v13, v5, v7 621​; GCN-NEXT: v_mul_lo_u32 v5, v2, s2
635; GCN-NEXT: v_mul_lo_u32 v5, v5, v7 622​; GCN-NEXT: v_mul_lo_u32 v6, v0, s2
636; GCN-NEXT: v_add_i32_e32 v7, vcc, v10, v12 623​; GCN-NEXT: v_subrev_i32_e32 v4, vcc, v0, v4
637; GCN-NEXT: v_addc_u32_e32 v9, vcc, v2, v9, vcc 624​; GCN-NEXT: s_mov_b32 s9, s5
638; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 625​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
639; GCN-NEXT: v_addc_u32_e32 v7, vcc, v9, v11, vcc 626​; GCN-NEXT: v_mul_lo_u32 v5, v0, v4
640; GCN-NEXT: v_addc_u32_e32 v8, vcc, v13, v1, vcc 627​; GCN-NEXT: v_mul_hi_u32 v9, v0, v6
641; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v6 628​; GCN-NEXT: v_mul_hi_u32 v10, v0, v4
642; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5 629​; GCN-NEXT: v_mul_hi_u32 v11, v2, v4
643; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v8, vcc 630​; GCN-NEXT: v_add_i32_e32 v5, vcc, v9, v5
644; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1] 631​; GCN-NEXT: v_addc_u32_e32 v9, vcc, v8, v10, vcc
645; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v5 632​; GCN-NEXT: v_mul_lo_u32 v10, v2, v6
646; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 633​; GCN-NEXT: v_mul_hi_u32 v6, v2, v6
647; GCN-NEXT: v_mul_hi_u32 v5, s2, v0 634​; GCN-NEXT: v_mul_lo_u32 v2, v2, v4
648; GCN-NEXT: v_mul_hi_u32 v6, s3, v0 635​; GCN-NEXT: v_add_i32_e32 v5, vcc, v10, v5
649; GCN-NEXT: v_mul_lo_u32 v0, s3, v0 636​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v9, v6, vcc
650; GCN-NEXT: v_mul_hi_u32 v7, s2, v3 637​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v11, v7, vcc
651; GCN-NEXT: v_mul_lo_u32 v8, s2, v3 638​; GCN-NEXT: v_add_i32_e32 v2, vcc, v5, v2
652; GCN-NEXT: v_mul_hi_u32 v9, s3, v3 639​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v8, v4, vcc
653; GCN-NEXT: v_mul_lo_u32 v3, s3, v3 640​; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
654; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v8 641​; GCN-NEXT: v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
655; GCN-NEXT: v_addc_u32_e32 v7, vcc, v2, v7, vcc 642​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
656; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v5 643​; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
657; GCN-NEXT: v_addc_u32_e32 v0, vcc, v7, v6, vcc 644​; GCN-NEXT: v_mul_lo_u32 v2, s6, v1
658; GCN-NEXT: v_addc_u32_e32 v1, vcc, v9, v1, vcc 645​; GCN-NEXT: v_mul_hi_u32 v3, s6, v0
659; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 646​; GCN-NEXT: v_mul_hi_u32 v4, s6, v1
660; GCN-NEXT: v_addc_u32_e32 v1, vcc, v2, v1, vcc 647​; GCN-NEXT: v_mul_hi_u32 v5, s7, v1
648​; GCN-NEXT: v_mul_lo_u32 v1, s7, v1
649​; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2
650​; GCN-NEXT: v_addc_u32_e32 v3, vcc, v8, v4, vcc
651​; GCN-NEXT: v_mul_lo_u32 v4, s7, v0
652​; GCN-NEXT: v_mul_hi_u32 v0, s7, v0
653​; GCN-NEXT: v_add_i32_e32 v2, vcc, v4, v2
654​; GCN-NEXT: v_addc_u32_e32 v0, vcc, v3, v0, vcc
655​; GCN-NEXT: v_addc_u32_e32 v2, vcc, v5, v7, vcc
656​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
657​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v8, v2, vcc
661; GCN-NEXT: v_mul_hi_u32 v2, v0, 24 658​; GCN-NEXT: v_mul_hi_u32 v2, v0, 24
662; GCN-NEXT: v_mul_lo_u32 v0, v0, 24 ​
663; GCN-NEXT: v_mul_lo_u32 v1, v1, 24 659​; GCN-NEXT: v_mul_lo_u32 v1, v1, 24
660​; GCN-NEXT: v_mul_lo_u32 v0, v0, 24
664; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1 661​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
665; GCN-NEXT: v_sub_i32_e32 v0, vcc, s2, v0 662​; GCN-NEXT: v_sub_i32_e32 v0, vcc, s6, v0
666; GCN-NEXT: v_subb_u32_e32 v1, vcc, v4, v1, vcc 663​; GCN-NEXT: v_mov_b32_e32 v2, s7
664​; GCN-NEXT: v_subb_u32_e32 v1, vcc, v2, v1, vcc
667; GCN-NEXT: v_subrev_i32_e32 v2, vcc, 24, v0 665​; GCN-NEXT: v_subrev_i32_e32 v2, vcc, 24, v0
668; GCN-NEXT: v_cmp_lt_u32_e64 s[0:1], 23, v0 666​; GCN-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v1, vcc
669; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, s[0:1] 667​; GCN-NEXT: v_subrev_i32_e32 v4, vcc, 24, v2
670; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v1, vcc 668​; GCN-NEXT: v_subbrev_u32_e32 v5, vcc, 0, v3, vcc
671; GCN-NEXT: v_subrev_i32_e32 v5, vcc, 24, v2 669​; GCN-NEXT: v_cmp_lt_u32_e32 vcc, 23, v2
672; GCN-NEXT: v_cmp_lt_u32_e64 s[0:1], 23, v2 670​; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc
673; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1] 671​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
674; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 ​
675; GCN-NEXT: v_cndmask_b32_e64 v3, -1, v3, s[0:1] ​
676; GCN-NEXT: v_subbrev_u32_e32 v7, vcc, 0, v4, vcc ​
677; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 ​
678; GCN-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc 672​; GCN-NEXT: v_cndmask_b32_e32 v6, -1, v6, vcc
679; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 673​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6
680; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc 674​; GCN-NEXT: v_cmp_lt_u32_e64 s[0:1], 23, v0
681; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v3 675​; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
682; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[0:1] 676​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
683; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc 677​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1
678​; GCN-NEXT: v_cndmask_b32_e64 v5, -1, v5, s[0:1]
679​; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
680​; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
681​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
684; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] 682​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
685; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 683​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
686; GCN-NEXT: s_endpgm 684​; GCN-NEXT: s_endpgm
687 %result = urem i64 %x, 24 685​ %result = urem i64 %x, 24
688 store i64 %result, i64 addrspace(1)* %out 686​ store i64 %result, i64 addrspace(1)* %out
689 ret void 687​ ret void
690} 688​}
691 689​
692; FIXME: Constant bus violation 690​; FIXME: Constant bus violation
693; define i64 @v_test_urem_k_num_i64(i64 %x) { 691​; define i64 @v_test_urem_k_num_i64(i64 %x) {
694; %result = urem i64 24, %x 692​; %result = urem i64 24, %x
695; ret i64 %result 693​; ret i64 %result
696; } 694​; }
697 695​
698define i64 @v_test_urem_pow2_k_num_i64(i64 %x) { 696​define i64 @v_test_urem_pow2_k_num_i64(i64 %x) {
699; GCN-LABEL: v_test_urem_pow2_k_num_i64: 697​; GCN-LABEL: v_test_urem_pow2_k_num_i64:
700; GCN: ; %bb.0: 698​; GCN: ; %bb.0:
701; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 699​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
702; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0 700​; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0
703; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1 701​; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1
704; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v0 702​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v0
705; GCN-NEXT: v_subb_u32_e32 v5, vcc, 0, v1, vcc 703​; GCN-NEXT: v_subb_u32_e32 v5, vcc, 0, v1, vcc
706; GCN-NEXT: v_mov_b32_e32 v6, 0 704​; GCN-NEXT: v_mov_b32_e32 v12, 0
707; GCN-NEXT: v_mov_b32_e32 v7, 0 ​
708; GCN-NEXT: s_mov_b32 s6, 0x8000 ​
709; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 705​; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3
710; GCN-NEXT: v_rcp_f32_e32 v2, v2 706​; GCN-NEXT: v_rcp_f32_e32 v2, v2
707​; GCN-NEXT: v_mov_b32_e32 v11, 0
711; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 708​; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
712; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 709​; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
713; GCN-NEXT: v_trunc_f32_e32 v3, v3 710​; GCN-NEXT: v_trunc_f32_e32 v3, v3
714; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 711​; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
715; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3 ​
716; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 712​; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2
717; GCN-NEXT: v_mul_lo_u32 v8, v4, v3 713​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
718; GCN-NEXT: v_mul_lo_u32 v9, v5, v2 714​; GCN-NEXT: v_mul_hi_u32 v7, v4, v2
719; GCN-NEXT: v_mul_hi_u32 v10, v4, v2 715​; GCN-NEXT: v_mul_lo_u32 v6, v4, v3
720; GCN-NEXT: v_mul_lo_u32 v11, v4, v2 716​; GCN-NEXT: v_mul_lo_u32 v8, v5, v2
717​; GCN-NEXT: v_mul_lo_u32 v9, v4, v2
718​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
719​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8
720​; GCN-NEXT: v_mul_lo_u32 v8, v2, v6
721​; GCN-NEXT: v_mul_hi_u32 v10, v2, v9
722​; GCN-NEXT: v_mul_hi_u32 v7, v2, v6
723​; GCN-NEXT: v_mul_hi_u32 v13, v3, v6
724​; GCN-NEXT: v_mul_lo_u32 v6, v3, v6
721; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v8 725​; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v8
722; GCN-NEXT: v_mul_hi_u32 v10, v2, v11 726​; GCN-NEXT: v_mul_lo_u32 v10, v3, v9
723; GCN-NEXT: v_mul_hi_u32 v12, v3, v11 727​; GCN-NEXT: v_mul_hi_u32 v9, v3, v9
724; GCN-NEXT: v_mul_lo_u32 v11, v3, v11 728​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v12, v7, vcc
725; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v9 729​; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v8
726; GCN-NEXT: v_mul_hi_u32 v9, v2, v8 730​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v9, vcc
727; GCN-NEXT: v_mul_lo_u32 v13, v2, v8 731​; GCN-NEXT: v_addc_u32_e32 v8, vcc, v13, v11, vcc
728; GCN-NEXT: v_mul_hi_u32 v14, v3, v8 732​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
729; GCN-NEXT: v_mul_lo_u32 v8, v3, v8 733​; GCN-NEXT: v_add_i32_e64 v2, s[4:5], v2, v6
730; GCN-NEXT: v_add_i32_e32 v10, vcc, v10, v13 734​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v12, v8, vcc
731; GCN-NEXT: v_addc_u32_e32 v9, vcc, v7, v9, vcc 735​; GCN-NEXT: v_addc_u32_e64 v6, vcc, v3, v7, s[4:5]
732; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10 736​; GCN-NEXT: v_mul_lo_u32 v8, v4, v6
733; GCN-NEXT: v_addc_u32_e32 v9, vcc, v9, v12, vcc 737​; GCN-NEXT: v_mul_hi_u32 v9, v4, v2
734; GCN-NEXT: v_addc_u32_e32 v10, vcc, v14, v6, vcc ​
735; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8 ​
736; GCN-NEXT: v_addc_u32_e32 v9, vcc, v7, v10, vcc ​
737; GCN-NEXT: v_add_i32_e64 v2, s[4:5], v2, v8 ​
738; GCN-NEXT: v_addc_u32_e64 v8, vcc, v3, v9, s[4:5] ​
739; GCN-NEXT: v_mul_hi_u32 v10, v4, v2 ​
740; GCN-NEXT: v_mul_lo_u32 v5, v5, v2 738​; GCN-NEXT: v_mul_lo_u32 v5, v5, v2
741; GCN-NEXT: v_mul_lo_u32 v11, v4, v2 739​; GCN-NEXT: v_mul_lo_u32 v4, v4, v2
742; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v9 740​; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
743; GCN-NEXT: v_mul_lo_u32 v4, v4, v8 741​; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
744; GCN-NEXT: v_mul_hi_u32 v9, v8, v11 742​; GCN-NEXT: v_mul_lo_u32 v10, v2, v5
745; GCN-NEXT: v_mul_lo_u32 v12, v8, v11 743​; GCN-NEXT: v_mul_hi_u32 v13, v2, v4
746; GCN-NEXT: v_mul_hi_u32 v11, v2, v11 744​; GCN-NEXT: v_mul_hi_u32 v14, v2, v5
747; GCN-NEXT: v_add_i32_e32 v4, vcc, v10, v4 745​; GCN-NEXT: v_mul_hi_u32 v9, v6, v4
746​; GCN-NEXT: v_mul_lo_u32 v4, v6, v4
747​; GCN-NEXT: v_add_i32_e32 v10, vcc, v13, v10
748​; GCN-NEXT: v_mul_hi_u32 v8, v6, v5
749​; GCN-NEXT: v_addc_u32_e32 v13, vcc, v12, v14, vcc
750​; GCN-NEXT: v_mul_lo_u32 v5, v6, v5
751​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v10
752​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v13, v9, vcc
753​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v11, vcc
748; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5 754​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
749; GCN-NEXT: v_mul_hi_u32 v5, v8, v4 755​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v12, v6, vcc
750; GCN-NEXT: v_mul_hi_u32 v10, v2, v4 756​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7
751; GCN-NEXT: v_mul_lo_u32 v13, v2, v4 ​
752; GCN-NEXT: v_mul_lo_u32 v4, v8, v4 ​
753; GCN-NEXT: v_add_i32_e32 v8, vcc, v11, v13 ​
754; GCN-NEXT: v_addc_u32_e32 v10, vcc, v7, v10, vcc ​
755; GCN-NEXT: v_add_i32_e32 v8, vcc, v12, v8 ​
756; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v9, vcc ​
757; GCN-NEXT: v_addc_u32_e32 v5, vcc, v5, v6, vcc ​
758; GCN-NEXT: v_add_i32_e32 v4, vcc, v8, v4 ​
759; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v5, vcc ​
760; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v5, s[4:5] 757​; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v5, s[4:5]
761; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4 758​; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
762; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v3, vcc 759​; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v3, vcc
763; GCN-NEXT: v_lshrrev_b32_e32 v2, 17, v2 760​; GCN-NEXT: v_lshrrev_b32_e32 v2, 17, v2
764; GCN-NEXT: v_mul_lo_u32 v3, v1, v2 761​; GCN-NEXT: v_mul_lo_u32 v3, v1, v2
765; GCN-NEXT: v_mul_hi_u32 v4, v0, v2 762​; GCN-NEXT: v_mul_hi_u32 v4, v0, v2
766; GCN-NEXT: v_mul_lo_u32 v2, v0, v2 763​; GCN-NEXT: v_mul_lo_u32 v2, v0, v2
764​; GCN-NEXT: s_mov_b32 s4, 0x8000
767; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3 765​; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
768; GCN-NEXT: v_sub_i32_e32 v2, vcc, s6, v2 766​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3
769; GCN-NEXT: v_sub_i32_e64 v4, s[4:5], 0, v3 767​; GCN-NEXT: v_sub_i32_e32 v2, vcc, s4, v2
770; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v0 ​
771; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] ​
772; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v4, v1, vcc 768​; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v4, v1, vcc
773; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc 769​; GCN-NEXT: v_sub_i32_e64 v5, s[4:5], v2, v0
774; GCN-NEXT: v_sub_i32_e32 v6, vcc, v2, v0 770​; GCN-NEXT: v_subb_u32_e64 v6, s[6:7], v4, v1, s[4:5]
775; GCN-NEXT: v_subb_u32_e64 v7, s[4:5], v4, v1, vcc 771​; GCN-NEXT: v_subbrev_u32_e64 v4, s[4:5], 0, v4, s[4:5]
776; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc ​
777; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0 ​
778; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc ​
779; GCN-NEXT: v_sub_i32_e32 v0, vcc, v6, v0 ​
780; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v3, v1 ​
781; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] ​
782; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1 772​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1
783; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 773​; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5]
784; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v1 774​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v0
785; GCN-NEXT: v_cndmask_b32_e64 v5, v9, v5, s[4:5] 775​; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc
786; GCN-NEXT: v_subbrev_u32_e32 v7, vcc, 0, v7, vcc 776​; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5]
787; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v4, v1 777​; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v4, v1
788; GCN-NEXT: v_cndmask_b32_e32 v1, v10, v8, vcc 778​; GCN-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5]
789; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 779​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v3, v1
790; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc 780​; GCN-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v7
791; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5 781​; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc
792; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5] 782​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v0
793; GCN-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc 783​; GCN-NEXT: v_sub_i32_e64 v8, s[4:5], v5, v0
794; GCN-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] 784​; GCN-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
785​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v3, v1
786​; GCN-NEXT: v_cndmask_b32_e32 v0, v7, v0, vcc
787​; GCN-NEXT: v_subbrev_u32_e64 v1, s[4:5], 0, v6, s[4:5]
788​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v8, s[6:7]
789​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
790​; GCN-NEXT: v_cndmask_b32_e64 v1, v4, v1, s[6:7]
791​; GCN-NEXT: v_cndmask_b32_e32 v0, v2, v5, vcc
792​; GCN-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
795; GCN-NEXT: s_setpc_b64 s[30:31] 793​; GCN-NEXT: s_setpc_b64 s[30:31]
796 %result = urem i64 32768, %x 794​ %result = urem i64 32768, %x
797 ret i64 %result 795​ ret i64 %result
798} 796​}
799 797​
800define i64 @v_test_urem_pow2_k_den_i64(i64 %x) { 798​define i64 @v_test_urem_pow2_k_den_i64(i64 %x) {
801; GCN-LABEL: v_test_urem_pow2_k_den_i64: 799​; GCN-LABEL: v_test_urem_pow2_k_den_i64:
802; GCN: ; %bb.0: 800​; GCN: ; %bb.0:
803; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 801​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
804; GCN-NEXT: v_and_b32_e32 v0, 0x7fff, v0 802​; GCN-NEXT: v_and_b32_e32 v0, 0x7fff, v0
805; GCN-NEXT: v_mov_b32_e32 v1, 0 803​; GCN-NEXT: v_mov_b32_e32 v1, 0
806; GCN-NEXT: s_setpc_b64 s[30:31] 804​; GCN-NEXT: s_setpc_b64 s[30:31]
807 %result = urem i64 %x, 32768 805​ %result = urem i64 %x, 32768
808 ret i64 %result 806​ ret i64 %result
809} 807​}
810 808​
811define amdgpu_kernel void @s_test_urem24_k_num_i64(i64 addrspace(1)* %out, i64 %x) { 809​define amdgpu_kernel void @s_test_urem24_k_num_i64(i64 addrspace(1)* %out, i64 %x) {
812; GCN-LABEL: s_test_urem24_k_num_i64: 810​; GCN-LABEL: s_test_urem24_k_num_i64:
813; GCN: ; %bb.0: 811​; GCN: ; %bb.0:
814; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 812​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
815; GCN-NEXT: s_mov_b32 s7, 0xf000 ​
816; GCN-NEXT: s_mov_b32 s6, -1 ​
817; GCN-NEXT: s_waitcnt lgkmcnt(0) 813​; GCN-NEXT: s_waitcnt lgkmcnt(0)
818; GCN-NEXT: s_mov_b32 s4, s0 814​; GCN-NEXT: s_mov_b32 s6, -1
819; GCN-NEXT: s_mov_b32 s5, s1 815​; GCN-NEXT: s_lshr_b32 s8, s7, 8
820; GCN-NEXT: s_lshr_b32 s8, s3, 8 ​
821; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8 816​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
817​; GCN-NEXT: s_mov_b32 s7, 0xf000
822; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 818​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
823; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 819​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
824; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 820​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
825; GCN-NEXT: v_mul_hi_u32 v1, v0, s8 821​; GCN-NEXT: v_mul_lo_u32 v1, v0, s8
826; GCN-NEXT: v_mul_lo_u32 v2, v0, s8 822​; GCN-NEXT: v_mul_hi_u32 v2, v0, s8
827; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 823​; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
828; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 824​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
829; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] 825​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
830; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 826​; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
831; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 827​; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
832; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 828​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
833; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] 829​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
834; GCN-NEXT: v_mul_hi_u32 v0, v0, 24 830​; GCN-NEXT: v_mul_hi_u32 v0, v0, 24
835; GCN-NEXT: v_mul_lo_u32 v0, v0, s8 831​; GCN-NEXT: v_mul_lo_u32 v0, v0, s8
836; GCN-NEXT: v_sub_i32_e32 v1, vcc, 24, v0 832​; GCN-NEXT: v_sub_i32_e32 v1, vcc, 24, v0
837; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1 ​
838; GCN-NEXT: v_cmp_gt_u32_e64 s[0:1], 25, v0 833​; GCN-NEXT: v_cmp_gt_u32_e64 s[0:1], 25, v0
834​; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
839; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v1 835​; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s8, v1
840; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v1 836​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v1
841; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 837​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
842; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 838​; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
843; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] 839​; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
844; GCN-NEXT: v_mov_b32_e32 v1, 0 840​; GCN-NEXT: v_mov_b32_e32 v1, 0
845; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 841​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
846; GCN-NEXT: s_endpgm 842​; GCN-NEXT: s_endpgm
847 %x.shr = lshr i64 %x, 40 843​ %x.shr = lshr i64 %x, 40
848 %result = urem i64 24, %x.shr 844​ %result = urem i64 24, %x.shr
849 store i64 %result, i64 addrspace(1)* %out 845​ store i64 %result, i64 addrspace(1)* %out
850 ret void 846​ ret void
851} 847​}
852 848​
853define amdgpu_kernel void @s_test_urem24_k_den_i64(i64 addrspace(1)* %out, i64 %x) { 849​define amdgpu_kernel void @s_test_urem24_k_den_i64(i64 addrspace(1)* %out, i64 %x) {
854; GCN-LABEL: s_test_urem24_k_den_i64: 850​; GCN-LABEL: s_test_urem24_k_den_i64:
855; GCN: ; %bb.0: 851​; GCN: ; %bb.0:
852​; GCN-NEXT: s_movk_i32 s8, 0x5b7f
853​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
856; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 854​; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
855​; GCN-NEXT: s_movk_i32 s9, 0x5b7e
857; GCN-NEXT: s_mov_b32 s7, 0xf000 856​; GCN-NEXT: s_mov_b32 s7, 0xf000
857​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
858; GCN-NEXT: s_mov_b32 s6, -1 858​; GCN-NEXT: s_mov_b32 s6, -1
859; GCN-NEXT: s_waitcnt lgkmcnt(0) 859​; GCN-NEXT: s_waitcnt lgkmcnt(0)
860; GCN-NEXT: s_movk_i32 s2, 0x5b7f ​
861; GCN-NEXT: s_movk_i32 s8, 0x5b7e ​
862; GCN-NEXT: v_cvt_f32_u32_e32 v0, s2 ​
863; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 ​
864; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 ​
865; GCN-NEXT: s_mov_b32 s4, s0 860​; GCN-NEXT: s_mov_b32 s4, s0
866; GCN-NEXT: s_mov_b32 s5, s1 861​; GCN-NEXT: s_mov_b32 s5, s1
867; GCN-NEXT: s_lshr_b32 s3, s3, 8 862​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
868; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 863​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
869; GCN-NEXT: v_mul_hi_u32 v1, v0, s2 864​; GCN-NEXT: s_lshr_b32 s2, s3, 8
870; GCN-NEXT: v_mul_lo_u32 v2, v0, s2 865​; GCN-NEXT: v_mul_lo_u32 v1, v0, s8
871; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 866​; GCN-NEXT: v_mul_hi_u32 v2, v0, s8
872; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 867​; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
873; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] 868​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
869​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
874; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 870​; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
875; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 871​; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
876; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 872​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
877; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] 873​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
878; GCN-NEXT: v_mul_hi_u32 v0, v0, s3 874​; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
879; GCN-NEXT: v_mul_lo_u32 v0, v0, s2 875​; GCN-NEXT: v_mul_lo_u32 v0, v0, s8
880; GCN-NEXT: v_sub_i32_e32 v1, vcc, s3, v0 876​; GCN-NEXT: v_sub_i32_e32 v1, vcc, s2, v0
881; GCN-NEXT: v_add_i32_e32 v2, vcc, s2, v1 877​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0
882; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s3, v0 878​; GCN-NEXT: v_add_i32_e32 v2, vcc, s8, v1
883; GCN-NEXT: v_cmp_lt_u32_e64 s[2:3], s8, v1 879​; GCN-NEXT: v_cmp_lt_u32_e64 s[2:3], s9, v1
884; GCN-NEXT: v_add_i32_e32 v0, vcc, 0xffffa481, v1 880​; GCN-NEXT: v_add_i32_e32 v0, vcc, 0xffffa481, v1
885; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 881​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
886; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 882​; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
887; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] 883​; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
888; GCN-NEXT: v_mov_b32_e32 v1, 0 884​; GCN-NEXT: v_mov_b32_e32 v1, 0
889; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 885​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
890; GCN-NEXT: s_endpgm 886​; GCN-NEXT: s_endpgm
891 %x.shr = lshr i64 %x, 40 887​ %x.shr = lshr i64 %x, 40
892 %result = urem i64 %x.shr, 23423 888​ %result = urem i64 %x.shr, 23423
893 store i64 %result, i64 addrspace(1)* %out 889​ store i64 %result, i64 addrspace(1)* %out
894 ret void 890​ ret void
895} 891​}
896 892​
897define i64 @v_test_urem24_k_num_i64(i64 %x) { 893​define i64 @v_test_urem24_k_num_i64(i64 %x) {
898; GCN-LABEL: v_test_urem24_k_num_i64: 894​; GCN-LABEL: v_test_urem24_k_num_i64:
899; GCN: ; %bb.0: 895​; GCN: ; %bb.0:
900; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 896​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
901; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1 897​; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1
902; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0 898​; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0
903; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1 899​; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1
904; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1 900​; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1
905; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1 901​; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
906; GCN-NEXT: v_mul_hi_u32 v2, v1, v0 902​; GCN-NEXT: v_mul_lo_u32 v2, v1, v0
907; GCN-NEXT: v_mul_lo_u32 v3, v1, v0 903​; GCN-NEXT: v_mul_hi_u32 v3, v1, v0
908; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3 904​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v2
909; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 905​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
910; GCN-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc 906​; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
911; GCN-NEXT: v_mul_hi_u32 v2, v2, v1 907​; GCN-NEXT: v_mul_hi_u32 v2, v2, v1
912; GCN-NEXT: v_add_i32_e64 v3, s[4:5], v1, v2 908​; GCN-NEXT: v_add_i32_e64 v3, s[4:5], v1, v2
913; GCN-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2 909​; GCN-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2
914; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc 910​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
915; GCN-NEXT: v_mul_hi_u32 v1, v1, 24 911​; GCN-NEXT: v_mul_hi_u32 v1, v1, 24
916; GCN-NEXT: v_mul_lo_u32 v1, v1, v0 912​; GCN-NEXT: v_mul_lo_u32 v1, v1, v0
917; GCN-NEXT: v_sub_i32_e32 v2, vcc, 24, v1 913​; GCN-NEXT: v_sub_i32_e32 v2, vcc, 24, v1
918; GCN-NEXT: v_add_i32_e32 v3, vcc, v2, v0 914​; GCN-NEXT: v_add_i32_e32 v3, vcc, v2, v0
Show All 10 Lines922; GCN-NEXT: s_setpc_b64 s[30:31]
929 ret i64 %result 925​ ret i64 %result
930} 926​}
931 927​
932define i64 @v_test_urem24_pow2_k_num_i64(i64 %x) { 928​define i64 @v_test_urem24_pow2_k_num_i64(i64 %x) {
933; GCN-LABEL: v_test_urem24_pow2_k_num_i64: 929​; GCN-LABEL: v_test_urem24_pow2_k_num_i64:
934; GCN: ; %bb.0: 930​; GCN: ; %bb.0:
935; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 931​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
936; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1 932​; GCN-NEXT: v_lshrrev_b32_e32 v0, 8, v1
937; GCN-NEXT: s_mov_b32 s6, 0x8001 ​
938; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0 933​; GCN-NEXT: v_cvt_f32_u32_e32 v1, v0
934​; GCN-NEXT: s_mov_b32 s6, 0x8001
939; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1 935​; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v1
940; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1 936​; GCN-NEXT: v_mul_f32_e32 v1, 0x4f800000, v1
941; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1 937​; GCN-NEXT: v_cvt_u32_f32_e32 v1, v1
942; GCN-NEXT: v_mul_hi_u32 v2, v1, v0 938​; GCN-NEXT: v_mul_lo_u32 v2, v1, v0
943; GCN-NEXT: v_mul_lo_u32 v3, v1, v0 939​; GCN-NEXT: v_mul_hi_u32 v3, v1, v0
944; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3 940​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v2
945; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 941​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
946; GCN-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc 942​; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
947; GCN-NEXT: v_mul_hi_u32 v2, v2, v1 943​; GCN-NEXT: v_mul_hi_u32 v2, v2, v1
948; GCN-NEXT: v_add_i32_e64 v3, s[4:5], v1, v2 944​; GCN-NEXT: v_add_i32_e64 v3, s[4:5], v1, v2
949; GCN-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2 945​; GCN-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v2
950; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc 946​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
951; GCN-NEXT: v_lshrrev_b32_e32 v1, 17, v1 947​; GCN-NEXT: v_lshrrev_b32_e32 v1, 17, v1
952; GCN-NEXT: v_mul_u32_u24_e32 v1, v1, v0 948​; GCN-NEXT: v_mul_u32_u24_e32 v1, v1, v0
953; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0x8000, v1 949​; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0x8000, v1
954; GCN-NEXT: v_add_i32_e32 v3, vcc, v2, v0 950​; GCN-NEXT: v_add_i32_e32 v3, vcc, v2, v0
Show All 24 Lines