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Differential D74594 Diff 244599 llvm/test/CodeGen/AMDGPU/srem64.ll

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llvm/test/CodeGen/AMDGPU/srem64.ll

1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 1​; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2​; RUN: llc -march=amdgcn -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3 3​
4define amdgpu_kernel void @s_test_srem(i64 addrspace(1)* %out, i64 %x, i64 %y) { 4​define amdgpu_kernel void @s_test_srem(i64 addrspace(1)* %out, i64 %x, i64 %y) {
5; GCN-LABEL: s_test_srem: 5​; GCN-LABEL: s_test_srem:
6; GCN: ; %bb.0: 6​; GCN: ; %bb.0:
7​; GCN-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0xd
8​; GCN-NEXT: v_mov_b32_e32 v2, 0
7; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 9​; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
8; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd ​
9; GCN-NEXT: s_mov_b32 s7, 0xf000 10​; GCN-NEXT: s_mov_b32 s7, 0xf000
10; GCN-NEXT: s_mov_b32 s6, -1 11​; GCN-NEXT: s_mov_b32 s6, -1
11; GCN-NEXT: v_mov_b32_e32 v0, 0 ​
12; GCN-NEXT: v_mov_b32_e32 v1, 0 ​
13; GCN-NEXT: s_waitcnt lgkmcnt(0) 12​; GCN-NEXT: s_waitcnt lgkmcnt(0)
13​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s12
14​; GCN-NEXT: v_cvt_f32_u32_e32 v1, s13
15​; GCN-NEXT: s_sub_u32 s2, 0, s12
16​; GCN-NEXT: s_subb_u32 s3, 0, s13
14; GCN-NEXT: s_mov_b32 s4, s8 17​; GCN-NEXT: s_mov_b32 s4, s8
18​; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
19​; GCN-NEXT: v_rcp_f32_e32 v0, v0
20​; GCN-NEXT: v_mov_b32_e32 v1, 0
15; GCN-NEXT: s_mov_b32 s5, s9 21​; GCN-NEXT: s_mov_b32 s5, s9
16; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2 22​; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
17; GCN-NEXT: v_cvt_f32_u32_e32 v3, s3 23​; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v0
18; GCN-NEXT: s_sub_u32 s8, 0, s2 ​
19; GCN-NEXT: v_mov_b32_e32 v4, s3 ​
20; GCN-NEXT: v_mov_b32_e32 v5, s11 ​
21; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 ​
22; GCN-NEXT: s_subb_u32 s9, 0, s3 ​
23; GCN-NEXT: v_rcp_f32_e32 v2, v2 ​
24; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 ​
25; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 ​
26; GCN-NEXT: v_trunc_f32_e32 v3, v3 24​; GCN-NEXT: v_trunc_f32_e32 v3, v3
27; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 25​; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v3
26​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
28; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3 27​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
29; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 28​; GCN-NEXT: v_mul_hi_u32 v5, s2, v0
30; GCN-NEXT: v_mul_lo_u32 v6, s8, v3 29​; GCN-NEXT: v_mul_lo_u32 v4, s2, v3
31; GCN-NEXT: v_mul_lo_u32 v7, s9, v2 30​; GCN-NEXT: v_mul_lo_u32 v7, s3, v0
32; GCN-NEXT: v_mul_hi_u32 v8, s8, v2 31​; GCN-NEXT: v_mul_lo_u32 v6, s2, v0
33; GCN-NEXT: v_mul_lo_u32 v9, s8, v2 32​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
34; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6 33​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v7
35; GCN-NEXT: v_mul_hi_u32 v8, v2, v9 34​; GCN-NEXT: v_mul_hi_u32 v5, v0, v6
36; GCN-NEXT: v_mul_hi_u32 v10, v3, v9 35​; GCN-NEXT: v_mul_lo_u32 v7, v0, v4
37; GCN-NEXT: v_mul_lo_u32 v9, v3, v9 36​; GCN-NEXT: v_mul_hi_u32 v9, v0, v4
38; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7 37​; GCN-NEXT: v_mul_lo_u32 v8, v3, v6
39; GCN-NEXT: v_mul_hi_u32 v7, v2, v6 38​; GCN-NEXT: v_mul_hi_u32 v6, v3, v6
40; GCN-NEXT: v_mul_lo_u32 v11, v2, v6 39​; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7
41; GCN-NEXT: v_mul_hi_u32 v12, v3, v6 40​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v2, v9, vcc
42; GCN-NEXT: v_mul_lo_u32 v6, v3, v6 41​; GCN-NEXT: v_mul_hi_u32 v9, v3, v4
43; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v11 42​; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
44; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v7, vcc 43​; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
45; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8 44​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v6, vcc
46; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v10, vcc 45​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v9, v1, vcc
47; GCN-NEXT: v_addc_u32_e32 v8, vcc, v12, v0, vcc 46​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
47​; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v4
48​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
49​; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
50​; GCN-NEXT: v_mul_lo_u32 v6, s2, v4
51​; GCN-NEXT: v_mul_hi_u32 v7, s2, v0
52​; GCN-NEXT: v_mul_lo_u32 v8, s3, v0
48; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6 53​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
49; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v8, vcc 54​; GCN-NEXT: v_mul_lo_u32 v7, s2, v0
50; GCN-NEXT: v_add_i32_e64 v2, s[0:1], v2, v6 ​
51; GCN-NEXT: v_addc_u32_e64 v6, vcc, v3, v7, s[0:1] ​
52; GCN-NEXT: v_mul_hi_u32 v8, s8, v2 ​
53; GCN-NEXT: v_mul_lo_u32 v9, s9, v2 ​
54; GCN-NEXT: v_mul_lo_u32 v10, s8, v2 ​
55; GCN-NEXT: v_mul_lo_u32 v11, s8, v6 ​
56; GCN-NEXT: v_mul_hi_u32 v12, v6, v10 ​
57; GCN-NEXT: v_mul_lo_u32 v13, v6, v10 ​
58; GCN-NEXT: v_mul_hi_u32 v10, v2, v10 ​
59; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v11 ​
60; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8 ​
61; GCN-NEXT: v_mul_hi_u32 v9, v6, v8 ​
62; GCN-NEXT: v_mul_hi_u32 v11, v2, v8 ​
63; GCN-NEXT: v_mul_lo_u32 v14, v2, v8 ​
64; GCN-NEXT: v_mul_lo_u32 v6, v6, v8 ​
65; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v14 ​
66; GCN-NEXT: v_addc_u32_e32 v10, vcc, v1, v11, vcc ​
67; GCN-NEXT: v_add_i32_e32 v8, vcc, v13, v8 ​
68; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v12, vcc ​
69; GCN-NEXT: v_addc_u32_e32 v9, vcc, v9, v0, vcc ​
70; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7 ​
71; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6 55​; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6
72; GCN-NEXT: v_addc_u32_e32 v7, vcc, v1, v9, vcc 56​; GCN-NEXT: v_mul_lo_u32 v10, v0, v6
73; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v7, s[0:1] 57​; GCN-NEXT: v_mul_hi_u32 v12, v0, v6
74; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6 58​; GCN-NEXT: v_mul_hi_u32 v11, v0, v7
59​; GCN-NEXT: v_mul_hi_u32 v9, v4, v7
60​; GCN-NEXT: v_mul_lo_u32 v7, v4, v7
61​; GCN-NEXT: v_mul_hi_u32 v8, v4, v6
62​; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
63​; GCN-NEXT: v_addc_u32_e32 v11, vcc, v2, v12, vcc
64​; GCN-NEXT: v_mul_lo_u32 v4, v4, v6
65​; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10
66​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v9, vcc
67​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v1, vcc
68​; GCN-NEXT: v_add_i32_e32 v4, vcc, v7, v4
69​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v6, vcc
70​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
71​; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
72​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
75; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 73​; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
76; GCN-NEXT: v_mul_hi_u32 v6, s10, v2 74​; GCN-NEXT: v_mul_lo_u32 v4, s10, v3
77; GCN-NEXT: v_mul_hi_u32 v7, s11, v2 75​; GCN-NEXT: v_mul_hi_u32 v5, s10, v0
78; GCN-NEXT: v_mul_lo_u32 v2, s11, v2 76​; GCN-NEXT: v_mul_hi_u32 v6, s10, v3
79; GCN-NEXT: v_mul_hi_u32 v8, s10, v3 77​; GCN-NEXT: v_mul_hi_u32 v7, s11, v3
80; GCN-NEXT: v_mul_lo_u32 v9, s10, v3 ​
81; GCN-NEXT: v_mul_hi_u32 v10, s11, v3 ​
82; GCN-NEXT: v_mul_lo_u32 v3, s11, v3 78​; GCN-NEXT: v_mul_lo_u32 v3, s11, v3
83; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v9 79​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
84; GCN-NEXT: v_addc_u32_e32 v8, vcc, v1, v8, vcc 80​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
85; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6 81​; GCN-NEXT: v_mul_lo_u32 v6, s11, v0
86; GCN-NEXT: v_addc_u32_e32 v2, vcc, v8, v7, vcc 82​; GCN-NEXT: v_mul_hi_u32 v0, s11, v0
87; GCN-NEXT: v_addc_u32_e32 v0, vcc, v10, v0, vcc 83​; GCN-NEXT: v_add_i32_e32 v4, vcc, v6, v4
88; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v3 84​; GCN-NEXT: v_addc_u32_e32 v0, vcc, v5, v0, vcc
89; GCN-NEXT: v_addc_u32_e32 v0, vcc, v1, v0, vcc 85​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v7, v1, vcc
90; GCN-NEXT: v_mul_hi_u32 v1, s2, v2 ​
91; GCN-NEXT: v_mul_lo_u32 v3, s3, v2 ​
92; GCN-NEXT: v_mul_lo_u32 v2, s2, v2 ​
93; GCN-NEXT: v_mul_lo_u32 v0, s2, v0 ​
94; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0 ​
95; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 86​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3
96; GCN-NEXT: v_sub_i32_e32 v1, vcc, s11, v0 87​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v2, v1, vcc
97; GCN-NEXT: v_sub_i32_e32 v2, vcc, s10, v2 88​; GCN-NEXT: v_mul_lo_u32 v1, s12, v1
98; GCN-NEXT: v_subb_u32_e64 v1, s[0:1], v1, v4, vcc 89​; GCN-NEXT: v_mul_hi_u32 v2, s12, v0
99; GCN-NEXT: v_subb_u32_e32 v0, vcc, v5, v0, vcc 90​; GCN-NEXT: v_mul_lo_u32 v3, s13, v0
100; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v2 91​; GCN-NEXT: v_mul_lo_u32 v0, s12, v0
92​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
93​; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
94​; GCN-NEXT: v_sub_i32_e32 v2, vcc, s11, v1
95​; GCN-NEXT: v_mov_b32_e32 v3, s13
96​; GCN-NEXT: v_sub_i32_e32 v0, vcc, s10, v0
97​; GCN-NEXT: v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
98​; GCN-NEXT: v_subrev_i32_e64 v4, s[0:1], s12, v0
99​; GCN-NEXT: v_subb_u32_e64 v3, s[2:3], v2, v3, s[0:1]
100​; GCN-NEXT: v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
101​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s13, v2
102​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
103​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s12, v4
104​; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
105​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s13, v2
106​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[0:1]
107​; GCN-NEXT: v_subrev_i32_e64 v6, s[0:1], s12, v4
108​; GCN-NEXT: v_subbrev_u32_e64 v3, s[0:1], 0, v3, s[0:1]
109​; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
110​; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]
111​; GCN-NEXT: v_mov_b32_e32 v3, s11
112​; GCN-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc
113​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s13, v1
101; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc 114​; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc
102; GCN-NEXT: v_subrev_i32_e32 v5, vcc, s2, v2 115​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s12, v0
103; GCN-NEXT: v_subb_u32_e64 v4, s[0:1], v1, v4, vcc 116​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
104; GCN-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 117​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s13, v1
105; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v5 118​; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
106; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 119​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3
107; GCN-NEXT: v_subrev_i32_e32 v7, vcc, s2, v5 120​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
108; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v0 121​; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v6, s[0:1]
109; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[0:1] 122​; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
110; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v1 ​
111; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[0:1] ​
112; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc ​
113; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v0 ​
114; GCN-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc ​
115; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1 ​
116; GCN-NEXT: v_cndmask_b32_e32 v6, v9, v6, vcc ​
117; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 ​
118; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ​
119; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v3 ​
120; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v1, s[0:1] ​
121; GCN-NEXT: v_cndmask_b32_e32 v0, v5, v7, vcc ​
122; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] ​
123; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 123​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
124; GCN-NEXT: s_endpgm 124​; GCN-NEXT: s_endpgm
125 %result = urem i64 %x, %y 125​ %result = urem i64 %x, %y
126 store i64 %result, i64 addrspace(1)* %out 126​ store i64 %result, i64 addrspace(1)* %out
127 ret void 127​ ret void
128} 128​}
129 129​
130define i64 @v_test_srem(i64 %x, i64 %y) { 130​define i64 @v_test_srem(i64 %x, i64 %y) {
131; GCN-LABEL: v_test_srem: 131​; GCN-LABEL: v_test_srem:
132; GCN: ; %bb.0: 132​; GCN: ; %bb.0:
133; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 133​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
134; GCN-NEXT: v_ashrrev_i32_e32 v4, 31, v3 134​; GCN-NEXT: v_ashrrev_i32_e32 v4, 31, v3
135; GCN-NEXT: v_mov_b32_e32 v5, 0 ​
136; GCN-NEXT: v_mov_b32_e32 v6, 0 ​
137; GCN-NEXT: v_ashrrev_i32_e32 v7, 31, v1 ​
138; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4 135​; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
139; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v4, vcc 136​; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v4, vcc
140; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v7 ​
141; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v7, vcc ​
142; GCN-NEXT: v_xor_b32_e32 v3, v3, v4 137​; GCN-NEXT: v_xor_b32_e32 v3, v3, v4
143; GCN-NEXT: v_xor_b32_e32 v2, v2, v4 138​; GCN-NEXT: v_xor_b32_e32 v2, v2, v4
144; GCN-NEXT: v_xor_b32_e32 v1, v1, v7 ​
145; GCN-NEXT: v_xor_b32_e32 v0, v0, v7 ​
146; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2 139​; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2
147; GCN-NEXT: v_cvt_f32_u32_e32 v8, v3 140​; GCN-NEXT: v_cvt_f32_u32_e32 v5, v3
148; GCN-NEXT: v_sub_i32_e32 v9, vcc, 0, v2 141​; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v2
149; GCN-NEXT: v_subb_u32_e32 v10, vcc, 0, v3, vcc 142​; GCN-NEXT: v_subb_u32_e32 v7, vcc, 0, v3, vcc
150; GCN-NEXT: v_mac_f32_e32 v4, 0x4f800000, v8 143​; GCN-NEXT: v_mov_b32_e32 v14, 0
144​; GCN-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5
151; GCN-NEXT: v_rcp_f32_e32 v4, v4 145​; GCN-NEXT: v_rcp_f32_e32 v4, v4
146​; GCN-NEXT: v_mov_b32_e32 v13, 0
152; GCN-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 147​; GCN-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4
153; GCN-NEXT: v_mul_f32_e32 v8, 0x2f800000, v4 148​; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4
154; GCN-NEXT: v_trunc_f32_e32 v8, v8 149​; GCN-NEXT: v_trunc_f32_e32 v5, v5
155; GCN-NEXT: v_mac_f32_e32 v4, 0xcf800000, v8 150​; GCN-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5
156; GCN-NEXT: v_cvt_u32_f32_e32 v8, v8 ​
157; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4 151​; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4
158; GCN-NEXT: v_mul_lo_u32 v11, v9, v8 152​; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5
159; GCN-NEXT: v_mul_lo_u32 v12, v10, v4 153​; GCN-NEXT: v_mul_hi_u32 v8, v6, v4
160; GCN-NEXT: v_mul_hi_u32 v13, v9, v4 154​; GCN-NEXT: v_mul_lo_u32 v9, v6, v5
161; GCN-NEXT: v_mul_lo_u32 v14, v9, v4 155​; GCN-NEXT: v_mul_lo_u32 v10, v7, v4
162; GCN-NEXT: v_add_i32_e32 v11, vcc, v13, v11 156​; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v9
163; GCN-NEXT: v_mul_hi_u32 v13, v4, v14 157​; GCN-NEXT: v_mul_lo_u32 v9, v6, v4
164; GCN-NEXT: v_mul_hi_u32 v15, v8, v14 158​; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v10
165; GCN-NEXT: v_mul_lo_u32 v14, v8, v14 159​; GCN-NEXT: v_mul_lo_u32 v11, v4, v8
166; GCN-NEXT: v_add_i32_e32 v11, vcc, v11, v12 160​; GCN-NEXT: v_mul_hi_u32 v10, v4, v8
167; GCN-NEXT: v_mul_hi_u32 v12, v4, v11 161​; GCN-NEXT: v_mul_hi_u32 v12, v4, v9
168; GCN-NEXT: v_mul_lo_u32 v16, v4, v11 162​; GCN-NEXT: v_mul_hi_u32 v15, v5, v8
169; GCN-NEXT: v_mul_hi_u32 v17, v8, v11 163​; GCN-NEXT: v_mul_lo_u32 v8, v5, v8
170; GCN-NEXT: v_mul_lo_u32 v11, v8, v11 ​
171; GCN-NEXT: v_add_i32_e32 v13, vcc, v13, v16 ​
172; GCN-NEXT: v_addc_u32_e32 v12, vcc, v6, v12, vcc ​
173; GCN-NEXT: v_add_i32_e32 v13, vcc, v14, v13 ​
174; GCN-NEXT: v_addc_u32_e32 v12, vcc, v12, v15, vcc ​
175; GCN-NEXT: v_addc_u32_e32 v13, vcc, v17, v5, vcc ​
176; GCN-NEXT: v_add_i32_e32 v11, vcc, v12, v11 164​; GCN-NEXT: v_add_i32_e32 v11, vcc, v12, v11
177; GCN-NEXT: v_addc_u32_e32 v12, vcc, v6, v13, vcc 165​; GCN-NEXT: v_mul_lo_u32 v12, v5, v9
178; GCN-NEXT: v_add_i32_e64 v4, s[4:5], v4, v11 166​; GCN-NEXT: v_mul_hi_u32 v9, v5, v9
179; GCN-NEXT: v_addc_u32_e64 v11, vcc, v8, v12, s[4:5] 167​; GCN-NEXT: v_addc_u32_e32 v10, vcc, v14, v10, vcc
180; GCN-NEXT: v_mul_hi_u32 v13, v9, v4 168​; GCN-NEXT: v_add_i32_e32 v11, vcc, v12, v11
181; GCN-NEXT: v_mul_lo_u32 v10, v10, v4 169​; GCN-NEXT: v_addc_u32_e32 v9, vcc, v10, v9, vcc
182; GCN-NEXT: v_mul_lo_u32 v14, v9, v4 170​; GCN-NEXT: v_addc_u32_e32 v10, vcc, v15, v13, vcc
183; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v12 171​; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
184; GCN-NEXT: v_mul_lo_u32 v9, v9, v11 172​; GCN-NEXT: v_add_i32_e64 v4, s[4:5], v4, v8
185; GCN-NEXT: v_mul_hi_u32 v12, v11, v14 173​; GCN-NEXT: v_addc_u32_e32 v9, vcc, v14, v10, vcc
186; GCN-NEXT: v_mul_lo_u32 v15, v11, v14 174​; GCN-NEXT: v_addc_u32_e64 v8, vcc, v5, v9, s[4:5]
187; GCN-NEXT: v_mul_hi_u32 v14, v4, v14 175​; GCN-NEXT: v_mul_lo_u32 v10, v6, v8
188; GCN-NEXT: v_add_i32_e32 v9, vcc, v13, v9 176​; GCN-NEXT: v_mul_hi_u32 v11, v6, v4
189; GCN-NEXT: v_add_i32_e32 v9, vcc, v9, v10 177​; GCN-NEXT: v_mul_lo_u32 v7, v7, v4
190; GCN-NEXT: v_mul_hi_u32 v10, v11, v9 178​; GCN-NEXT: v_mul_lo_u32 v6, v6, v4
191; GCN-NEXT: v_mul_hi_u32 v13, v4, v9 179​; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
192; GCN-NEXT: v_mul_lo_u32 v16, v4, v9 180​; GCN-NEXT: v_add_i32_e32 v7, vcc, v10, v7
193; GCN-NEXT: v_mul_lo_u32 v9, v11, v9 181​; GCN-NEXT: v_mul_lo_u32 v12, v4, v7
194; GCN-NEXT: v_add_i32_e32 v11, vcc, v14, v16 182​; GCN-NEXT: v_mul_hi_u32 v15, v4, v6
195; GCN-NEXT: v_addc_u32_e32 v13, vcc, v6, v13, vcc 183​; GCN-NEXT: v_mul_hi_u32 v16, v4, v7
196; GCN-NEXT: v_add_i32_e32 v11, vcc, v15, v11 184​; GCN-NEXT: v_mul_hi_u32 v11, v8, v6
197; GCN-NEXT: v_addc_u32_e32 v11, vcc, v13, v12, vcc 185​; GCN-NEXT: v_mul_lo_u32 v6, v8, v6
198; GCN-NEXT: v_addc_u32_e32 v10, vcc, v10, v5, vcc 186​; GCN-NEXT: v_add_i32_e32 v12, vcc, v15, v12
199; GCN-NEXT: v_add_i32_e32 v9, vcc, v11, v9 187​; GCN-NEXT: v_mul_hi_u32 v10, v8, v7
200; GCN-NEXT: v_addc_u32_e32 v10, vcc, v6, v10, vcc 188​; GCN-NEXT: v_addc_u32_e32 v15, vcc, v14, v16, vcc
201; GCN-NEXT: v_addc_u32_e64 v8, vcc, v8, v10, s[4:5] 189​; GCN-NEXT: v_mul_lo_u32 v7, v8, v7
202; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v9 190​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v12
203; GCN-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 191​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v15, v11, vcc
204; GCN-NEXT: v_mul_hi_u32 v9, v0, v4 192​; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v13, vcc
205; GCN-NEXT: v_mul_hi_u32 v10, v1, v4 193​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7
206; GCN-NEXT: v_mul_lo_u32 v4, v1, v4 194​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v14, v8, vcc
207; GCN-NEXT: v_mul_hi_u32 v11, v0, v8 195​; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v9
208; GCN-NEXT: v_mul_lo_u32 v12, v0, v8 196​; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5]
209; GCN-NEXT: v_mul_hi_u32 v13, v1, v8 197​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
210; GCN-NEXT: v_mul_lo_u32 v8, v1, v8 198​; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
211; GCN-NEXT: v_add_i32_e32 v9, vcc, v9, v12 199​; GCN-NEXT: v_ashrrev_i32_e32 v6, 31, v1
212; GCN-NEXT: v_addc_u32_e32 v11, vcc, v6, v11, vcc 200​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v6
213; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v9 201​; GCN-NEXT: v_xor_b32_e32 v0, v0, v6
214; GCN-NEXT: v_addc_u32_e32 v4, vcc, v11, v10, vcc 202​; GCN-NEXT: v_mul_lo_u32 v7, v0, v5
215; GCN-NEXT: v_addc_u32_e32 v5, vcc, v13, v5, vcc 203​; GCN-NEXT: v_mul_hi_u32 v8, v0, v4
216; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v8 204​; GCN-NEXT: v_mul_hi_u32 v9, v0, v5
217; GCN-NEXT: v_addc_u32_e32 v5, vcc, v6, v5, vcc 205​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v6, vcc
218; GCN-NEXT: v_mul_hi_u32 v6, v2, v4 206​; GCN-NEXT: v_xor_b32_e32 v1, v1, v6
207​; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7
208​; GCN-NEXT: v_addc_u32_e32 v8, vcc, v14, v9, vcc
209​; GCN-NEXT: v_mul_lo_u32 v9, v1, v4
210​; GCN-NEXT: v_mul_hi_u32 v4, v1, v4
211​; GCN-NEXT: v_mul_hi_u32 v10, v1, v5
212​; GCN-NEXT: v_mul_lo_u32 v5, v1, v5
213​; GCN-NEXT: v_add_i32_e32 v7, vcc, v9, v7
214​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v8, v4, vcc
215​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v10, v13, vcc
216​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
217​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v14, v7, vcc
218​; GCN-NEXT: v_mul_lo_u32 v5, v2, v5
219​; GCN-NEXT: v_mul_hi_u32 v7, v2, v4
219; GCN-NEXT: v_mul_lo_u32 v8, v3, v4 220​; GCN-NEXT: v_mul_lo_u32 v8, v3, v4
220; GCN-NEXT: v_mul_lo_u32 v4, v2, v4 221​; GCN-NEXT: v_mul_lo_u32 v4, v2, v4
221; GCN-NEXT: v_mul_lo_u32 v5, v2, v5 222​; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5
222; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5 ​
223; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v8 223​; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v8
224; GCN-NEXT: v_sub_i32_e32 v6, vcc, v1, v5 224​; GCN-NEXT: v_sub_i32_e32 v7, vcc, v1, v5
225; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 225​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4
226; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v6, v3, vcc 226​; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v7, v3, vcc
227​; GCN-NEXT: v_sub_i32_e64 v7, s[4:5], v0, v2
228​; GCN-NEXT: v_subb_u32_e64 v8, s[6:7], v4, v3, s[4:5]
229​; GCN-NEXT: v_subbrev_u32_e64 v4, s[4:5], 0, v4, s[4:5]
230​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3
227; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 231​; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc
228; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 232​; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5]
229; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 233​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v2
230; GCN-NEXT: v_sub_i32_e32 v6, vcc, v0, v2 ​
231; GCN-NEXT: v_subb_u32_e64 v8, s[4:5], v4, v3, vcc ​
232; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc ​
233; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v2 ​
234; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, vcc ​
235; GCN-NEXT: v_sub_i32_e32 v2, vcc, v6, v2 ​
236; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v1, v3 ​
237; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 234​; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5]
238; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3 235​; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v4, v3
239; GCN-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 236​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3
240; GCN-NEXT: v_subbrev_u32_e32 v8, vcc, 0, v8, vcc 237​; GCN-NEXT: v_cndmask_b32_e64 v9, v9, v10, s[4:5]
238​; GCN-NEXT: v_sub_i32_e64 v10, s[4:5], v7, v2
239​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
240​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2
241​; GCN-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v8, s[4:5]
242​; GCN-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc
241; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3 243​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3
242; GCN-NEXT: v_cndmask_b32_e32 v5, v10, v5, vcc 244​; GCN-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc
243; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v4, v3 245​; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v9
244; GCN-NEXT: v_cndmask_b32_e32 v3, v11, v9, vcc 246​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2
245; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3 247​; GCN-NEXT: v_cndmask_b32_e64 v2, v7, v10, s[4:5]
246; GCN-NEXT: v_cndmask_b32_e32 v3, v4, v8, vcc 248​; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
247; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5 249​; GCN-NEXT: v_cndmask_b32_e64 v4, v4, v8, s[4:5]
248; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[4:5] 250​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
249; GCN-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc 251​; GCN-NEXT: v_xor_b32_e32 v0, v0, v6
250; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] 252​; GCN-NEXT: v_xor_b32_e32 v1, v1, v6
251; GCN-NEXT: v_xor_b32_e32 v1, v1, v7 253​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v6
252; GCN-NEXT: v_xor_b32_e32 v0, v0, v7 254​; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v6, vcc
253; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v7 ​
254; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v7, vcc ​
255; GCN-NEXT: s_setpc_b64 s[30:31] 255​; GCN-NEXT: s_setpc_b64 s[30:31]
256 %result = srem i64 %x, %y 256​ %result = srem i64 %x, %y
257 ret i64 %result 257​ ret i64 %result
258} 258​}
259 259​
260define amdgpu_kernel void @s_test_srem23_64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 260​define amdgpu_kernel void @s_test_srem23_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
261; GCN-LABEL: s_test_srem23_64: 261​; GCN-LABEL: s_test_srem23_64:
262; GCN: ; %bb.0: 262​; GCN: ; %bb.0:
263; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 263​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
264; GCN-NEXT: s_load_dword s9, s[0:1], 0xe 264​; GCN-NEXT: s_load_dword s1, s[0:1], 0xe
265; GCN-NEXT: s_mov_b32 s3, 0xf000 265​; GCN-NEXT: s_mov_b32 s3, 0xf000
266; GCN-NEXT: s_mov_b32 s2, -1 266​; GCN-NEXT: s_mov_b32 s2, -1
267; GCN-NEXT: s_waitcnt lgkmcnt(0) 267​; GCN-NEXT: s_waitcnt lgkmcnt(0)
268; GCN-NEXT: s_mov_b32 s0, s4 268​; GCN-NEXT: s_ashr_i64 s[6:7], s[6:7], 41
269; GCN-NEXT: s_mov_b32 s1, s5 269​; GCN-NEXT: s_ashr_i64 s[0:1], s[0:1], 41
270; GCN-NEXT: s_ashr_i64 s[4:5], s[6:7], 41 270​; GCN-NEXT: v_cvt_f32_i32_e32 v0, s0
271; GCN-NEXT: s_ashr_i64 s[6:7], s[8:9], 41 271​; GCN-NEXT: v_cvt_f32_i32_e32 v1, s6
272; GCN-NEXT: s_xor_b32 s5, s4, s6 272​; GCN-NEXT: s_xor_b32 s1, s6, s0
273; GCN-NEXT: v_cvt_f32_i32_e32 v0, s6 273​; GCN-NEXT: s_ashr_i32 s1, s1, 30
274; GCN-NEXT: v_cvt_f32_i32_e32 v1, s4 ​
275; GCN-NEXT: s_ashr_i32 s5, s5, 30 ​
276; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0 274​; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0
277; GCN-NEXT: s_or_b32 s5, s5, 1 275​; GCN-NEXT: s_or_b32 s1, s1, 1
276​; GCN-NEXT: v_mov_b32_e32 v3, s1
277​; GCN-NEXT: s_mov_b32 s1, s5
278; GCN-NEXT: v_mul_f32_e32 v2, v1, v2 278​; GCN-NEXT: v_mul_f32_e32 v2, v1, v2
279; GCN-NEXT: v_trunc_f32_e32 v2, v2 279​; GCN-NEXT: v_trunc_f32_e32 v2, v2
280; GCN-NEXT: v_mov_b32_e32 v3, s5 ​
281; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1 280​; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1
281​; GCN-NEXT: v_cvt_i32_f32_e32 v2, v2
282; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0| 282​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
283; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc 283​; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
284; GCN-NEXT: v_cvt_i32_f32_e32 v1, v2 284​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
285; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1 285​; GCN-NEXT: v_mul_lo_u32 v0, v0, s0
286; GCN-NEXT: v_mul_lo_u32 v0, v0, s6 286​; GCN-NEXT: s_mov_b32 s0, s4
287; GCN-NEXT: v_sub_i32_e32 v0, vcc, s4, v0 287​; GCN-NEXT: v_sub_i32_e32 v0, vcc, s6, v0
288; GCN-NEXT: v_bfe_i32 v0, v0, 0, 23 288​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 23
289; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 289​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
290; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 290​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
291; GCN-NEXT: s_endpgm 291​; GCN-NEXT: s_endpgm
292 %1 = ashr i64 %x, 41 292​ %1 = ashr i64 %x, 41
293 %2 = ashr i64 %y, 41 293​ %2 = ashr i64 %y, 41
294 %result = srem i64 %1, %2 294​ %result = srem i64 %1, %2
295 store i64 %result, i64 addrspace(1)* %out 295​ store i64 %result, i64 addrspace(1)* %out
296 ret void 296​ ret void
297} 297​}
298 298​
299define amdgpu_kernel void @s_test_srem24_64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 299​define amdgpu_kernel void @s_test_srem24_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
300; GCN-LABEL: s_test_srem24_64: 300​; GCN-LABEL: s_test_srem24_64:
301; GCN: ; %bb.0: 301​; GCN: ; %bb.0:
302; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 302​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
303; GCN-NEXT: s_load_dword s9, s[0:1], 0xe 303​; GCN-NEXT: s_load_dword s1, s[0:1], 0xe
304; GCN-NEXT: s_mov_b32 s3, 0xf000 304​; GCN-NEXT: s_mov_b32 s3, 0xf000
305; GCN-NEXT: s_mov_b32 s2, -1 305​; GCN-NEXT: s_mov_b32 s2, -1
306; GCN-NEXT: s_waitcnt lgkmcnt(0) 306​; GCN-NEXT: s_waitcnt lgkmcnt(0)
307; GCN-NEXT: s_mov_b32 s0, s4 307​; GCN-NEXT: s_ashr_i64 s[6:7], s[6:7], 40
308; GCN-NEXT: s_mov_b32 s1, s5 308​; GCN-NEXT: s_ashr_i64 s[0:1], s[0:1], 40
309; GCN-NEXT: s_ashr_i64 s[4:5], s[6:7], 40 309​; GCN-NEXT: v_cvt_f32_i32_e32 v0, s0
310; GCN-NEXT: s_ashr_i64 s[6:7], s[8:9], 40 310​; GCN-NEXT: v_cvt_f32_i32_e32 v1, s6
311; GCN-NEXT: s_xor_b32 s5, s4, s6 311​; GCN-NEXT: s_xor_b32 s1, s6, s0
312; GCN-NEXT: v_cvt_f32_i32_e32 v0, s6 312​; GCN-NEXT: s_ashr_i32 s1, s1, 30
313; GCN-NEXT: v_cvt_f32_i32_e32 v1, s4 ​
314; GCN-NEXT: s_ashr_i32 s5, s5, 30 ​
315; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0 313​; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v0
316; GCN-NEXT: s_or_b32 s5, s5, 1 314​; GCN-NEXT: s_or_b32 s1, s1, 1
315​; GCN-NEXT: v_mov_b32_e32 v3, s1
316​; GCN-NEXT: s_mov_b32 s1, s5
317; GCN-NEXT: v_mul_f32_e32 v2, v1, v2 317​; GCN-NEXT: v_mul_f32_e32 v2, v1, v2
318; GCN-NEXT: v_trunc_f32_e32 v2, v2 318​; GCN-NEXT: v_trunc_f32_e32 v2, v2
319; GCN-NEXT: v_mov_b32_e32 v3, s5 ​
320; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1 319​; GCN-NEXT: v_mad_f32 v1, -v2, v0, v1
320​; GCN-NEXT: v_cvt_i32_f32_e32 v2, v2
321; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0| 321​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v0|
322; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc 322​; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc
323; GCN-NEXT: v_cvt_i32_f32_e32 v1, v2 323​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
324; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1 324​; GCN-NEXT: v_mul_lo_u32 v0, v0, s0
325; GCN-NEXT: v_mul_lo_u32 v0, v0, s6 325​; GCN-NEXT: s_mov_b32 s0, s4
326; GCN-NEXT: v_sub_i32_e32 v0, vcc, s4, v0 326​; GCN-NEXT: v_sub_i32_e32 v0, vcc, s6, v0
327; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24 327​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
328; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 328​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
329; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 329​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
330; GCN-NEXT: s_endpgm 330​; GCN-NEXT: s_endpgm
331 %1 = ashr i64 %x, 40 331​ %1 = ashr i64 %x, 40
332 %2 = ashr i64 %y, 40 332​ %2 = ashr i64 %y, 40
333 %result = srem i64 %1, %2 333​ %result = srem i64 %1, %2
334 store i64 %result, i64 addrspace(1)* %out 334​ store i64 %result, i64 addrspace(1)* %out
335 ret void 335​ ret void
336} 336​}
337 337​
338define i64 @v_test_srem24_64(i64 %x, i64 %y) { 338​define i64 @v_test_srem24_64(i64 %x, i64 %y) {
339; GCN-LABEL: v_test_srem24_64: 339​; GCN-LABEL: v_test_srem24_64:
340; GCN: ; %bb.0: 340​; GCN: ; %bb.0:
341; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 341​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
342​; GCN-NEXT: v_ashr_i64 v[2:3], v[2:3], 40
342; GCN-NEXT: v_ashr_i64 v[0:1], v[0:1], 40 343​; GCN-NEXT: v_ashr_i64 v[0:1], v[0:1], 40
343; GCN-NEXT: v_ashr_i64 v[1:2], v[2:3], 40 344​; GCN-NEXT: v_cvt_f32_i32_e32 v3, v2
344; GCN-NEXT: v_xor_b32_e32 v2, v0, v1 345​; GCN-NEXT: v_cvt_f32_i32_e32 v1, v0
345; GCN-NEXT: v_cvt_f32_i32_e32 v3, v0 346​; GCN-NEXT: v_xor_b32_e32 v5, v0, v2
346; GCN-NEXT: v_cvt_f32_i32_e32 v4, v1 347​; GCN-NEXT: v_ashrrev_i32_e32 v5, 30, v5
347; GCN-NEXT: v_ashrrev_i32_e32 v2, 30, v2 348​; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v3
348; GCN-NEXT: v_rcp_iflag_f32_e32 v5, v4 349​; GCN-NEXT: v_or_b32_e32 v5, 1, v5
349; GCN-NEXT: v_or_b32_e32 v2, 1, v2 350​; GCN-NEXT: v_mul_f32_e32 v4, v1, v4
350; GCN-NEXT: v_mul_f32_e32 v5, v3, v5 351​; GCN-NEXT: v_trunc_f32_e32 v4, v4
351; GCN-NEXT: v_trunc_f32_e32 v5, v5 352​; GCN-NEXT: v_mad_f32 v1, -v4, v3, v1
352; GCN-NEXT: v_mad_f32 v3, -v5, v4, v3 353​; GCN-NEXT: v_cvt_i32_f32_e32 v4, v4
353; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v4| 354​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v3|
354; GCN-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc 355​; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v5, vcc
355; GCN-NEXT: v_cvt_i32_f32_e32 v3, v5 356​; GCN-NEXT: v_add_i32_e32 v1, vcc, v4, v1
356; GCN-NEXT: v_add_i32_e32 v2, vcc, v3, v2 357​; GCN-NEXT: v_mul_lo_u32 v1, v1, v2
357; GCN-NEXT: v_mul_lo_u32 v1, v2, v1 ​
358; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 358​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
359; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24 359​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
360; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 360​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
361; GCN-NEXT: s_setpc_b64 s[30:31] 361​; GCN-NEXT: s_setpc_b64 s[30:31]
362 %1 = ashr i64 %x, 40 362​ %1 = ashr i64 %x, 40
363 %2 = ashr i64 %y, 40 363​ %2 = ashr i64 %y, 40
364 %result = srem i64 %1, %2 364​ %result = srem i64 %1, %2
365 ret i64 %result 365​ ret i64 %result
366} 366​}
367 367​
368define amdgpu_kernel void @s_test_srem25_64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 368​define amdgpu_kernel void @s_test_srem25_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
369; GCN-LABEL: s_test_srem25_64: 369​; GCN-LABEL: s_test_srem25_64:
370; GCN: ; %bb.0: 370​; GCN: ; %bb.0:
371; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ​
372; GCN-NEXT: s_load_dword s3, s[0:1], 0xe 371​; GCN-NEXT: s_load_dword s3, s[0:1], 0xe
373; GCN-NEXT: s_mov_b32 s11, 0xf000 372​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
374; GCN-NEXT: s_mov_b32 s10, -1 ​
375; GCN-NEXT: s_waitcnt lgkmcnt(0) 373​; GCN-NEXT: s_waitcnt lgkmcnt(0)
376; GCN-NEXT: s_mov_b32 s8, s4 ​
377; GCN-NEXT: s_mov_b32 s9, s5 ​
378; GCN-NEXT: s_ashr_i64 s[0:1], s[6:7], 39 ​
379; GCN-NEXT: s_ashr_i64 s[2:3], s[2:3], 39 374​; GCN-NEXT: s_ashr_i64 s[2:3], s[2:3], 39
380; GCN-NEXT: s_ashr_i32 s1, s2, 31 375​; GCN-NEXT: s_ashr_i32 s3, s2, 31
381; GCN-NEXT: s_ashr_i32 s4, s0, 31 376​; GCN-NEXT: s_add_i32 s2, s2, s3
382; GCN-NEXT: s_add_i32 s2, s2, s1 377​; GCN-NEXT: s_xor_b32 s9, s2, s3
383; GCN-NEXT: s_add_i32 s0, s0, s4 378​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s9
384; GCN-NEXT: s_xor_b32 s5, s2, s1 379​; GCN-NEXT: s_ashr_i64 s[2:3], s[6:7], 39
385; GCN-NEXT: s_xor_b32 s2, s0, s4 380​; GCN-NEXT: s_ashr_i32 s8, s2, 31
386; GCN-NEXT: v_cvt_f32_u32_e32 v0, s5 381​; GCN-NEXT: s_add_i32 s2, s2, s8
387; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 382​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
383​; GCN-NEXT: s_xor_b32 s2, s2, s8
384​; GCN-NEXT: s_mov_b32 s7, 0xf000
385​; GCN-NEXT: s_mov_b32 s6, -1
388; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 386​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
389; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 387​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
390; GCN-NEXT: v_mul_hi_u32 v1, v0, s5 388​; GCN-NEXT: v_mul_lo_u32 v1, v0, s9
391; GCN-NEXT: v_mul_lo_u32 v2, v0, s5 389​; GCN-NEXT: v_mul_hi_u32 v2, v0, s9
392; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 390​; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
393; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 391​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
394; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] 392​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
395; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 393​; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
396; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 394​; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
397; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 395​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
398; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] 396​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
399; GCN-NEXT: v_mul_hi_u32 v0, v0, s2 397​; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
400; GCN-NEXT: v_mul_lo_u32 v0, v0, s5 398​; GCN-NEXT: v_mul_lo_u32 v0, v0, s9
401; GCN-NEXT: v_sub_i32_e32 v1, vcc, s2, v0 399​; GCN-NEXT: v_sub_i32_e32 v1, vcc, s2, v0
402; GCN-NEXT: v_add_i32_e32 v2, vcc, s5, v1 ​
403; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0 400​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0
404; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s5, v1 401​; GCN-NEXT: v_add_i32_e32 v2, vcc, s9, v1
405; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s5, v1 402​; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s9, v1
403​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s9, v1
406; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 404​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
407; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 405​; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
408; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] 406​; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
409; GCN-NEXT: v_xor_b32_e32 v0, s4, v0 407​; GCN-NEXT: v_xor_b32_e32 v0, s8, v0
410; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s4, v0 408​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v0
411; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 409​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
412; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 410​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
413; GCN-NEXT: s_endpgm 411​; GCN-NEXT: s_endpgm
414 %1 = ashr i64 %x, 39 412​ %1 = ashr i64 %x, 39
415 %2 = ashr i64 %y, 39 413​ %2 = ashr i64 %y, 39
416 %result = srem i64 %1, %2 414​ %result = srem i64 %1, %2
417 store i64 %result, i64 addrspace(1)* %out 415​ store i64 %result, i64 addrspace(1)* %out
418 ret void 416​ ret void
419} 417​}
420 418​
421define amdgpu_kernel void @s_test_srem31_64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 419​define amdgpu_kernel void @s_test_srem31_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
422; GCN-LABEL: s_test_srem31_64: 420​; GCN-LABEL: s_test_srem31_64:
423; GCN: ; %bb.0: 421​; GCN: ; %bb.0:
424; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ​
425; GCN-NEXT: s_load_dword s3, s[0:1], 0xe 422​; GCN-NEXT: s_load_dword s3, s[0:1], 0xe
426; GCN-NEXT: s_mov_b32 s11, 0xf000 423​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
427; GCN-NEXT: s_mov_b32 s10, -1 ​
428; GCN-NEXT: s_waitcnt lgkmcnt(0) 424​; GCN-NEXT: s_waitcnt lgkmcnt(0)
429; GCN-NEXT: s_mov_b32 s8, s4 ​
430; GCN-NEXT: s_mov_b32 s9, s5 ​
431; GCN-NEXT: s_ashr_i64 s[0:1], s[6:7], 33 ​
432; GCN-NEXT: s_ashr_i64 s[2:3], s[2:3], 33 425​; GCN-NEXT: s_ashr_i64 s[2:3], s[2:3], 33
433; GCN-NEXT: s_ashr_i32 s1, s2, 31 426​; GCN-NEXT: s_ashr_i32 s3, s2, 31
434; GCN-NEXT: s_ashr_i32 s4, s0, 31 427​; GCN-NEXT: s_add_i32 s2, s2, s3
435; GCN-NEXT: s_add_i32 s2, s2, s1 428​; GCN-NEXT: s_xor_b32 s9, s2, s3
436; GCN-NEXT: s_add_i32 s0, s0, s4 429​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s9
437; GCN-NEXT: s_xor_b32 s5, s2, s1 430​; GCN-NEXT: s_ashr_i64 s[2:3], s[6:7], 33
438; GCN-NEXT: s_xor_b32 s2, s0, s4 431​; GCN-NEXT: s_ashr_i32 s8, s2, 31
439; GCN-NEXT: v_cvt_f32_u32_e32 v0, s5 432​; GCN-NEXT: s_add_i32 s2, s2, s8
440; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 433​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
434​; GCN-NEXT: s_xor_b32 s2, s2, s8
435​; GCN-NEXT: s_mov_b32 s7, 0xf000
436​; GCN-NEXT: s_mov_b32 s6, -1
441; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 437​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
442; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 438​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
443; GCN-NEXT: v_mul_hi_u32 v1, v0, s5 439​; GCN-NEXT: v_mul_lo_u32 v1, v0, s9
444; GCN-NEXT: v_mul_lo_u32 v2, v0, s5 440​; GCN-NEXT: v_mul_hi_u32 v2, v0, s9
445; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 441​; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
446; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 442​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
447; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] 443​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
448; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 444​; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
449; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 445​; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
450; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 446​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
451; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] 447​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
452; GCN-NEXT: v_mul_hi_u32 v0, v0, s2 448​; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
453; GCN-NEXT: v_mul_lo_u32 v0, v0, s5 449​; GCN-NEXT: v_mul_lo_u32 v0, v0, s9
454; GCN-NEXT: v_sub_i32_e32 v1, vcc, s2, v0 450​; GCN-NEXT: v_sub_i32_e32 v1, vcc, s2, v0
455; GCN-NEXT: v_add_i32_e32 v2, vcc, s5, v1 ​
456; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0 451​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0
457; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s5, v1 452​; GCN-NEXT: v_add_i32_e32 v2, vcc, s9, v1
458; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s5, v1 453​; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s9, v1
454​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s9, v1
459; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 455​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
460; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 456​; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
461; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] 457​; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
462; GCN-NEXT: v_xor_b32_e32 v0, s4, v0 458​; GCN-NEXT: v_xor_b32_e32 v0, s8, v0
463; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s4, v0 459​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v0
464; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 460​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
465; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 461​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
466; GCN-NEXT: s_endpgm 462​; GCN-NEXT: s_endpgm
467 %1 = ashr i64 %x, 33 463​ %1 = ashr i64 %x, 33
468 %2 = ashr i64 %y, 33 464​ %2 = ashr i64 %y, 33
469 %result = srem i64 %1, %2 465​ %result = srem i64 %1, %2
470 store i64 %result, i64 addrspace(1)* %out 466​ store i64 %result, i64 addrspace(1)* %out
471 ret void 467​ ret void
472} 468​}
473 469​
474; 32 known sign bits 470​; 32 known sign bits
475define amdgpu_kernel void @s_test_srem32_64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 471​define amdgpu_kernel void @s_test_srem32_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
476; GCN-LABEL: s_test_srem32_64: 472​; GCN-LABEL: s_test_srem32_64:
477; GCN: ; %bb.0: 473​; GCN: ; %bb.0:
478; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ​
479; GCN-NEXT: s_load_dword s2, s[0:1], 0xe 474​; GCN-NEXT: s_load_dword s2, s[0:1], 0xe
480; GCN-NEXT: s_mov_b32 s11, 0xf000 475​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
481; GCN-NEXT: s_mov_b32 s10, -1 ​
482; GCN-NEXT: s_waitcnt lgkmcnt(0) 476​; GCN-NEXT: s_waitcnt lgkmcnt(0)
483; GCN-NEXT: s_mov_b32 s8, s4 477​; GCN-NEXT: s_mov_b32 s6, -1
484; GCN-NEXT: s_mov_b32 s9, s5 478​; GCN-NEXT: s_ashr_i32 s3, s2, 31
485; GCN-NEXT: s_ashr_i32 s0, s2, 31 479​; GCN-NEXT: s_add_i32 s2, s2, s3
486; GCN-NEXT: s_ashr_i32 s4, s7, 31 480​; GCN-NEXT: s_xor_b32 s9, s2, s3
487; GCN-NEXT: s_add_i32 s2, s2, s0 481​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s9
488; GCN-NEXT: s_add_i32 s1, s7, s4 482​; GCN-NEXT: s_ashr_i32 s8, s7, 31
489; GCN-NEXT: s_xor_b32 s5, s2, s0 483​; GCN-NEXT: s_add_i32 s2, s7, s8
490; GCN-NEXT: s_xor_b32 s2, s1, s4 484​; GCN-NEXT: s_xor_b32 s2, s2, s8
491; GCN-NEXT: v_cvt_f32_u32_e32 v0, s5 ​
492; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0 485​; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0
486​; GCN-NEXT: s_mov_b32 s7, 0xf000
493; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0 487​; GCN-NEXT: v_mul_f32_e32 v0, 0x4f800000, v0
494; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0 488​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
495; GCN-NEXT: v_mul_hi_u32 v1, v0, s5 489​; GCN-NEXT: v_mul_lo_u32 v1, v0, s9
496; GCN-NEXT: v_mul_lo_u32 v2, v0, s5 490​; GCN-NEXT: v_mul_hi_u32 v2, v0, s9
497; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v2 491​; GCN-NEXT: v_sub_i32_e32 v3, vcc, 0, v1
498; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v1 492​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
499; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[0:1] 493​; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
500; GCN-NEXT: v_mul_hi_u32 v1, v1, v0 494​; GCN-NEXT: v_mul_hi_u32 v1, v1, v0
501; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0 495​; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v0
502; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0 496​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v1, v0
503; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] 497​; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
504; GCN-NEXT: v_mul_hi_u32 v0, v0, s2 498​; GCN-NEXT: v_mul_hi_u32 v0, v0, s2
505; GCN-NEXT: v_mul_lo_u32 v0, v0, s5 499​; GCN-NEXT: v_mul_lo_u32 v0, v0, s9
506; GCN-NEXT: v_sub_i32_e32 v1, vcc, s2, v0 500​; GCN-NEXT: v_sub_i32_e32 v1, vcc, s2, v0
507; GCN-NEXT: v_add_i32_e32 v2, vcc, s5, v1 ​
508; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0 501​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], s2, v0
509; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s5, v1 502​; GCN-NEXT: v_add_i32_e32 v2, vcc, s9, v1
510; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s5, v1 503​; GCN-NEXT: v_cmp_le_u32_e64 s[2:3], s9, v1
504​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s9, v1
511; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1] 505​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
512; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 506​; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
513; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1] 507​; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]
514; GCN-NEXT: v_xor_b32_e32 v0, s4, v0 508​; GCN-NEXT: v_xor_b32_e32 v0, s8, v0
515; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s4, v0 509​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v0
516; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 510​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
517; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 511​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
518; GCN-NEXT: s_endpgm 512​; GCN-NEXT: s_endpgm
519 %1 = ashr i64 %x, 32 513​ %1 = ashr i64 %x, 32
520 %2 = ashr i64 %y, 32 514​ %2 = ashr i64 %y, 32
521 %result = srem i64 %1, %2 515​ %result = srem i64 %1, %2
522 store i64 %result, i64 addrspace(1)* %out 516​ store i64 %result, i64 addrspace(1)* %out
523 ret void 517​ ret void
524} 518​}
525 519​
526; 33 known sign bits 520​; 33 known sign bits
527define amdgpu_kernel void @s_test_srem33_64(i64 addrspace(1)* %out, i64 %x, i64 %y) { 521​define amdgpu_kernel void @s_test_srem33_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
528; GCN-LABEL: s_test_srem33_64: 522​; GCN-LABEL: s_test_srem33_64:
529; GCN: ; %bb.0: 523​; GCN: ; %bb.0:
530; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 524​; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
531; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd 525​; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
526​; GCN-NEXT: v_mov_b32_e32 v7, 0
532; GCN-NEXT: s_mov_b32 s7, 0xf000 527​; GCN-NEXT: s_mov_b32 s7, 0xf000
533; GCN-NEXT: s_mov_b32 s6, -1 528​; GCN-NEXT: s_mov_b32 s6, -1
534; GCN-NEXT: v_mov_b32_e32 v0, 0 ​
535; GCN-NEXT: v_mov_b32_e32 v1, 0 ​
536; GCN-NEXT: s_waitcnt lgkmcnt(0) 529​; GCN-NEXT: s_waitcnt lgkmcnt(0)
537; GCN-NEXT: s_mov_b32 s4, s8 530​; GCN-NEXT: s_ashr_i64 s[2:3], s[10:11], 31
538; GCN-NEXT: s_mov_b32 s5, s9 531​; GCN-NEXT: s_ashr_i64 s[4:5], s[0:1], 31
539; GCN-NEXT: s_ashr_i64 s[0:1], s[10:11], 31 532​; GCN-NEXT: s_ashr_i32 s0, s1, 31
540; GCN-NEXT: s_ashr_i32 s8, s3, 31 533​; GCN-NEXT: s_add_u32 s4, s4, s0
541; GCN-NEXT: s_ashr_i64 s[2:3], s[2:3], 31 534​; GCN-NEXT: s_mov_b32 s1, s0
542; GCN-NEXT: s_mov_b32 s9, s8 535​; GCN-NEXT: s_addc_u32 s5, s5, s0
543; GCN-NEXT: s_add_u32 s2, s2, s8 536​; GCN-NEXT: s_xor_b64 s[12:13], s[4:5], s[0:1]
544; GCN-NEXT: s_addc_u32 s3, s3, s8 537​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s12
545; GCN-NEXT: s_xor_b64 s[2:3], s[2:3], s[8:9] 538​; GCN-NEXT: v_cvt_f32_u32_e32 v1, s13
546; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2 539​; GCN-NEXT: s_sub_u32 s4, 0, s12
547; GCN-NEXT: v_cvt_f32_u32_e32 v3, s3 540​; GCN-NEXT: s_subb_u32 s5, 0, s13
548; GCN-NEXT: s_sub_u32 s12, 0, s2 541​; GCN-NEXT: s_ashr_i32 s10, s11, 31
549; GCN-NEXT: v_mov_b32_e32 v4, s3 542​; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
550; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 543​; GCN-NEXT: v_rcp_f32_e32 v0, v0
551; GCN-NEXT: s_subb_u32 s13, 0, s3 544​; GCN-NEXT: v_mov_b32_e32 v1, 0
552; GCN-NEXT: s_ashr_i32 s8, s11, 31 545​; GCN-NEXT: s_mov_b32 s11, s10
553; GCN-NEXT: v_rcp_f32_e32 v2, v2 546​; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
554; GCN-NEXT: s_mov_b32 s9, s8 547​; GCN-NEXT: v_mul_f32_e32 v2, 0x2f800000, v0
555; GCN-NEXT: s_add_u32 s0, s0, s8 548​; GCN-NEXT: v_trunc_f32_e32 v2, v2
556; GCN-NEXT: v_mov_b32_e32 v3, s8 549​; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v2
557; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 550​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
558; GCN-NEXT: s_addc_u32 s1, s1, s8 ​
559; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v2 ​
560; GCN-NEXT: s_xor_b64 s[10:11], s[0:1], s[8:9] ​
561; GCN-NEXT: v_trunc_f32_e32 v5, v5 ​
562; GCN-NEXT: v_mov_b32_e32 v6, s11 ​
563; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v5 ​
564; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5 ​
565; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 551​; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2
566; GCN-NEXT: v_mul_lo_u32 v7, s12, v5 552​; GCN-NEXT: v_mul_hi_u32 v4, s4, v0
567; GCN-NEXT: v_mul_lo_u32 v8, s13, v2 553​; GCN-NEXT: v_mul_lo_u32 v3, s4, v2
568; GCN-NEXT: v_mul_hi_u32 v9, s12, v2 554​; GCN-NEXT: v_mul_lo_u32 v6, s5, v0
569; GCN-NEXT: v_mul_lo_u32 v10, s12, v2 555​; GCN-NEXT: v_mul_lo_u32 v5, s4, v0
570; GCN-NEXT: v_add_i32_e32 v7, vcc, v9, v7 556​; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
571; GCN-NEXT: v_mul_hi_u32 v9, v2, v10 557​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v6
572; GCN-NEXT: v_mul_hi_u32 v11, v5, v10 558​; GCN-NEXT: v_mul_hi_u32 v4, v0, v5
573; GCN-NEXT: v_mul_lo_u32 v10, v5, v10 559​; GCN-NEXT: v_mul_lo_u32 v6, v0, v3
574; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v8 560​; GCN-NEXT: v_mul_hi_u32 v8, v0, v3
575; GCN-NEXT: v_mul_hi_u32 v8, v2, v7 561​; GCN-NEXT: v_mul_hi_u32 v9, v2, v3
576; GCN-NEXT: v_mul_lo_u32 v12, v2, v7 562​; GCN-NEXT: v_mul_lo_u32 v3, v2, v3
577; GCN-NEXT: v_mul_hi_u32 v13, v5, v7 563​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
578; GCN-NEXT: v_mul_lo_u32 v7, v5, v7 564​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v7, v8, vcc
579; GCN-NEXT: v_add_i32_e32 v9, vcc, v9, v12 565​; GCN-NEXT: v_mul_lo_u32 v8, v2, v5
580; GCN-NEXT: v_addc_u32_e32 v8, vcc, v1, v8, vcc 566​; GCN-NEXT: v_mul_hi_u32 v5, v2, v5
581; GCN-NEXT: v_add_i32_e32 v9, vcc, v10, v9 567​; GCN-NEXT: v_add_i32_e32 v4, vcc, v8, v4
582; GCN-NEXT: v_addc_u32_e32 v8, vcc, v8, v11, vcc 568​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v6, v5, vcc
583; GCN-NEXT: v_addc_u32_e32 v9, vcc, v13, v0, vcc 569​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v9, v1, vcc
584; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 570​; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
585; GCN-NEXT: v_addc_u32_e32 v8, vcc, v1, v9, vcc 571​; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v3
586; GCN-NEXT: v_add_i32_e64 v2, s[0:1], v2, v7 572​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v7, v5, vcc
587; GCN-NEXT: v_addc_u32_e64 v7, vcc, v5, v8, s[0:1] 573​; GCN-NEXT: v_addc_u32_e64 v3, vcc, v2, v4, s[0:1]
588; GCN-NEXT: v_mul_hi_u32 v9, s12, v2 574​; GCN-NEXT: v_mul_lo_u32 v5, s4, v3
589; GCN-NEXT: v_mul_lo_u32 v10, s13, v2 575​; GCN-NEXT: v_mul_hi_u32 v6, s4, v0
590; GCN-NEXT: v_mul_lo_u32 v11, s12, v2 576​; GCN-NEXT: v_mul_lo_u32 v8, s5, v0
591; GCN-NEXT: v_mul_lo_u32 v12, s12, v7 577​; GCN-NEXT: s_mov_b32 s5, s9
592; GCN-NEXT: v_mul_hi_u32 v13, v7, v11 578​; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5
593; GCN-NEXT: v_mul_lo_u32 v14, v7, v11 579​; GCN-NEXT: v_mul_lo_u32 v6, s4, v0
594; GCN-NEXT: v_mul_hi_u32 v11, v2, v11 580​; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
595; GCN-NEXT: v_add_i32_e32 v9, vcc, v9, v12 581​; GCN-NEXT: v_mul_lo_u32 v10, v0, v5
596; GCN-NEXT: v_add_i32_e32 v9, vcc, v10, v9 582​; GCN-NEXT: v_mul_hi_u32 v12, v0, v5
597; GCN-NEXT: v_mul_hi_u32 v10, v7, v9 583​; GCN-NEXT: v_mul_hi_u32 v11, v0, v6
598; GCN-NEXT: v_mul_hi_u32 v12, v2, v9 584​; GCN-NEXT: v_mul_hi_u32 v9, v3, v6
599; GCN-NEXT: v_mul_lo_u32 v15, v2, v9 585​; GCN-NEXT: v_mul_lo_u32 v6, v3, v6
600; GCN-NEXT: v_mul_lo_u32 v7, v7, v9 586​; GCN-NEXT: v_mul_hi_u32 v8, v3, v5
601; GCN-NEXT: v_add_i32_e32 v9, vcc, v11, v15 587​; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
602; GCN-NEXT: v_addc_u32_e32 v11, vcc, v1, v12, vcc 588​; GCN-NEXT: v_addc_u32_e32 v11, vcc, v7, v12, vcc
603; GCN-NEXT: v_add_i32_e32 v9, vcc, v14, v9 589​; GCN-NEXT: v_mul_lo_u32 v3, v3, v5
604; GCN-NEXT: v_addc_u32_e32 v9, vcc, v11, v13, vcc 590​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v10
605; GCN-NEXT: v_addc_u32_e32 v10, vcc, v10, v0, vcc 591​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v11, v9, vcc
606; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v8 592​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v8, v1, vcc
607; GCN-NEXT: v_add_i32_e32 v7, vcc, v9, v7 593​; GCN-NEXT: v_add_i32_e32 v3, vcc, v6, v3
608; GCN-NEXT: v_addc_u32_e32 v8, vcc, v1, v10, vcc 594​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v5, vcc
609; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v8, s[0:1] 595​; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
610; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v7 596​; GCN-NEXT: v_addc_u32_e64 v2, vcc, v2, v5, s[0:1]
611; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 597​; GCN-NEXT: s_add_u32 s0, s2, s10
612; GCN-NEXT: v_mul_hi_u32 v7, s10, v2 598​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3
613; GCN-NEXT: v_mul_hi_u32 v8, s11, v2 599​; GCN-NEXT: s_addc_u32 s1, s3, s10
614; GCN-NEXT: v_mul_lo_u32 v2, s11, v2 600​; GCN-NEXT: s_xor_b64 s[14:15], s[0:1], s[10:11]
615; GCN-NEXT: v_mul_hi_u32 v9, s10, v5 601​; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc
616; GCN-NEXT: v_mul_lo_u32 v10, s10, v5 602​; GCN-NEXT: v_mul_lo_u32 v3, s14, v2
617; GCN-NEXT: v_mul_hi_u32 v11, s11, v5 603​; GCN-NEXT: v_mul_hi_u32 v4, s14, v0
618; GCN-NEXT: v_mul_lo_u32 v5, s11, v5 604​; GCN-NEXT: v_mul_hi_u32 v5, s14, v2
619; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10 605​; GCN-NEXT: v_mul_hi_u32 v6, s15, v2
620; GCN-NEXT: v_addc_u32_e32 v9, vcc, v1, v9, vcc 606​; GCN-NEXT: v_mul_lo_u32 v2, s15, v2
621; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v7 607​; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
622; GCN-NEXT: v_addc_u32_e32 v2, vcc, v9, v8, vcc 608​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v7, v5, vcc
623; GCN-NEXT: v_addc_u32_e32 v0, vcc, v11, v0, vcc 609​; GCN-NEXT: v_mul_lo_u32 v5, s15, v0
624; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v5 610​; GCN-NEXT: v_mul_hi_u32 v0, s15, v0
625; GCN-NEXT: v_addc_u32_e32 v0, vcc, v1, v0, vcc 611​; GCN-NEXT: s_mov_b32 s4, s8
626; GCN-NEXT: v_mul_hi_u32 v1, s2, v2 612​; GCN-NEXT: v_add_i32_e32 v3, vcc, v5, v3
627; GCN-NEXT: v_mul_lo_u32 v5, s3, v2 613​; GCN-NEXT: v_addc_u32_e32 v0, vcc, v4, v0, vcc
628; GCN-NEXT: v_mul_lo_u32 v2, s2, v2 614​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v6, v1, vcc
629; GCN-NEXT: v_mul_lo_u32 v0, s2, v0 615​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
630; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0 616​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v7, v1, vcc
631; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v5 617​; GCN-NEXT: v_mul_lo_u32 v1, s12, v1
632; GCN-NEXT: v_sub_i32_e32 v1, vcc, s11, v0 618​; GCN-NEXT: v_mul_hi_u32 v2, s12, v0
633; GCN-NEXT: v_sub_i32_e32 v2, vcc, s10, v2 619​; GCN-NEXT: v_mul_lo_u32 v3, s13, v0
634; GCN-NEXT: v_subb_u32_e64 v1, s[0:1], v1, v4, vcc 620​; GCN-NEXT: v_mul_lo_u32 v0, s12, v0
635; GCN-NEXT: v_subb_u32_e32 v0, vcc, v6, v0, vcc 621​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
636; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v2 622​; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
637; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 623​; GCN-NEXT: v_sub_i32_e32 v2, vcc, s15, v1
638; GCN-NEXT: v_subrev_i32_e32 v6, vcc, s2, v2 624​; GCN-NEXT: v_mov_b32_e32 v3, s13
639; GCN-NEXT: v_subb_u32_e64 v4, s[0:1], v1, v4, vcc 625​; GCN-NEXT: v_sub_i32_e32 v0, vcc, s14, v0
640; GCN-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 626​; GCN-NEXT: v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
641; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v6 627​; GCN-NEXT: v_subrev_i32_e64 v4, s[0:1], s12, v0
642; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc 628​; GCN-NEXT: v_subb_u32_e64 v3, s[2:3], v2, v3, s[0:1]
643; GCN-NEXT: v_subrev_i32_e32 v8, vcc, s2, v6 629​; GCN-NEXT: v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
644; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v0 630​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s13, v2
645; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[0:1] 631​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
646; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v1 632​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s12, v4
647; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[0:1] 633​; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
648; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc 634​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s13, v2
649; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v0 635​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[0:1]
650; GCN-NEXT: v_cndmask_b32_e32 v5, v9, v5, vcc 636​; GCN-NEXT: v_subrev_i32_e64 v6, s[0:1], s12, v4
651; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1 637​; GCN-NEXT: v_subbrev_u32_e64 v3, s[0:1], 0, v3, s[0:1]
652; GCN-NEXT: v_cndmask_b32_e32 v7, v10, v7, vcc ​
653; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 ​
654; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ​
655; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5 638​; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
656; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[0:1] 639​; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]
657; GCN-NEXT: v_cndmask_b32_e32 v1, v6, v8, vcc 640​; GCN-NEXT: v_mov_b32_e32 v3, s15
658; GCN-NEXT: v_cndmask_b32_e64 v1, v2, v1, s[0:1] 641​; GCN-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc
659; GCN-NEXT: v_xor_b32_e32 v2, s8, v0 642​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s13, v1
660; GCN-NEXT: v_xor_b32_e32 v0, s8, v1 643​; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc
661; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s8, v0 644​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s12, v0
662; GCN-NEXT: v_subb_u32_e32 v1, vcc, v2, v3, vcc 645​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
646​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s13, v1
647​; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
648​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3
649​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
650​; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v6, s[0:1]
651​; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
652​; GCN-NEXT: v_xor_b32_e32 v0, s10, v0
653​; GCN-NEXT: v_xor_b32_e32 v1, s10, v1
654​; GCN-NEXT: v_mov_b32_e32 v2, s10
655​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, s10, v0
656​; GCN-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc
663; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 657​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
664; GCN-NEXT: s_endpgm 658​; GCN-NEXT: s_endpgm
665 %1 = ashr i64 %x, 31 659​ %1 = ashr i64 %x, 31
666 %2 = ashr i64 %y, 31 660​ %2 = ashr i64 %y, 31
667 %result = srem i64 %1, %2 661​ %result = srem i64 %1, %2
668 store i64 %result, i64 addrspace(1)* %out 662​ store i64 %result, i64 addrspace(1)* %out
669 ret void 663​ ret void
670} 664​}
671 665​
672define amdgpu_kernel void @s_test_srem24_48(i48 addrspace(1)* %out, i48 %x, i48 %y) { 666​define amdgpu_kernel void @s_test_srem24_48(i48 addrspace(1)* %out, i48 %x, i48 %y) {
673; GCN-LABEL: s_test_srem24_48: 667​; GCN-LABEL: s_test_srem24_48:
674; GCN: ; %bb.0: 668​; GCN: ; %bb.0:
675; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9 669​; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
676; GCN-NEXT: s_load_dword s2, s[0:1], 0xb 670​; GCN-NEXT: s_load_dword s2, s[0:1], 0xb
677; GCN-NEXT: s_load_dword s3, s[0:1], 0xc 671​; GCN-NEXT: s_load_dword s3, s[0:1], 0xc
678; GCN-NEXT: s_load_dword s8, s[0:1], 0xd 672​; GCN-NEXT: s_load_dword s6, s[0:1], 0xd
679; GCN-NEXT: s_load_dword s9, s[0:1], 0xe 673​; GCN-NEXT: s_load_dword s0, s[0:1], 0xe
680; GCN-NEXT: s_mov_b32 s7, 0xf000 674​; GCN-NEXT: s_mov_b32 s7, 0xf000
681; GCN-NEXT: s_mov_b32 s6, -1 ​
682; GCN-NEXT: s_waitcnt lgkmcnt(0) 675​; GCN-NEXT: s_waitcnt lgkmcnt(0)
683; GCN-NEXT: s_sext_i32_i16 s0, s3 676​; GCN-NEXT: v_mov_b32_e32 v2, s2
684; GCN-NEXT: s_sext_i32_i16 s1, s9 677​; GCN-NEXT: s_sext_i32_i16 s1, s3
685; GCN-NEXT: v_mov_b32_e32 v0, s8 678​; GCN-NEXT: v_mov_b32_e32 v0, s6
686; GCN-NEXT: v_mov_b32_e32 v1, s2 679​; GCN-NEXT: s_sext_i32_i16 s0, s0
687; GCN-NEXT: v_alignbit_b32 v0, s1, v0, 24 680​; GCN-NEXT: v_alignbit_b32 v0, s0, v0, 24
688; GCN-NEXT: v_alignbit_b32 v1, s0, v1, 24 681​; GCN-NEXT: v_cvt_f32_i32_e32 v1, v0
689; GCN-NEXT: v_xor_b32_e32 v2, v1, v0 682​; GCN-NEXT: v_alignbit_b32 v2, s1, v2, 24
690; GCN-NEXT: v_cvt_f32_i32_e32 v3, v1 683​; GCN-NEXT: v_cvt_f32_i32_e32 v3, v2
691; GCN-NEXT: v_cvt_f32_i32_e32 v4, v0 684​; GCN-NEXT: v_xor_b32_e32 v5, v2, v0
692; GCN-NEXT: v_ashrrev_i32_e32 v2, 30, v2 685​; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v1
693; GCN-NEXT: v_rcp_iflag_f32_e32 v5, v4 686​; GCN-NEXT: v_ashrrev_i32_e32 v5, 30, v5
694; GCN-NEXT: v_or_b32_e32 v2, 1, v2 687​; GCN-NEXT: v_or_b32_e32 v5, 1, v5
695; GCN-NEXT: v_mul_f32_e32 v5, v3, v5 688​; GCN-NEXT: s_mov_b32 s6, -1
696; GCN-NEXT: v_trunc_f32_e32 v5, v5 689​; GCN-NEXT: v_mul_f32_e32 v4, v3, v4
697; GCN-NEXT: v_mad_f32 v3, -v5, v4, v3 690​; GCN-NEXT: v_trunc_f32_e32 v4, v4
698; GCN-NEXT: v_cvt_i32_f32_e32 v5, v5 691​; GCN-NEXT: v_mad_f32 v3, -v4, v1, v3
699; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v4| 692​; GCN-NEXT: v_cvt_i32_f32_e32 v4, v4
700; GCN-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc 693​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v1|
701; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v5 694​; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v5, vcc
702; GCN-NEXT: v_mul_lo_u32 v0, v2, v0 695​; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v4
703; GCN-NEXT: v_sub_i32_e32 v0, vcc, v1, v0 696​; GCN-NEXT: v_mul_lo_u32 v0, v1, v0
697​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v2, v0
704; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24 698​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
705; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 699​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
706; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 700​; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
707; GCN-NEXT: buffer_store_short v1, off, s[4:7], 0 offset:4 701​; GCN-NEXT: buffer_store_short v1, off, s[4:7], 0 offset:4
708; GCN-NEXT: s_endpgm 702​; GCN-NEXT: s_endpgm
709 %1 = ashr i48 %x, 24 703​ %1 = ashr i48 %x, 24
710 %2 = ashr i48 %y, 24 704​ %2 = ashr i48 %y, 24
711 %result = srem i48 %1, %2 705​ %result = srem i48 %1, %2
712 store i48 %result, i48 addrspace(1)* %out 706​ store i48 %result, i48 addrspace(1)* %out
713 ret void 707​ ret void
714} 708​}
715 709​
716define amdgpu_kernel void @s_test_srem_k_num_i64(i64 addrspace(1)* %out, i64 %x) { 710​define amdgpu_kernel void @s_test_srem_k_num_i64(i64 addrspace(1)* %out, i64 %x) {
717; GCN-LABEL: s_test_srem_k_num_i64: 711​; GCN-LABEL: s_test_srem_k_num_i64:
718; GCN: ; %bb.0: 712​; GCN: ; %bb.0:
719; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 713​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
720; GCN-NEXT: s_mov_b32 s7, 0xf000 714​; GCN-NEXT: v_mov_b32_e32 v2, 0
721; GCN-NEXT: s_mov_b32 s6, -1 ​
722; GCN-NEXT: v_mov_b32_e32 v0, 0 ​
723; GCN-NEXT: s_waitcnt lgkmcnt(0) 715​; GCN-NEXT: s_waitcnt lgkmcnt(0)
724; GCN-NEXT: s_ashr_i32 s8, s3, 31 716​; GCN-NEXT: s_ashr_i32 s0, s7, 31
717​; GCN-NEXT: s_add_u32 s2, s6, s0
718​; GCN-NEXT: s_addc_u32 s3, s7, s0
719​; GCN-NEXT: s_mov_b32 s1, s0
720​; GCN-NEXT: s_xor_b64 s[8:9], s[2:3], s[0:1]
721​; GCN-NEXT: v_cvt_f32_u32_e32 v0, s8
722​; GCN-NEXT: v_cvt_f32_u32_e32 v1, s9
723​; GCN-NEXT: s_sub_u32 s2, 0, s8
724​; GCN-NEXT: s_subb_u32 s3, 0, s9
725​; GCN-NEXT: s_mov_b32 s7, 0xf000
726​; GCN-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1
727​; GCN-NEXT: v_rcp_f32_e32 v0, v0
725; GCN-NEXT: v_mov_b32_e32 v1, 0 728​; GCN-NEXT: v_mov_b32_e32 v1, 0
726; GCN-NEXT: s_mov_b32 s4, s0 729​; GCN-NEXT: s_mov_b32 s6, -1
727; GCN-NEXT: s_mov_b32 s5, s1 730​; GCN-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0
728; GCN-NEXT: s_mov_b32 s9, s8 731​; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v0
729; GCN-NEXT: s_add_u32 s0, s2, s8 ​
730; GCN-NEXT: s_addc_u32 s1, s3, s8 ​
731; GCN-NEXT: s_xor_b64 s[2:3], s[0:1], s[8:9] ​
732; GCN-NEXT: v_cvt_f32_u32_e32 v2, s2 ​
733; GCN-NEXT: v_cvt_f32_u32_e32 v3, s3 ​
734; GCN-NEXT: s_sub_u32 s8, 0, s2 ​
735; GCN-NEXT: v_mov_b32_e32 v4, s3 ​
736; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3 ​
737; GCN-NEXT: s_subb_u32 s9, 0, s3 ​
738; GCN-NEXT: v_rcp_f32_e32 v2, v2 ​
739; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 ​
740; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2 ​
741; GCN-NEXT: v_trunc_f32_e32 v3, v3 732​; GCN-NEXT: v_trunc_f32_e32 v3, v3
742; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3 733​; GCN-NEXT: v_mac_f32_e32 v0, 0xcf800000, v3
734​; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0
743; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3 735​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
744; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 736​; GCN-NEXT: v_mul_hi_u32 v5, s2, v0
745; GCN-NEXT: v_mul_lo_u32 v5, s8, v3 737​; GCN-NEXT: v_mul_lo_u32 v4, s2, v3
746; GCN-NEXT: v_mul_lo_u32 v6, s9, v2 738​; GCN-NEXT: v_mul_lo_u32 v7, s3, v0
747; GCN-NEXT: v_mul_hi_u32 v7, s8, v2 739​; GCN-NEXT: v_mul_lo_u32 v6, s2, v0
748; GCN-NEXT: v_mul_lo_u32 v8, s8, v2 740​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
749; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5 741​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v7
750; GCN-NEXT: v_mul_hi_u32 v7, v2, v8 742​; GCN-NEXT: v_mul_hi_u32 v5, v0, v6
751; GCN-NEXT: v_mul_hi_u32 v9, v3, v8 743​; GCN-NEXT: v_mul_lo_u32 v7, v0, v4
752; GCN-NEXT: v_mul_lo_u32 v8, v3, v8 744​; GCN-NEXT: v_mul_hi_u32 v9, v0, v4
753; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v6 745​; GCN-NEXT: v_mul_lo_u32 v8, v3, v6
754; GCN-NEXT: v_mul_hi_u32 v6, v2, v5 746​; GCN-NEXT: v_mul_hi_u32 v6, v3, v6
755; GCN-NEXT: v_mul_lo_u32 v10, v2, v5 747​; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7
756; GCN-NEXT: v_mul_hi_u32 v11, v3, v5 748​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v2, v9, vcc
757; GCN-NEXT: v_mul_lo_u32 v5, v3, v5 749​; GCN-NEXT: v_mul_hi_u32 v9, v3, v4
758; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10 750​; GCN-NEXT: v_mul_lo_u32 v4, v3, v4
759; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v6, vcc 751​; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
760; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 752​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v7, v6, vcc
761; GCN-NEXT: v_addc_u32_e32 v6, vcc, v6, v9, vcc 753​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v9, v1, vcc
762; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v0, vcc 754​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
763; GCN-NEXT: v_add_i32_e32 v5, vcc, v6, v5 755​; GCN-NEXT: v_add_i32_e64 v0, s[0:1], v0, v4
764; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v7, vcc 756​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v2, v6, vcc
765; GCN-NEXT: v_add_i32_e64 v2, s[0:1], v2, v5 757​; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
766; GCN-NEXT: v_addc_u32_e64 v5, vcc, v3, v6, s[0:1] 758​; GCN-NEXT: v_mul_lo_u32 v6, s2, v4
767; GCN-NEXT: v_mul_hi_u32 v7, s8, v2 759​; GCN-NEXT: v_mul_hi_u32 v7, s2, v0
768; GCN-NEXT: v_mul_lo_u32 v8, s9, v2 760​; GCN-NEXT: v_mul_lo_u32 v8, s3, v0
769; GCN-NEXT: v_mul_lo_u32 v9, s8, v2 761​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
770; GCN-NEXT: v_mul_lo_u32 v10, s8, v5 762​; GCN-NEXT: v_mul_lo_u32 v7, s2, v0
771; GCN-NEXT: v_mul_hi_u32 v11, v5, v9 763​; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6
772; GCN-NEXT: v_mul_lo_u32 v12, v5, v9 764​; GCN-NEXT: v_mul_lo_u32 v10, v0, v6
773; GCN-NEXT: v_mul_hi_u32 v9, v2, v9 765​; GCN-NEXT: v_mul_hi_u32 v12, v0, v6
766​; GCN-NEXT: v_mul_hi_u32 v11, v0, v7
767​; GCN-NEXT: v_mul_hi_u32 v9, v4, v7
768​; GCN-NEXT: v_mul_lo_u32 v7, v4, v7
769​; GCN-NEXT: v_mul_hi_u32 v8, v4, v6
770​; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10
771​; GCN-NEXT: v_addc_u32_e32 v11, vcc, v2, v12, vcc
772​; GCN-NEXT: v_mul_lo_u32 v4, v4, v6
774; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10 773​; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v10
775; GCN-NEXT: v_add_i32_e32 v7, vcc, v8, v7 774​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v11, v9, vcc
776; GCN-NEXT: v_mul_hi_u32 v8, v5, v7 775​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v1, vcc
777; GCN-NEXT: v_mul_hi_u32 v10, v2, v7 776​; GCN-NEXT: v_add_i32_e32 v4, vcc, v7, v4
778; GCN-NEXT: v_mul_lo_u32 v13, v2, v7 777​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v2, v6, vcc
779; GCN-NEXT: v_mul_lo_u32 v5, v5, v7 778​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
780; GCN-NEXT: v_add_i32_e32 v7, vcc, v9, v13 ​
781; GCN-NEXT: v_addc_u32_e32 v9, vcc, v1, v10, vcc ​
782; GCN-NEXT: v_add_i32_e32 v7, vcc, v12, v7 ​
783; GCN-NEXT: v_addc_u32_e32 v7, vcc, v9, v11, vcc ​
784; GCN-NEXT: v_addc_u32_e32 v8, vcc, v8, v0, vcc ​
785; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v6 ​
786; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v5 ​
787; GCN-NEXT: v_addc_u32_e32 v6, vcc, v1, v8, vcc ​
788; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1] 779​; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
789; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v5 780​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
790; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 781​; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
791; GCN-NEXT: v_mul_hi_u32 v5, 24, v2 782​; GCN-NEXT: v_mul_hi_u32 v5, 24, v0
792; GCN-NEXT: v_mul_hi_u32 v2, 0, v2 783​; GCN-NEXT: v_mul_lo_u32 v4, v3, 24
793; GCN-NEXT: v_mul_hi_u32 v6, 24, v3 784​; GCN-NEXT: v_mul_hi_u32 v6, 24, v3
794; GCN-NEXT: v_mul_lo_u32 v7, v3, 24 785​; GCN-NEXT: v_mul_hi_u32 v0, 0, v0
795; GCN-NEXT: v_mul_hi_u32 v3, 0, v3 786​; GCN-NEXT: v_mul_hi_u32 v3, 0, v3
796; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v7 787​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
797; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v6, vcc 788​; GCN-NEXT: v_addc_u32_e32 v2, vcc, v2, v6, vcc
798; GCN-NEXT: v_add_i32_e32 v5, vcc, 0, v5 789​; GCN-NEXT: v_add_i32_e32 v4, vcc, 0, v4
799; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v2, vcc 790​; GCN-NEXT: v_addc_u32_e32 v0, vcc, v2, v0, vcc
800; GCN-NEXT: v_addc_u32_e32 v0, vcc, v3, v0, vcc 791​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v3, v1, vcc
801; GCN-NEXT: v_mul_hi_u32 v2, s2, v1 792​; GCN-NEXT: v_mul_lo_u32 v1, s8, v1
802; GCN-NEXT: v_mul_lo_u32 v3, s3, v1 793​; GCN-NEXT: v_mul_hi_u32 v2, s8, v0
803; GCN-NEXT: v_mul_lo_u32 v1, s2, v1 794​; GCN-NEXT: v_mul_lo_u32 v3, s9, v0
804; GCN-NEXT: v_mul_lo_u32 v0, s2, v0 795​; GCN-NEXT: v_mul_lo_u32 v0, s8, v0
805; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v0 796​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
806; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 797​; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v3
807; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0, v0 798​; GCN-NEXT: v_sub_i32_e32 v2, vcc, 0, v1
808; GCN-NEXT: v_sub_i32_e32 v3, vcc, 24, v1 799​; GCN-NEXT: v_mov_b32_e32 v3, s9
809; GCN-NEXT: v_subb_u32_e64 v1, s[0:1], v2, v4, vcc 800​; GCN-NEXT: v_sub_i32_e32 v0, vcc, 24, v0
810; GCN-NEXT: v_subb_u32_e32 v0, vcc, 0, v0, vcc 801​; GCN-NEXT: v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
811; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v3 802​; GCN-NEXT: v_subrev_i32_e64 v4, s[0:1], s8, v0
812; GCN-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 803​; GCN-NEXT: v_subb_u32_e64 v3, s[2:3], v2, v3, s[0:1]
813; GCN-NEXT: v_subrev_i32_e32 v5, vcc, s2, v3 804​; GCN-NEXT: v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
814; GCN-NEXT: v_subb_u32_e64 v4, s[0:1], v1, v4, vcc 805​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s9, v2
815; GCN-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 806​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[0:1]
816; GCN-NEXT: v_cmp_le_u32_e32 vcc, s2, v5 807​; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s8, v4
817; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 808​; GCN-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[0:1]
818; GCN-NEXT: v_subrev_i32_e32 v7, vcc, s2, v5 809​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], s9, v2
819; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v0 810​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[0:1]
820; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[0:1] 811​; GCN-NEXT: v_subrev_i32_e64 v6, s[0:1], s8, v4
821; GCN-NEXT: v_cmp_le_u32_e64 s[0:1], s3, v1 812​; GCN-NEXT: v_subb_u32_e32 v1, vcc, 0, v1, vcc
822; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[0:1] 813​; GCN-NEXT: v_subbrev_u32_e64 v3, s[0:1], 0, v3, s[0:1]
823; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc 814​; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
824; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v0 815​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s9, v1
825; GCN-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc 816​; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]
826; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s3, v1 817​; GCN-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc
827; GCN-NEXT: v_cndmask_b32_e32 v6, v9, v6, vcc 818​; GCN-NEXT: v_cmp_le_u32_e32 vcc, s8, v0
828; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 819​; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc
829; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc 820​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s9, v1
830; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v2 821​; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
831; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v1, s[0:1] 822​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3
832; GCN-NEXT: v_cndmask_b32_e32 v0, v5, v7, vcc 823​; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
833; GCN-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[0:1] 824​; GCN-NEXT: v_cndmask_b32_e64 v2, v4, v6, s[0:1]
825​; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
834; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 826​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
835; GCN-NEXT: s_endpgm 827​; GCN-NEXT: s_endpgm
836 %result = srem i64 24, %x 828​ %result = srem i64 24, %x
837 store i64 %result, i64 addrspace(1)* %out 829​ store i64 %result, i64 addrspace(1)* %out
838 ret void 830​ ret void
839} 831​}
840 832​
841define i64 @v_test_srem_k_num_i64(i64 %x) { 833​define i64 @v_test_srem_k_num_i64(i64 %x) {
842; GCN-LABEL: v_test_srem_k_num_i64: 834​; GCN-LABEL: v_test_srem_k_num_i64:
843; GCN: ; %bb.0: 835​; GCN: ; %bb.0:
844; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 836​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
845; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v1 837​; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v1
846; GCN-NEXT: v_mov_b32_e32 v3, 0 ​
847; GCN-NEXT: v_mov_b32_e32 v4, 0 ​
848; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2 838​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
849; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v2, vcc 839​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v2, vcc
850; GCN-NEXT: v_xor_b32_e32 v1, v1, v2 840​; GCN-NEXT: v_xor_b32_e32 v1, v1, v2
851; GCN-NEXT: v_xor_b32_e32 v0, v0, v2 841​; GCN-NEXT: v_xor_b32_e32 v0, v0, v2
852; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0 842​; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0
853; GCN-NEXT: v_cvt_f32_u32_e32 v5, v1 843​; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1
854; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v0 844​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v0
855; GCN-NEXT: v_subb_u32_e32 v7, vcc, 0, v1, vcc 845​; GCN-NEXT: v_subb_u32_e32 v5, vcc, 0, v1, vcc
856; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v5 846​; GCN-NEXT: v_mov_b32_e32 v12, 0
847​; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3
857; GCN-NEXT: v_rcp_f32_e32 v2, v2 848​; GCN-NEXT: v_rcp_f32_e32 v2, v2
849​; GCN-NEXT: v_mov_b32_e32 v11, 0
858; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 850​; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
859; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v2 851​; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
860; GCN-NEXT: v_trunc_f32_e32 v5, v5 852​; GCN-NEXT: v_trunc_f32_e32 v3, v3
861; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v5 853​; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
862; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5 ​
863; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 854​; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2
864; GCN-NEXT: v_mul_lo_u32 v8, v6, v5 855​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
865; GCN-NEXT: v_mul_lo_u32 v9, v7, v2 856​; GCN-NEXT: v_mul_hi_u32 v6, v4, v2
866; GCN-NEXT: v_mul_hi_u32 v10, v6, v2 857​; GCN-NEXT: v_mul_lo_u32 v7, v4, v3
867; GCN-NEXT: v_mul_lo_u32 v11, v6, v2 858​; GCN-NEXT: v_mul_lo_u32 v8, v5, v2
868; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v8 ​
869; GCN-NEXT: v_mul_hi_u32 v10, v2, v11 ​
870; GCN-NEXT: v_mul_hi_u32 v12, v5, v11 ​
871; GCN-NEXT: v_mul_lo_u32 v11, v5, v11 ​
872; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v9 ​
873; GCN-NEXT: v_mul_hi_u32 v9, v2, v8 ​
874; GCN-NEXT: v_mul_lo_u32 v13, v2, v8 ​
875; GCN-NEXT: v_mul_hi_u32 v14, v5, v8 ​
876; GCN-NEXT: v_mul_lo_u32 v8, v5, v8 ​
877; GCN-NEXT: v_add_i32_e32 v10, vcc, v10, v13 ​
878; GCN-NEXT: v_addc_u32_e32 v9, vcc, v4, v9, vcc ​
879; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10 ​
880; GCN-NEXT: v_addc_u32_e32 v9, vcc, v9, v12, vcc ​
881; GCN-NEXT: v_addc_u32_e32 v10, vcc, v14, v3, vcc ​
882; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8 ​
883; GCN-NEXT: v_addc_u32_e32 v9, vcc, v4, v10, vcc ​
884; GCN-NEXT: v_add_i32_e64 v2, s[4:5], v2, v8 ​
885; GCN-NEXT: v_addc_u32_e64 v8, vcc, v5, v9, s[4:5] ​
886; GCN-NEXT: v_mul_hi_u32 v10, v6, v2 ​
887; GCN-NEXT: v_mul_lo_u32 v7, v7, v2 ​
888; GCN-NEXT: v_mul_lo_u32 v11, v6, v2 ​
889; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v9 ​
890; GCN-NEXT: v_mul_lo_u32 v6, v6, v8 ​
891; GCN-NEXT: v_mul_hi_u32 v9, v8, v11 ​
892; GCN-NEXT: v_mul_lo_u32 v12, v8, v11 ​
893; GCN-NEXT: v_mul_hi_u32 v11, v2, v11 ​
894; GCN-NEXT: v_add_i32_e32 v6, vcc, v10, v6 ​
895; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7 859​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7
896; GCN-NEXT: v_mul_hi_u32 v7, v8, v6 860​; GCN-NEXT: v_mul_lo_u32 v7, v4, v2
897; GCN-NEXT: v_mul_hi_u32 v10, v2, v6 ​
898; GCN-NEXT: v_mul_lo_u32 v13, v2, v6 ​
899; GCN-NEXT: v_mul_lo_u32 v6, v8, v6 ​
900; GCN-NEXT: v_add_i32_e32 v8, vcc, v11, v13 ​
901; GCN-NEXT: v_addc_u32_e32 v10, vcc, v4, v10, vcc ​
902; GCN-NEXT: v_add_i32_e32 v8, vcc, v12, v8 ​
903; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v9, vcc ​
904; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v3, vcc ​
905; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6 ​
906; GCN-NEXT: v_addc_u32_e32 v7, vcc, v4, v7, vcc ​
907; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5] ​
908; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6 ​
909; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ​
910; GCN-NEXT: v_mul_hi_u32 v6, 24, v2 ​
911; GCN-NEXT: v_mul_hi_u32 v2, 0, v2 ​
912; GCN-NEXT: v_mul_hi_u32 v7, 24, v5 ​
913; GCN-NEXT: v_mul_lo_u32 v8, v5, 24 ​
914; GCN-NEXT: v_mul_hi_u32 v5, 0, v5 ​
915; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8 861​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8
916; GCN-NEXT: v_addc_u32_e32 v4, vcc, v4, v7, vcc 862​; GCN-NEXT: v_mul_lo_u32 v9, v2, v6
917; GCN-NEXT: v_add_i32_e32 v6, vcc, 0, v6 863​; GCN-NEXT: v_mul_hi_u32 v8, v2, v6
918; GCN-NEXT: v_addc_u32_e32 v2, vcc, v4, v2, vcc 864​; GCN-NEXT: v_mul_hi_u32 v10, v2, v7
919; GCN-NEXT: v_addc_u32_e32 v3, vcc, v5, v3, vcc 865​; GCN-NEXT: v_mul_hi_u32 v13, v3, v6
866​; GCN-NEXT: v_mul_lo_u32 v6, v3, v6
867​; GCN-NEXT: v_add_i32_e32 v9, vcc, v10, v9
868​; GCN-NEXT: v_mul_lo_u32 v10, v3, v7
869​; GCN-NEXT: v_mul_hi_u32 v7, v3, v7
870​; GCN-NEXT: v_addc_u32_e32 v8, vcc, v12, v8, vcc
871​; GCN-NEXT: v_add_i32_e32 v9, vcc, v10, v9
872​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v8, v7, vcc
873​; GCN-NEXT: v_addc_u32_e32 v8, vcc, v13, v11, vcc
874​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
875​; GCN-NEXT: v_add_i32_e64 v2, s[4:5], v2, v6
876​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v12, v8, vcc
877​; GCN-NEXT: v_addc_u32_e64 v6, vcc, v3, v7, s[4:5]
878​; GCN-NEXT: v_mul_lo_u32 v8, v4, v6
879​; GCN-NEXT: v_mul_hi_u32 v9, v4, v2
880​; GCN-NEXT: v_mul_lo_u32 v5, v5, v2
881​; GCN-NEXT: v_mul_lo_u32 v4, v4, v2
882​; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
883​; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
884​; GCN-NEXT: v_mul_lo_u32 v10, v2, v5
885​; GCN-NEXT: v_mul_hi_u32 v13, v2, v4
886​; GCN-NEXT: v_mul_hi_u32 v14, v2, v5
887​; GCN-NEXT: v_mul_hi_u32 v9, v6, v4
888​; GCN-NEXT: v_mul_lo_u32 v4, v6, v4
889​; GCN-NEXT: v_add_i32_e32 v10, vcc, v13, v10
890​; GCN-NEXT: v_mul_hi_u32 v8, v6, v5
891​; GCN-NEXT: v_addc_u32_e32 v13, vcc, v12, v14, vcc
892​; GCN-NEXT: v_mul_lo_u32 v5, v6, v5
893​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v10
894​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v13, v9, vcc
895​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v11, vcc
896​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
897​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v12, v6, vcc
898​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7
899​; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v5, s[4:5]
900​; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
901​; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
902​; GCN-NEXT: v_mul_hi_u32 v5, 24, v2
903​; GCN-NEXT: v_mul_lo_u32 v4, v3, 24
904​; GCN-NEXT: v_mul_hi_u32 v6, 24, v3
905​; GCN-NEXT: v_mul_hi_u32 v2, 0, v2
906​; GCN-NEXT: v_mul_hi_u32 v3, 0, v3
907​; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
908​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v12, v6, vcc
909​; GCN-NEXT: v_add_i32_e32 v4, vcc, 0, v4
910​; GCN-NEXT: v_addc_u32_e32 v2, vcc, v5, v2, vcc
911​; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v11, vcc
912​; GCN-NEXT: v_mul_lo_u32 v3, v0, v3
920; GCN-NEXT: v_mul_hi_u32 v4, v0, v2 913​; GCN-NEXT: v_mul_hi_u32 v4, v0, v2
921; GCN-NEXT: v_mul_lo_u32 v5, v1, v2 914​; GCN-NEXT: v_mul_lo_u32 v5, v1, v2
922; GCN-NEXT: v_mul_lo_u32 v2, v0, v2 915​; GCN-NEXT: v_mul_lo_u32 v2, v0, v2
923; GCN-NEXT: v_mul_lo_u32 v3, v0, v3 ​
924; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3 916​; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
925; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5 917​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
926; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3 918​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3
927; GCN-NEXT: v_sub_i32_e32 v2, vcc, 24, v2 919​; GCN-NEXT: v_sub_i32_e32 v2, vcc, 24, v2
928; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v4, v1, vcc 920​; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v4, v1, vcc
921​; GCN-NEXT: v_sub_i32_e64 v5, s[4:5], v2, v0
922​; GCN-NEXT: v_subb_u32_e64 v6, s[6:7], v4, v1, s[4:5]
923​; GCN-NEXT: v_subbrev_u32_e64 v4, s[4:5], 0, v4, s[4:5]
924​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1
925​; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5]
926​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v0
929; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc 927​; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc
928​; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5]
929​; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v4, v1
930​; GCN-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5]
931​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v3, v1
932​; GCN-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v7
933​; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc
930; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v0 934​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v0
931; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 935​; GCN-NEXT: v_sub_i32_e64 v8, s[4:5], v5, v0
932; GCN-NEXT: v_sub_i32_e32 v6, vcc, v2, v0 936​; GCN-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
933; GCN-NEXT: v_subb_u32_e64 v7, s[4:5], v4, v1, vcc 937​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v3, v1
934; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc 938​; GCN-NEXT: v_cndmask_b32_e32 v0, v7, v0, vcc
935; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0 939​; GCN-NEXT: v_subbrev_u32_e64 v1, s[4:5], 0, v6, s[4:5]
936; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc 940​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v8, s[6:7]
937; GCN-NEXT: v_sub_i32_e32 v0, vcc, v6, v0 941​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
938; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v3, v1 942​; GCN-NEXT: v_cndmask_b32_e64 v1, v4, v1, s[6:7]
939; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 943​; GCN-NEXT: v_cndmask_b32_e32 v0, v2, v5, vcc
940; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1 944​; GCN-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
941; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] ​
942; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v1 ​
943; GCN-NEXT: v_cndmask_b32_e64 v5, v9, v5, s[4:5] ​
944; GCN-NEXT: v_subbrev_u32_e32 v7, vcc, 0, v7, vcc ​
945; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v4, v1 ​
946; GCN-NEXT: v_cndmask_b32_e32 v1, v10, v8, vcc ​
947; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 ​
948; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc ​
949; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5 ​
950; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5] ​
951; GCN-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc ​
952; GCN-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ​
953; GCN-NEXT: s_setpc_b64 s[30:31] 945​; GCN-NEXT: s_setpc_b64 s[30:31]
954 %result = srem i64 24, %x 946​ %result = srem i64 24, %x
955 ret i64 %result 947​ ret i64 %result
956} 948​}
957 949​
958define i64 @v_test_srem_pow2_k_num_i64(i64 %x) { 950​define i64 @v_test_srem_pow2_k_num_i64(i64 %x) {
959; GCN-LABEL: v_test_srem_pow2_k_num_i64: 951​; GCN-LABEL: v_test_srem_pow2_k_num_i64:
960; GCN: ; %bb.0: 952​; GCN: ; %bb.0:
961; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 953​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
962; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v1 954​; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v1
963; GCN-NEXT: v_mov_b32_e32 v3, 0 ​
964; GCN-NEXT: v_mov_b32_e32 v4, 0 ​
965; GCN-NEXT: s_mov_b32 s6, 0x8000 ​
966; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2 955​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
967; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v2, vcc 956​; GCN-NEXT: v_addc_u32_e32 v1, vcc, v1, v2, vcc
968; GCN-NEXT: v_xor_b32_e32 v1, v1, v2 957​; GCN-NEXT: v_xor_b32_e32 v1, v1, v2
969; GCN-NEXT: v_xor_b32_e32 v0, v0, v2 958​; GCN-NEXT: v_xor_b32_e32 v0, v0, v2
970; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0 959​; GCN-NEXT: v_cvt_f32_u32_e32 v2, v0
971; GCN-NEXT: v_cvt_f32_u32_e32 v5, v1 960​; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1
972; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v0 961​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v0
973; GCN-NEXT: v_subb_u32_e32 v7, vcc, 0, v1, vcc 962​; GCN-NEXT: v_subb_u32_e32 v5, vcc, 0, v1, vcc
974; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v5 963​; GCN-NEXT: v_mov_b32_e32 v12, 0
964​; GCN-NEXT: v_mac_f32_e32 v2, 0x4f800000, v3
975; GCN-NEXT: v_rcp_f32_e32 v2, v2 965​; GCN-NEXT: v_rcp_f32_e32 v2, v2
966​; GCN-NEXT: v_mov_b32_e32 v11, 0
976; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 967​; GCN-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2
977; GCN-NEXT: v_mul_f32_e32 v5, 0x2f800000, v2 968​; GCN-NEXT: v_mul_f32_e32 v3, 0x2f800000, v2
978; GCN-NEXT: v_trunc_f32_e32 v5, v5 969​; GCN-NEXT: v_trunc_f32_e32 v3, v3
979; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v5 970​; GCN-NEXT: v_mac_f32_e32 v2, 0xcf800000, v3
980; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5 ​
981; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 971​; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2
982; GCN-NEXT: v_mul_lo_u32 v8, v6, v5 972​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
983; GCN-NEXT: v_mul_lo_u32 v9, v7, v2 973​; GCN-NEXT: v_mul_hi_u32 v6, v4, v2
984; GCN-NEXT: v_mul_hi_u32 v10, v6, v2 974​; GCN-NEXT: v_mul_lo_u32 v7, v4, v3
985; GCN-NEXT: v_mul_lo_u32 v11, v6, v2 975​; GCN-NEXT: v_mul_lo_u32 v8, v5, v2
986; GCN-NEXT: v_add_i32_e32 v8, vcc, v10, v8 ​
987; GCN-NEXT: v_mul_hi_u32 v10, v2, v11 ​
988; GCN-NEXT: v_mul_hi_u32 v12, v5, v11 ​
989; GCN-NEXT: v_mul_lo_u32 v11, v5, v11 ​
990; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v9 ​
991; GCN-NEXT: v_mul_hi_u32 v9, v2, v8 ​
992; GCN-NEXT: v_mul_lo_u32 v13, v2, v8 ​
993; GCN-NEXT: v_mul_hi_u32 v14, v5, v8 ​
994; GCN-NEXT: v_mul_lo_u32 v8, v5, v8 ​
995; GCN-NEXT: v_add_i32_e32 v10, vcc, v10, v13 ​
996; GCN-NEXT: v_addc_u32_e32 v9, vcc, v4, v9, vcc ​
997; GCN-NEXT: v_add_i32_e32 v10, vcc, v11, v10 ​
998; GCN-NEXT: v_addc_u32_e32 v9, vcc, v9, v12, vcc ​
999; GCN-NEXT: v_addc_u32_e32 v10, vcc, v14, v3, vcc ​
1000; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8 ​
1001; GCN-NEXT: v_addc_u32_e32 v9, vcc, v4, v10, vcc ​
1002; GCN-NEXT: v_add_i32_e64 v2, s[4:5], v2, v8 ​
1003; GCN-NEXT: v_addc_u32_e64 v8, vcc, v5, v9, s[4:5] ​
1004; GCN-NEXT: v_mul_hi_u32 v10, v6, v2 ​
1005; GCN-NEXT: v_mul_lo_u32 v7, v7, v2 ​
1006; GCN-NEXT: v_mul_lo_u32 v11, v6, v2 ​
1007; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v9 ​
1008; GCN-NEXT: v_mul_lo_u32 v6, v6, v8 ​
1009; GCN-NEXT: v_mul_hi_u32 v9, v8, v11 ​
1010; GCN-NEXT: v_mul_lo_u32 v12, v8, v11 ​
1011; GCN-NEXT: v_mul_hi_u32 v11, v2, v11 ​
1012; GCN-NEXT: v_add_i32_e32 v6, vcc, v10, v6 ​
1013; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7 976​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v7
1014; GCN-NEXT: v_mul_hi_u32 v7, v8, v6 977​; GCN-NEXT: v_mul_lo_u32 v7, v4, v2
1015; GCN-NEXT: v_mul_hi_u32 v10, v2, v6 ​
1016; GCN-NEXT: v_mul_lo_u32 v13, v2, v6 ​
1017; GCN-NEXT: v_mul_lo_u32 v6, v8, v6 ​
1018; GCN-NEXT: v_add_i32_e32 v8, vcc, v11, v13 ​
1019; GCN-NEXT: v_addc_u32_e32 v10, vcc, v4, v10, vcc ​
1020; GCN-NEXT: v_add_i32_e32 v8, vcc, v12, v8 ​
1021; GCN-NEXT: v_addc_u32_e32 v8, vcc, v10, v9, vcc ​
1022; GCN-NEXT: v_addc_u32_e32 v7, vcc, v7, v3, vcc ​
1023; GCN-NEXT: v_add_i32_e32 v6, vcc, v8, v6 ​
1024; GCN-NEXT: v_addc_u32_e32 v7, vcc, v4, v7, vcc ​
1025; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5] ​
1026; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6 ​
1027; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ​
1028; GCN-NEXT: v_mul_hi_u32 v6, s6, v2 ​
1029; GCN-NEXT: v_mul_hi_u32 v2, 0, v2 ​
1030; GCN-NEXT: v_mul_hi_u32 v7, s6, v5 ​
1031; GCN-NEXT: v_lshlrev_b32_e32 v8, 15, v5 ​
1032; GCN-NEXT: v_mul_hi_u32 v5, 0, v5 ​
1033; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8 978​; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v8
1034; GCN-NEXT: v_addc_u32_e32 v4, vcc, v4, v7, vcc 979​; GCN-NEXT: v_mul_lo_u32 v9, v2, v6
1035; GCN-NEXT: v_add_i32_e32 v6, vcc, 0, v6 980​; GCN-NEXT: v_mul_hi_u32 v8, v2, v6
1036; GCN-NEXT: v_addc_u32_e32 v2, vcc, v4, v2, vcc 981​; GCN-NEXT: v_mul_hi_u32 v10, v2, v7
1037; GCN-NEXT: v_addc_u32_e32 v3, vcc, v5, v3, vcc 982​; GCN-NEXT: v_mul_hi_u32 v13, v3, v6
983​; GCN-NEXT: v_mul_lo_u32 v6, v3, v6
984​; GCN-NEXT: v_add_i32_e32 v9, vcc, v10, v9
985​; GCN-NEXT: v_mul_lo_u32 v10, v3, v7
986​; GCN-NEXT: v_mul_hi_u32 v7, v3, v7
987​; GCN-NEXT: v_addc_u32_e32 v8, vcc, v12, v8, vcc
988​; GCN-NEXT: v_add_i32_e32 v9, vcc, v10, v9
989​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v8, v7, vcc
990​; GCN-NEXT: v_addc_u32_e32 v8, vcc, v13, v11, vcc
991​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v6
992​; GCN-NEXT: v_add_i32_e64 v2, s[4:5], v2, v6
993​; GCN-NEXT: v_addc_u32_e32 v7, vcc, v12, v8, vcc
994​; GCN-NEXT: v_addc_u32_e64 v6, vcc, v3, v7, s[4:5]
995​; GCN-NEXT: v_mul_lo_u32 v8, v4, v6
996​; GCN-NEXT: v_mul_hi_u32 v9, v4, v2
997​; GCN-NEXT: v_mul_lo_u32 v5, v5, v2
998​; GCN-NEXT: v_mul_lo_u32 v4, v4, v2
999​; GCN-NEXT: v_add_i32_e32 v8, vcc, v9, v8
1000​; GCN-NEXT: v_add_i32_e32 v5, vcc, v8, v5
1001​; GCN-NEXT: v_mul_lo_u32 v10, v2, v5
1002​; GCN-NEXT: v_mul_hi_u32 v13, v2, v4
1003​; GCN-NEXT: v_mul_hi_u32 v14, v2, v5
1004​; GCN-NEXT: v_mul_hi_u32 v9, v6, v4
1005​; GCN-NEXT: v_mul_lo_u32 v4, v6, v4
1006​; GCN-NEXT: v_add_i32_e32 v10, vcc, v13, v10
1007​; GCN-NEXT: v_mul_hi_u32 v8, v6, v5
1008​; GCN-NEXT: v_addc_u32_e32 v13, vcc, v12, v14, vcc
1009​; GCN-NEXT: v_mul_lo_u32 v5, v6, v5
1010​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v10
1011​; GCN-NEXT: v_addc_u32_e32 v4, vcc, v13, v9, vcc
1012​; GCN-NEXT: v_addc_u32_e32 v6, vcc, v8, v11, vcc
1013​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v5
1014​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v12, v6, vcc
1015​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7
1016​; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v5, s[4:5]
1017​; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v4
1018​; GCN-NEXT: s_mov_b32 s4, 0x8000
1019​; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
1020​; GCN-NEXT: v_mul_hi_u32 v4, s4, v2
1021​; GCN-NEXT: v_mul_hi_u32 v5, s4, v3
1022​; GCN-NEXT: v_lshlrev_b32_e32 v6, 15, v3
1023​; GCN-NEXT: v_mul_hi_u32 v2, 0, v2
1024​; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v6
1025​; GCN-NEXT: v_mul_hi_u32 v3, 0, v3
1026​; GCN-NEXT: v_addc_u32_e32 v5, vcc, v12, v5, vcc
1027​; GCN-NEXT: v_add_i32_e32 v4, vcc, 0, v4
1028​; GCN-NEXT: v_addc_u32_e32 v2, vcc, v5, v2, vcc
1029​; GCN-NEXT: v_addc_u32_e32 v3, vcc, v3, v11, vcc
1030​; GCN-NEXT: v_mul_lo_u32 v3, v0, v3
1038; GCN-NEXT: v_mul_hi_u32 v4, v0, v2 1031​; GCN-NEXT: v_mul_hi_u32 v4, v0, v2
1039; GCN-NEXT: v_mul_lo_u32 v5, v1, v2 1032​; GCN-NEXT: v_mul_lo_u32 v5, v1, v2
1040; GCN-NEXT: v_mul_lo_u32 v2, v0, v2 1033​; GCN-NEXT: v_mul_lo_u32 v2, v0, v2
1041; GCN-NEXT: v_mul_lo_u32 v3, v0, v3 ​
1042; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3 1034​; GCN-NEXT: v_add_i32_e32 v3, vcc, v4, v3
1043; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5 1035​; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v5
1044; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3 1036​; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v3
1045; GCN-NEXT: v_sub_i32_e32 v2, vcc, s6, v2 1037​; GCN-NEXT: v_sub_i32_e32 v2, vcc, s4, v2
1046; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v4, v1, vcc 1038​; GCN-NEXT: v_subb_u32_e64 v4, s[4:5], v4, v1, vcc
1039​; GCN-NEXT: v_sub_i32_e64 v5, s[4:5], v2, v0
1040​; GCN-NEXT: v_subb_u32_e64 v6, s[6:7], v4, v1, s[4:5]
1041​; GCN-NEXT: v_subbrev_u32_e64 v4, s[4:5], 0, v4, s[4:5]
1042​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1
1043​; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1044​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v0
1047; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc 1045​; GCN-NEXT: v_subb_u32_e32 v3, vcc, 0, v3, vcc
1046​; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5]
1047​; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v4, v1
1048​; GCN-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5]
1049​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v3, v1
1050​; GCN-NEXT: v_cmp_ne_u32_e64 s[6:7], 0, v7
1051​; GCN-NEXT: v_cndmask_b32_e64 v7, 0, -1, vcc
1048; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v0 1052​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v0
1049; GCN-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 1053​; GCN-NEXT: v_sub_i32_e64 v8, s[4:5], v5, v0
1050; GCN-NEXT: v_sub_i32_e32 v6, vcc, v2, v0 1054​; GCN-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
1051; GCN-NEXT: v_subb_u32_e64 v7, s[4:5], v4, v1, vcc 1055​; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v3, v1
1052; GCN-NEXT: v_subbrev_u32_e32 v4, vcc, 0, v4, vcc 1056​; GCN-NEXT: v_cndmask_b32_e32 v0, v7, v0, vcc
1053; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0 1057​; GCN-NEXT: v_subbrev_u32_e64 v1, s[4:5], 0, v6, s[4:5]
1054; GCN-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc 1058​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v8, s[6:7]
1055; GCN-NEXT: v_sub_i32_e32 v0, vcc, v6, v0 1059​; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
1056; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v3, v1 1060​; GCN-NEXT: v_cndmask_b32_e64 v1, v4, v1, s[6:7]
1057; GCN-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 1061​; GCN-NEXT: v_cndmask_b32_e32 v0, v2, v5, vcc
1058; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1 1062​; GCN-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
1059; GCN-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] ​
1060; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], v3, v1 ​
1061; GCN-NEXT: v_cndmask_b32_e64 v5, v9, v5, s[4:5] ​
1062; GCN-NEXT: v_subbrev_u32_e32 v7, vcc, 0, v7, vcc ​
1063; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v4, v1 ​
1064; GCN-NEXT: v_cndmask_b32_e32 v1, v10, v8, vcc ​
1065; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1 ​
1066; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc ​
1067; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 0, v5 ​
1068; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5] ​
1069; GCN-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc ​
1070; GCN-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5] ​
1071; GCN-NEXT: s_setpc_b64 s[30:31] 1063​; GCN-NEXT: s_setpc_b64 s[30:31]
1072 %result = srem i64 32768, %x 1064​ %result = srem i64 32768, %x
1073 ret i64 %result 1065​ ret i64 %result
1074} 1066​}
1075 1067​
1076define i64 @v_test_srem_pow2_k_den_i64(i64 %x) { 1068​define i64 @v_test_srem_pow2_k_den_i64(i64 %x) {
1077; GCN-LABEL: v_test_srem_pow2_k_den_i64: 1069​; GCN-LABEL: v_test_srem_pow2_k_den_i64:
1078; GCN: ; %bb.0: 1070​; GCN: ; %bb.0:
Show All 9 Lines1079; GCN-NEXT: s_setpc_b64 s[30:31]
1088 %result = srem i64 %x, 32768 1080​ %result = srem i64 %x, 32768
1089 ret i64 %result 1081​ ret i64 %result
1090} 1082​}
1091 1083​
1092define amdgpu_kernel void @s_test_srem24_k_num_i64(i64 addrspace(1)* %out, i64 %x) { 1084​define amdgpu_kernel void @s_test_srem24_k_num_i64(i64 addrspace(1)* %out, i64 %x) {
1093; GCN-LABEL: s_test_srem24_k_num_i64: 1085​; GCN-LABEL: s_test_srem24_k_num_i64:
1094; GCN: ; %bb.0: 1086​; GCN: ; %bb.0:
1095; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 1087​; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1096; GCN-NEXT: s_mov_b32 s7, 0xf000 1088​; GCN-NEXT: s_mov_b32 s6, 0x41c00000
1097; GCN-NEXT: s_mov_b32 s6, -1 ​
1098; GCN-NEXT: s_waitcnt lgkmcnt(0) 1089​; GCN-NEXT: s_waitcnt lgkmcnt(0)
1099; GCN-NEXT: s_mov_b32 s2, 0x41c00000 1090​; GCN-NEXT: s_ashr_i64 s[4:5], s[2:3], 40
1100; GCN-NEXT: s_mov_b32 s4, s0 1091​; GCN-NEXT: v_cvt_f32_i32_e32 v0, s4
1101; GCN-NEXT: s_mov_b32 s5, s1 1092​; GCN-NEXT: s_ashr_i32 s5, s4, 30
1102; GCN-NEXT: s_ashr_i64 s[0:1], s[2:3], 40 1093​; GCN-NEXT: s_or_b32 s5, s5, 1
1103; GCN-NEXT: v_cvt_f32_i32_e32 v0, s0 1094​; GCN-NEXT: v_mov_b32_e32 v2, s5
1104; GCN-NEXT: s_ashr_i32 s1, s0, 30 ​
1105; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v0 1095​; GCN-NEXT: v_rcp_iflag_f32_e32 v1, v0
1106; GCN-NEXT: s_or_b32 s1, s1, 1 1096​; GCN-NEXT: s_mov_b32 s3, 0xf000
1107; GCN-NEXT: v_mul_f32_e32 v1, s2, v1 1097​; GCN-NEXT: s_mov_b32 s2, -1
1108; GCN-NEXT: v_mov_b32_e32 v2, s1 1098​; GCN-NEXT: v_mul_f32_e32 v1, s6, v1
1109; GCN-NEXT: v_trunc_f32_e32 v1, v1 1099​; GCN-NEXT: v_trunc_f32_e32 v1, v1
1110; GCN-NEXT: v_mad_f32 v3, -v1, v0, s2 1100​; GCN-NEXT: v_mad_f32 v3, -v1, v0, s6
1101​; GCN-NEXT: v_cvt_i32_f32_e32 v1, v1
1111; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v0| 1102​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v0|
1112; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc 1103​; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
1113; GCN-NEXT: v_cvt_i32_f32_e32 v1, v1 ​
1114; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1 1104​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
1115; GCN-NEXT: v_mul_lo_u32 v0, v0, s0 1105​; GCN-NEXT: v_mul_lo_u32 v0, v0, s4
1116; GCN-NEXT: v_sub_i32_e32 v0, vcc, 24, v0 1106​; GCN-NEXT: v_sub_i32_e32 v0, vcc, 24, v0
1117; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24 1107​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
1118; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 1108​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1119; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 1109​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1120; GCN-NEXT: s_endpgm 1110​; GCN-NEXT: s_endpgm
1121 %x.shr = ashr i64 %x, 40 1111​ %x.shr = ashr i64 %x, 40
1122 %result = srem i64 24, %x.shr 1112​ %result = srem i64 24, %x.shr
1123 store i64 %result, i64 addrspace(1)* %out 1113​ store i64 %result, i64 addrspace(1)* %out
1124 ret void 1114​ ret void
1125} 1115​}
1126 1116​
1127define amdgpu_kernel void @s_test_srem24_k_den_i64(i64 addrspace(1)* %out, i64 %x) { 1117​define amdgpu_kernel void @s_test_srem24_k_den_i64(i64 addrspace(1)* %out, i64 %x) {
1128; GCN-LABEL: s_test_srem24_k_den_i64: 1118​; GCN-LABEL: s_test_srem24_k_den_i64:
1129; GCN: ; %bb.0: 1119​; GCN: ; %bb.0:
1130; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 1120​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1131; GCN-NEXT: s_mov_b32 s7, 0xf000 1121​; GCN-NEXT: s_mov_b32 s8, 0x46b6fe00
1132; GCN-NEXT: s_mov_b32 s6, -1 1122​; GCN-NEXT: s_mov_b32 s3, 0xf000
1123​; GCN-NEXT: s_mov_b32 s2, -1
1133; GCN-NEXT: s_waitcnt lgkmcnt(0) 1124​; GCN-NEXT: s_waitcnt lgkmcnt(0)
1134; GCN-NEXT: s_mov_b32 s2, 0x46b6fe00 1125​; GCN-NEXT: s_ashr_i64 s[6:7], s[6:7], 40
1135; GCN-NEXT: s_mov_b32 s4, s0 1126​; GCN-NEXT: v_cvt_f32_i32_e32 v0, s6
1136; GCN-NEXT: s_mov_b32 s5, s1 1127​; GCN-NEXT: s_ashr_i32 s0, s6, 30
1137; GCN-NEXT: s_ashr_i64 s[0:1], s[2:3], 40 1128​; GCN-NEXT: s_or_b32 s0, s0, 1
1138; GCN-NEXT: v_cvt_f32_i32_e32 v0, s0 1129​; GCN-NEXT: v_mov_b32_e32 v1, s0
1139; GCN-NEXT: s_ashr_i32 s1, s0, 30 1130​; GCN-NEXT: v_mul_f32_e32 v2, 0x38331158, v0
1140; GCN-NEXT: v_mul_f32_e32 v1, 0x38331158, v0 1131​; GCN-NEXT: v_trunc_f32_e32 v2, v2
1141; GCN-NEXT: s_or_b32 s1, s1, 1 1132​; GCN-NEXT: v_mad_f32 v0, -v2, s8, v0
1142; GCN-NEXT: v_trunc_f32_e32 v1, v1 1133​; GCN-NEXT: v_cvt_i32_f32_e32 v2, v2
1143; GCN-NEXT: v_mov_b32_e32 v2, s1 1134​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, s8
1144; GCN-NEXT: v_mad_f32 v0, -v1, s2, v0 1135​; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc
1145; GCN-NEXT: v_cvt_i32_f32_e32 v1, v1 1136​; GCN-NEXT: s_movk_i32 s0, 0x5b7f
1146; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, s2 1137​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
1147; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc 1138​; GCN-NEXT: v_mul_lo_u32 v0, v0, s0
1148; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1 1139​; GCN-NEXT: s_mov_b32 s0, s4
1149; GCN-NEXT: s_movk_i32 s1, 0x5b7f 1140​; GCN-NEXT: s_mov_b32 s1, s5
1150; GCN-NEXT: v_mul_lo_u32 v0, v0, s1 1141​; GCN-NEXT: v_sub_i32_e32 v0, vcc, s6, v0
1151; GCN-NEXT: v_sub_i32_e32 v0, vcc, s0, v0 ​
1152; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24 1142​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
1153; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 1143​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1154; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 1144​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1155; GCN-NEXT: s_endpgm 1145​; GCN-NEXT: s_endpgm
1156 %x.shr = ashr i64 %x, 40 1146​ %x.shr = ashr i64 %x, 40
1157 %result = srem i64 %x.shr, 23423 1147​ %result = srem i64 %x.shr, 23423
1158 store i64 %result, i64 addrspace(1)* %out 1148​ store i64 %result, i64 addrspace(1)* %out
1159 ret void 1149​ ret void
1160} 1150​}
1161 1151​
1162define i64 @v_test_srem24_k_num_i64(i64 %x) { 1152​define i64 @v_test_srem24_k_num_i64(i64 %x) {
1163; GCN-LABEL: v_test_srem24_k_num_i64: 1153​; GCN-LABEL: v_test_srem24_k_num_i64:
1164; GCN: ; %bb.0: 1154​; GCN: ; %bb.0:
1165; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1155​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1166; GCN-NEXT: v_ashr_i64 v[0:1], v[0:1], 40 1156​; GCN-NEXT: v_ashr_i64 v[0:1], v[0:1], 40
1167; GCN-NEXT: s_mov_b32 s4, 0x41c00000 1157​; GCN-NEXT: s_mov_b32 s4, 0x41c00000
1168; GCN-NEXT: v_cvt_f32_i32_e32 v1, v0 1158​; GCN-NEXT: v_cvt_f32_i32_e32 v1, v0
1169; GCN-NEXT: v_ashrrev_i32_e32 v2, 30, v0 1159​; GCN-NEXT: v_ashrrev_i32_e32 v3, 30, v0
1170; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v1 1160​; GCN-NEXT: v_or_b32_e32 v3, 1, v3
1171; GCN-NEXT: v_or_b32_e32 v2, 1, v2 1161​; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v1
1172; GCN-NEXT: v_mul_f32_e32 v3, s4, v3 1162​; GCN-NEXT: v_mul_f32_e32 v2, s4, v2
1173; GCN-NEXT: v_trunc_f32_e32 v3, v3 1163​; GCN-NEXT: v_trunc_f32_e32 v2, v2
1174; GCN-NEXT: v_mad_f32 v4, -v3, v1, s4 1164​; GCN-NEXT: v_mad_f32 v4, -v2, v1, s4
1165​; GCN-NEXT: v_cvt_i32_f32_e32 v2, v2
1175; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v4|, |v1| 1166​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v4|, |v1|
1176; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc 1167​; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc
1177; GCN-NEXT: v_cvt_i32_f32_e32 v2, v3 ​
1178; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1 1168​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
1179; GCN-NEXT: v_mul_lo_u32 v0, v1, v0 1169​; GCN-NEXT: v_mul_lo_u32 v0, v1, v0
1180; GCN-NEXT: v_sub_i32_e32 v0, vcc, 24, v0 1170​; GCN-NEXT: v_sub_i32_e32 v0, vcc, 24, v0
1181; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24 1171​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
1182; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 1172​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1183; GCN-NEXT: s_setpc_b64 s[30:31] 1173​; GCN-NEXT: s_setpc_b64 s[30:31]
1184 %x.shr = ashr i64 %x, 40 1174​ %x.shr = ashr i64 %x, 40
1185 %result = srem i64 24, %x.shr 1175​ %result = srem i64 24, %x.shr
1186 ret i64 %result 1176​ ret i64 %result
1187} 1177​}
1188 1178​
1189define i64 @v_test_srem24_pow2_k_num_i64(i64 %x) { 1179​define i64 @v_test_srem24_pow2_k_num_i64(i64 %x) {
1190; GCN-LABEL: v_test_srem24_pow2_k_num_i64: 1180​; GCN-LABEL: v_test_srem24_pow2_k_num_i64:
1191; GCN: ; %bb.0: 1181​; GCN: ; %bb.0:
1192; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1182​; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1193; GCN-NEXT: v_ashr_i64 v[0:1], v[0:1], 40 1183​; GCN-NEXT: v_ashr_i64 v[0:1], v[0:1], 40
1194; GCN-NEXT: s_mov_b32 s4, 0x47000000 1184​; GCN-NEXT: s_mov_b32 s4, 0x47000000
1195; GCN-NEXT: v_cvt_f32_i32_e32 v1, v0 1185​; GCN-NEXT: v_cvt_f32_i32_e32 v1, v0
1196; GCN-NEXT: v_ashrrev_i32_e32 v2, 30, v0 1186​; GCN-NEXT: v_ashrrev_i32_e32 v3, 30, v0
1197; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v1 1187​; GCN-NEXT: v_or_b32_e32 v3, 1, v3
1198; GCN-NEXT: v_or_b32_e32 v2, 1, v2 1188​; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v1
1199; GCN-NEXT: v_mul_f32_e32 v3, s4, v3 1189​; GCN-NEXT: v_mul_f32_e32 v2, s4, v2
1200; GCN-NEXT: v_trunc_f32_e32 v3, v3 1190​; GCN-NEXT: v_trunc_f32_e32 v2, v2
1201; GCN-NEXT: v_mad_f32 v4, -v3, v1, s4 1191​; GCN-NEXT: v_mad_f32 v4, -v2, v1, s4
1192​; GCN-NEXT: v_cvt_i32_f32_e32 v2, v2
1202; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v4|, |v1| 1193​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v4|, |v1|
1203; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc 1194​; GCN-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc
1204; GCN-NEXT: v_cvt_i32_f32_e32 v2, v3 ​
1205; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1 1195​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
1206; GCN-NEXT: v_mul_lo_u32 v0, v1, v0 1196​; GCN-NEXT: v_mul_lo_u32 v0, v1, v0
1207; GCN-NEXT: v_sub_i32_e32 v0, vcc, 0x8000, v0 1197​; GCN-NEXT: v_sub_i32_e32 v0, vcc, 0x8000, v0
1208; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24 1198​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
1209; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 1199​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
1210; GCN-NEXT: s_setpc_b64 s[30:31] 1200​; GCN-NEXT: s_setpc_b64 s[30:31]
1211 %x.shr = ashr i64 %x, 40 1201​ %x.shr = ashr i64 %x, 40
1212 %result = srem i64 32768, %x.shr 1202​ %result = srem i64 32768, %x.shr
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