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Differential D74594 Diff 244599 llvm/test/CodeGen/AMDGPU/sdiv.ll

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llvm/test/CodeGen/AMDGPU/sdiv.ll

1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 1​; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn | FileCheck %s -check-prefixes=FUNC,SI,GCN 2​; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx600 | FileCheck %s -check-prefixes=FUNC,SI,GCN
3; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global | FileCheck %s -check-prefixes=FUNC,SI,TONGA 3​; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global | FileCheck %s -check-prefixes=FUNC,SI,TONGA
4; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global | FileCheck %s -check-prefixes=FUNC,SI,GFX9 4​; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global | FileCheck %s -check-prefixes=FUNC,SI,GFX9
5; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood | FileCheck %s -check-prefixes=FUNC,EG 5​; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood | FileCheck %s -check-prefixes=FUNC,EG
6 6​
7; The code generated by sdiv is long and complex and may frequently change. 7​; The code generated by sdiv is long and complex and may frequently change.
8; The goal of this test is to make sure the ISel doesn't fail. 8​; The goal of this test is to make sure the ISel doesn't fail.
9; 9​;
10; This program was previously failing to compile when one of the selectcc 10​; This program was previously failing to compile when one of the selectcc
11; opcodes generated by the sdiv lowering was being legalized and optimized to: 11​; opcodes generated by the sdiv lowering was being legalized and optimized to:
12; selectcc Remainder -1, 0, -1, SETGT 12​; selectcc Remainder -1, 0, -1, SETGT
13; This was fixed by adding an additional pattern in R600Instructions.td to 13​; This was fixed by adding an additional pattern in R600Instructions.td to
14; match this pattern with a CNDGE_INT. 14​; match this pattern with a CNDGE_INT.
15 15​
16define amdgpu_kernel void @sdiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 16​define amdgpu_kernel void @sdiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
17; GCN-LABEL: sdiv_i32: 17​; GCN-LABEL: sdiv_i32:
18; GCN: ; %bb.0: 18​; GCN: ; %bb.0:
19; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 19​; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
20; GCN-NEXT: s_mov_b32 s7, 0xf000 20​; GCN-NEXT: s_mov_b32 s7, 0xf000
21; GCN-NEXT: s_mov_b32 s6, -1 21​; GCN-NEXT: s_mov_b32 s6, -1
22; GCN-NEXT: s_mov_b32 s10, s6 22​; GCN-NEXT: s_mov_b32 s2, s6
23; GCN-NEXT: s_mov_b32 s11, s7 23​; GCN-NEXT: s_mov_b32 s3, s7
24; GCN-NEXT: s_waitcnt lgkmcnt(0) 24​; GCN-NEXT: s_waitcnt lgkmcnt(0)
25; GCN-NEXT: s_mov_b32 s8, s2 25​; GCN-NEXT: s_mov_b32 s0, s10
26; GCN-NEXT: s_mov_b32 s9, s3 26​; GCN-NEXT: s_mov_b32 s1, s11
27; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 27​; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[0:3], 0
28; GCN-NEXT: s_mov_b32 s4, s0 28​; GCN-NEXT: s_mov_b32 s4, s8
29; GCN-NEXT: s_mov_b32 s5, s1 29​; GCN-NEXT: s_mov_b32 s5, s9
30; GCN-NEXT: s_waitcnt vmcnt(0) 30​; GCN-NEXT: s_waitcnt vmcnt(0)
31; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v0 31​; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v1
32; GCN-NEXT: v_ashrrev_i32_e32 v3, 31, v1 32​; GCN-NEXT: v_add_i32_e32 v1, vcc, v2, v1
33; GCN-NEXT: v_xor_b32_e32 v4, v2, v3 33​; GCN-NEXT: v_xor_b32_e32 v1, v1, v2
34; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v0 34​; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1
35; GCN-NEXT: v_add_i32_e32 v1, vcc, v3, v1 35​; GCN-NEXT: v_ashrrev_i32_e32 v6, 31, v0
36; GCN-NEXT: v_xor_b32_e32 v0, v0, v2 36​; GCN-NEXT: v_add_i32_e32 v0, vcc, v6, v0
37; GCN-NEXT: v_xor_b32_e32 v1, v1, v3 37​; GCN-NEXT: v_xor_b32_e32 v0, v0, v6
38; GCN-NEXT: v_cvt_f32_u32_e32 v2, v1 38​; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v3
39; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v2 39​; GCN-NEXT: v_xor_b32_e32 v2, v6, v2
40; GCN-NEXT: v_mul_f32_e32 v2, 0x4f800000, v2 40​; GCN-NEXT: v_mul_f32_e32 v3, 0x4f800000, v3
41; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 41​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
42; GCN-NEXT: v_mul_hi_u32 v3, v2, v1 42​; GCN-NEXT: v_mul_lo_u32 v4, v3, v1
43; GCN-NEXT: v_mul_lo_u32 v5, v2, v1 43​; GCN-NEXT: v_mul_hi_u32 v5, v3, v1
44; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v5 44​; GCN-NEXT: v_sub_i32_e32 v7, vcc, 0, v4
45; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v3 45​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5
46; GCN-NEXT: v_cndmask_b32_e64 v3, v5, v6, s[0:1] 46​; GCN-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[0:1]
47; GCN-NEXT: v_mul_hi_u32 v3, v3, v2 47​; GCN-NEXT: v_mul_hi_u32 v4, v4, v3
48; GCN-NEXT: v_add_i32_e32 v5, vcc, v3, v2 48​; GCN-NEXT: v_add_i32_e32 v5, vcc, v4, v3
49; GCN-NEXT: v_subrev_i32_e32 v2, vcc, v3, v2 49​; GCN-NEXT: v_subrev_i32_e32 v3, vcc, v4, v3
50; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] 50​; GCN-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[0:1]
51; GCN-NEXT: v_mul_hi_u32 v2, v2, v0 51​; GCN-NEXT: v_mul_hi_u32 v3, v3, v0
52; GCN-NEXT: v_mul_lo_u32 v3, v2, v1 52​; GCN-NEXT: v_mul_lo_u32 v4, v3, v1
53; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v2 53​; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v3
54; GCN-NEXT: v_add_i32_e32 v6, vcc, -1, v2 54​; GCN-NEXT: v_add_i32_e32 v6, vcc, -1, v3
55; GCN-NEXT: v_subrev_i32_e32 v7, vcc, v3, v0 55​; GCN-NEXT: v_subrev_i32_e32 v7, vcc, v4, v0
56; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v3 56​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4
57; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v7, v1 57​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v7, v1
58; GCN-NEXT: s_and_b64 s[0:1], s[0:1], vcc 58​; GCN-NEXT: s_and_b64 s[0:1], s[0:1], vcc
59; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v5, s[0:1] 59​; GCN-NEXT: v_cndmask_b32_e64 v0, v3, v5, s[0:1]
60; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc 60​; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc
61; GCN-NEXT: v_xor_b32_e32 v0, v0, v4 61​; GCN-NEXT: v_xor_b32_e32 v0, v0, v2
62; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 62​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
63; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 63​; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
64; GCN-NEXT: s_endpgm 64​; GCN-NEXT: s_endpgm
65; 65​;
66; TONGA-LABEL: sdiv_i32: 66​; TONGA-LABEL: sdiv_i32:
67; TONGA: ; %bb.0: 67​; TONGA: ; %bb.0:
68; TONGA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24 68​; TONGA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24
69; TONGA-NEXT: s_mov_b32 s7, 0xf000 69​; TONGA-NEXT: s_mov_b32 s7, 0xf000
70; TONGA-NEXT: s_mov_b32 s6, -1 70​; TONGA-NEXT: s_mov_b32 s6, -1
▲ Show 20 Lines • Show All 140 Lines • ▼ Show 20 Line(s)207; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
211 %result = sdiv i32 %num, %den 211​ %result = sdiv i32 %num, %den
212 store i32 %result, i32 addrspace(1)* %out 212​ store i32 %result, i32 addrspace(1)* %out
213 ret void 213​ ret void
214} 214​}
215 215​
216define amdgpu_kernel void @sdiv_i32_4(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 216​define amdgpu_kernel void @sdiv_i32_4(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
217; GCN-LABEL: sdiv_i32_4: 217​; GCN-LABEL: sdiv_i32_4:
218; GCN: ; %bb.0: 218​; GCN: ; %bb.0:
219; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 219​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
220; GCN-NEXT: s_mov_b32 s7, 0xf000 220​; GCN-NEXT: s_mov_b32 s3, 0xf000
221; GCN-NEXT: s_mov_b32 s6, -1 221​; GCN-NEXT: s_mov_b32 s2, -1
222; GCN-NEXT: s_mov_b32 s10, s6 ​
223; GCN-NEXT: s_mov_b32 s11, s7 ​
224; GCN-NEXT: s_waitcnt lgkmcnt(0) 222​; GCN-NEXT: s_waitcnt lgkmcnt(0)
225; GCN-NEXT: s_mov_b32 s8, s2 223​; GCN-NEXT: s_mov_b32 s0, s4
226; GCN-NEXT: s_mov_b32 s9, s3 224​; GCN-NEXT: s_mov_b32 s1, s5
227; GCN-NEXT: buffer_load_dword v0, off, s[8:11], 0 225​; GCN-NEXT: s_mov_b32 s4, s6
228; GCN-NEXT: s_mov_b32 s4, s0 226​; GCN-NEXT: s_mov_b32 s5, s7
229; GCN-NEXT: s_mov_b32 s5, s1 227​; GCN-NEXT: s_mov_b32 s6, s2
228​; GCN-NEXT: s_mov_b32 s7, s3
229​; GCN-NEXT: buffer_load_dword v0, off, s[4:7], 0
230; GCN-NEXT: s_waitcnt vmcnt(0) 230​; GCN-NEXT: s_waitcnt vmcnt(0)
231; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0 231​; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
232; GCN-NEXT: v_lshrrev_b32_e32 v1, 30, v1 232​; GCN-NEXT: v_lshrrev_b32_e32 v1, 30, v1
233; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1 233​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
234; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0 234​; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0
235; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 235​; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
236; GCN-NEXT: s_endpgm 236​; GCN-NEXT: s_endpgm
237; 237​;
238; TONGA-LABEL: sdiv_i32_4: 238​; TONGA-LABEL: sdiv_i32_4:
239; TONGA: ; %bb.0: 239​; TONGA: ; %bb.0:
240; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 240​; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
241; TONGA-NEXT: s_mov_b32 s3, 0xf000 241​; TONGA-NEXT: s_mov_b32 s3, 0xf000
242; TONGA-NEXT: s_mov_b32 s2, -1 242​; TONGA-NEXT: s_mov_b32 s2, -1
243; TONGA-NEXT: s_waitcnt lgkmcnt(0) 243​; TONGA-NEXT: s_waitcnt lgkmcnt(0)
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305} 305​}
306 306​
307; Multiply by a weird constant to make sure setIntDivIsCheap is 307​; Multiply by a weird constant to make sure setIntDivIsCheap is
308; working. 308​; working.
309 309​
310define amdgpu_kernel void @slow_sdiv_i32_3435(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 310​define amdgpu_kernel void @slow_sdiv_i32_3435(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
311; GCN-LABEL: slow_sdiv_i32_3435: 311​; GCN-LABEL: slow_sdiv_i32_3435:
312; GCN: ; %bb.0: 312​; GCN: ; %bb.0:
313; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 313​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
314; GCN-NEXT: s_mov_b32 s7, 0xf000 314​; GCN-NEXT: s_mov_b32 s3, 0xf000
315; GCN-NEXT: s_mov_b32 s6, -1 315​; GCN-NEXT: s_mov_b32 s2, -1
316; GCN-NEXT: s_mov_b32 s10, s6 316​; GCN-NEXT: s_mov_b32 s10, s2
317; GCN-NEXT: s_mov_b32 s11, s7 317​; GCN-NEXT: s_mov_b32 s11, s3
318; GCN-NEXT: s_waitcnt lgkmcnt(0) 318​; GCN-NEXT: s_waitcnt lgkmcnt(0)
319; GCN-NEXT: s_mov_b32 s8, s2 319​; GCN-NEXT: s_mov_b32 s8, s6
320; GCN-NEXT: s_mov_b32 s9, s3 320​; GCN-NEXT: s_mov_b32 s9, s7
321; GCN-NEXT: buffer_load_dword v0, off, s[8:11], 0 321​; GCN-NEXT: buffer_load_dword v0, off, s[8:11], 0
322; GCN-NEXT: s_mov_b32 s2, 0x98a1930b 322​; GCN-NEXT: s_mov_b32 s0, 0x98a1930b
323; GCN-NEXT: s_mov_b32 s4, s0 323​; GCN-NEXT: s_mov_b32 s1, s5
324; GCN-NEXT: s_mov_b32 s5, s1 ​
325; GCN-NEXT: s_waitcnt vmcnt(0) 324​; GCN-NEXT: s_waitcnt vmcnt(0)
326; GCN-NEXT: v_mul_hi_i32 v1, v0, s2 325​; GCN-NEXT: v_mul_hi_i32 v1, v0, s0
326​; GCN-NEXT: s_mov_b32 s0, s4
327; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1 327​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
328; GCN-NEXT: v_lshrrev_b32_e32 v1, 31, v0 328​; GCN-NEXT: v_lshrrev_b32_e32 v1, 31, v0
329; GCN-NEXT: v_ashrrev_i32_e32 v0, 11, v0 329​; GCN-NEXT: v_ashrrev_i32_e32 v0, 11, v0
330; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0 330​; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0
331; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 331​; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
332; GCN-NEXT: s_endpgm 332​; GCN-NEXT: s_endpgm
333; 333​;
334; TONGA-LABEL: slow_sdiv_i32_3435: 334​; TONGA-LABEL: slow_sdiv_i32_3435:
335; TONGA: ; %bb.0: 335​; TONGA: ; %bb.0:
336; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 336​; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
337; TONGA-NEXT: s_mov_b32 s3, 0xf000 337​; TONGA-NEXT: s_mov_b32 s3, 0xf000
338; TONGA-NEXT: s_mov_b32 s2, -1 338​; TONGA-NEXT: s_mov_b32 s2, -1
339; TONGA-NEXT: s_mov_b32 s10, s2 339​; TONGA-NEXT: s_mov_b32 s10, s2
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406} 406​}
407 407​
408define amdgpu_kernel void @sdiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { 408​define amdgpu_kernel void @sdiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
409; GCN-LABEL: sdiv_v2i32: 409​; GCN-LABEL: sdiv_v2i32:
410; GCN: ; %bb.0: 410​; GCN: ; %bb.0:
411; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 411​; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
412; GCN-NEXT: s_mov_b32 s11, 0xf000 412​; GCN-NEXT: s_mov_b32 s11, 0xf000
413; GCN-NEXT: s_mov_b32 s10, -1 413​; GCN-NEXT: s_mov_b32 s10, -1
414; GCN-NEXT: s_mov_b32 s6, s10 414​; GCN-NEXT: s_mov_b32 s4, 0x4f800000
415; GCN-NEXT: s_mov_b32 s7, s11 ​
416; GCN-NEXT: s_waitcnt lgkmcnt(0) 415​; GCN-NEXT: s_waitcnt lgkmcnt(0)
417; GCN-NEXT: s_mov_b32 s4, s2 ​
418; GCN-NEXT: s_mov_b32 s5, s3 ​
419; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 ​
420; GCN-NEXT: s_mov_b32 s2, 0x4f800000 ​
421; GCN-NEXT: s_mov_b32 s8, s0 416​; GCN-NEXT: s_mov_b32 s8, s0
422; GCN-NEXT: s_mov_b32 s9, s1 417​; GCN-NEXT: s_mov_b32 s9, s1
418​; GCN-NEXT: s_mov_b32 s0, s2
419​; GCN-NEXT: s_mov_b32 s1, s3
420​; GCN-NEXT: s_mov_b32 s2, s10
421​; GCN-NEXT: s_mov_b32 s3, s11
422​; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0
423; GCN-NEXT: s_waitcnt vmcnt(0) 423​; GCN-NEXT: s_waitcnt vmcnt(0)
424; GCN-NEXT: v_ashrrev_i32_e32 v4, 31, v0 ​
425; GCN-NEXT: v_ashrrev_i32_e32 v5, 31, v2 424​; GCN-NEXT: v_ashrrev_i32_e32 v5, 31, v2
426; GCN-NEXT: v_ashrrev_i32_e32 v6, 31, v1 ​
427; GCN-NEXT: v_ashrrev_i32_e32 v7, 31, v3 425​; GCN-NEXT: v_ashrrev_i32_e32 v7, 31, v3
428; GCN-NEXT: v_xor_b32_e32 v8, v4, v5 ​
429; GCN-NEXT: v_add_i32_e32 v0, vcc, v4, v0 ​
430; GCN-NEXT: v_add_i32_e32 v2, vcc, v5, v2 426​; GCN-NEXT: v_add_i32_e32 v2, vcc, v5, v2
431; GCN-NEXT: v_xor_b32_e32 v9, v6, v7 427​; GCN-NEXT: v_ashrrev_i32_e32 v4, 31, v0
432; GCN-NEXT: v_add_i32_e32 v1, vcc, v6, v1 ​
433; GCN-NEXT: v_add_i32_e32 v3, vcc, v7, v3 428​; GCN-NEXT: v_add_i32_e32 v3, vcc, v7, v3
434; GCN-NEXT: v_xor_b32_e32 v0, v0, v4 ​
435; GCN-NEXT: v_xor_b32_e32 v2, v2, v5 429​; GCN-NEXT: v_xor_b32_e32 v2, v2, v5
436; GCN-NEXT: v_xor_b32_e32 v1, v1, v6 430​; GCN-NEXT: v_ashrrev_i32_e32 v6, 31, v1
431​; GCN-NEXT: v_xor_b32_e32 v8, v4, v5
432​; GCN-NEXT: v_cvt_f32_u32_e32 v5, v2
437; GCN-NEXT: v_xor_b32_e32 v3, v3, v7 433​; GCN-NEXT: v_xor_b32_e32 v3, v3, v7
438; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2 434​; GCN-NEXT: v_xor_b32_e32 v9, v6, v7
439; GCN-NEXT: v_cvt_f32_u32_e32 v5, v3 435​; GCN-NEXT: v_cvt_f32_u32_e32 v7, v3
440; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v4 ​
441; GCN-NEXT: v_rcp_iflag_f32_e32 v5, v5 436​; GCN-NEXT: v_rcp_iflag_f32_e32 v5, v5
442; GCN-NEXT: v_mul_f32_e32 v4, s2, v4 437​; GCN-NEXT: v_add_i32_e32 v0, vcc, v4, v0
443; GCN-NEXT: v_mul_f32_e32 v5, s2, v5 438​; GCN-NEXT: v_xor_b32_e32 v0, v0, v4
439​; GCN-NEXT: v_rcp_iflag_f32_e32 v7, v7
440​; GCN-NEXT: v_mul_f32_e32 v4, s4, v5
444; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4 441​; GCN-NEXT: v_cvt_u32_f32_e32 v4, v4
442​; GCN-NEXT: v_add_i32_e32 v1, vcc, v6, v1
443​; GCN-NEXT: v_mul_f32_e32 v5, s4, v7
445; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5 444​; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5
445​; GCN-NEXT: v_xor_b32_e32 v1, v1, v6
446; GCN-NEXT: v_mul_hi_u32 v6, v4, v2 446​; GCN-NEXT: v_mul_hi_u32 v6, v4, v2
447; GCN-NEXT: v_mul_lo_u32 v7, v4, v2 447​; GCN-NEXT: v_mul_lo_u32 v7, v4, v2
448; GCN-NEXT: v_mul_hi_u32 v10, v5, v3 448​; GCN-NEXT: v_mul_hi_u32 v10, v5, v3
449; GCN-NEXT: v_mul_lo_u32 v11, v5, v3 449​; GCN-NEXT: v_mul_lo_u32 v11, v5, v3
450; GCN-NEXT: v_sub_i32_e32 v12, vcc, 0, v7 ​
451; GCN-NEXT: v_sub_i32_e32 v13, vcc, 0, v11 ​
452; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6 450​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6
451​; GCN-NEXT: v_sub_i32_e32 v12, vcc, 0, v7
453; GCN-NEXT: v_cndmask_b32_e64 v6, v7, v12, s[0:1] 452​; GCN-NEXT: v_cndmask_b32_e64 v6, v7, v12, s[0:1]
453​; GCN-NEXT: v_sub_i32_e32 v13, vcc, 0, v11
454; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v10 454​; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v10
455; GCN-NEXT: v_cndmask_b32_e64 v7, v11, v13, s[2:3] 455​; GCN-NEXT: v_cndmask_b32_e64 v7, v11, v13, s[2:3]
456; GCN-NEXT: v_mul_hi_u32 v6, v6, v4 456​; GCN-NEXT: v_mul_hi_u32 v6, v6, v4
457; GCN-NEXT: v_mul_hi_u32 v7, v7, v5 457​; GCN-NEXT: v_mul_hi_u32 v7, v7, v5
458; GCN-NEXT: v_add_i32_e32 v10, vcc, v6, v4 458​; GCN-NEXT: v_add_i32_e32 v10, vcc, v6, v4
459; GCN-NEXT: v_subrev_i32_e32 v4, vcc, v6, v4 459​; GCN-NEXT: v_subrev_i32_e32 v4, vcc, v6, v4
460​; GCN-NEXT: v_cndmask_b32_e64 v4, v4, v10, s[0:1]
460; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v5 461​; GCN-NEXT: v_add_i32_e32 v6, vcc, v7, v5
461; GCN-NEXT: v_subrev_i32_e32 v5, vcc, v7, v5 462​; GCN-NEXT: v_subrev_i32_e32 v5, vcc, v7, v5
462; GCN-NEXT: v_cndmask_b32_e64 v4, v4, v10, s[0:1] ​
463; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[2:3] ​
464; GCN-NEXT: v_mul_hi_u32 v4, v4, v0 463​; GCN-NEXT: v_mul_hi_u32 v4, v4, v0
464​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v6, s[2:3]
465; GCN-NEXT: v_mul_hi_u32 v5, v5, v1 465​; GCN-NEXT: v_mul_hi_u32 v5, v5, v1
466; GCN-NEXT: v_mul_lo_u32 v6, v4, v2 466​; GCN-NEXT: v_mul_lo_u32 v6, v4, v2
467; GCN-NEXT: v_add_i32_e32 v7, vcc, 1, v4 467​; GCN-NEXT: v_add_i32_e32 v7, vcc, 1, v4
468; GCN-NEXT: v_add_i32_e32 v10, vcc, -1, v4 ​
469; GCN-NEXT: v_mul_lo_u32 v11, v5, v3 468​; GCN-NEXT: v_mul_lo_u32 v11, v5, v3
470; GCN-NEXT: v_add_i32_e32 v12, vcc, 1, v5 469​; GCN-NEXT: v_add_i32_e32 v10, vcc, -1, v4
471; GCN-NEXT: v_add_i32_e32 v13, vcc, -1, v5 ​
472; GCN-NEXT: v_subrev_i32_e32 v14, vcc, v6, v0 470​; GCN-NEXT: v_subrev_i32_e32 v14, vcc, v6, v0
473; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v6 471​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v6
472​; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v14, v2
474; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v11, v1 473​; GCN-NEXT: v_subrev_i32_e32 v0, vcc, v11, v1
474​; GCN-NEXT: v_add_i32_e32 v12, vcc, 1, v5
475​; GCN-NEXT: v_add_i32_e32 v13, vcc, -1, v5
475; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v11 476​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v11
476; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v14, v2 ​
477; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v3 477​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v3
478; GCN-NEXT: s_and_b64 s[2:3], s[2:3], s[0:1] 478​; GCN-NEXT: s_and_b64 s[2:3], s[2:3], s[0:1]
479; GCN-NEXT: v_cndmask_b32_e64 v0, v4, v7, s[2:3] 479​; GCN-NEXT: v_cndmask_b32_e64 v0, v4, v7, s[2:3]
480; GCN-NEXT: s_and_b64 s[2:3], s[4:5], vcc 480​; GCN-NEXT: s_and_b64 s[2:3], s[4:5], vcc
481; GCN-NEXT: v_cndmask_b32_e64 v1, v5, v12, s[2:3] 481​; GCN-NEXT: v_cndmask_b32_e64 v1, v5, v12, s[2:3]
482; GCN-NEXT: v_cndmask_b32_e64 v0, v10, v0, s[0:1] 482​; GCN-NEXT: v_cndmask_b32_e64 v0, v10, v0, s[0:1]
483; GCN-NEXT: v_cndmask_b32_e32 v1, v13, v1, vcc 483​; GCN-NEXT: v_cndmask_b32_e32 v1, v13, v1, vcc
484; GCN-NEXT: v_xor_b32_e32 v0, v0, v8 484​; GCN-NEXT: v_xor_b32_e32 v0, v0, v8
▲ Show 20 Lines • Show All 247 Lines • ▼ Show 20 Line(s)728; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
732 %result = sdiv <2 x i32> %num, %den 732​ %result = sdiv <2 x i32> %num, %den
733 store <2 x i32> %result, <2 x i32> addrspace(1)* %out 733​ store <2 x i32> %result, <2 x i32> addrspace(1)* %out
734 ret void 734​ ret void
735} 735​}
736 736​
737define amdgpu_kernel void @sdiv_v2i32_4(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { 737​define amdgpu_kernel void @sdiv_v2i32_4(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
738; GCN-LABEL: sdiv_v2i32_4: 738​; GCN-LABEL: sdiv_v2i32_4:
739; GCN: ; %bb.0: 739​; GCN: ; %bb.0:
740; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 740​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
741; GCN-NEXT: s_mov_b32 s7, 0xf000 741​; GCN-NEXT: s_mov_b32 s3, 0xf000
742; GCN-NEXT: s_mov_b32 s6, -1 742​; GCN-NEXT: s_mov_b32 s2, -1
743; GCN-NEXT: s_mov_b32 s10, s6 ​
744; GCN-NEXT: s_mov_b32 s11, s7 ​
745; GCN-NEXT: s_waitcnt lgkmcnt(0) 743​; GCN-NEXT: s_waitcnt lgkmcnt(0)
746; GCN-NEXT: s_mov_b32 s8, s2 744​; GCN-NEXT: s_mov_b32 s0, s4
747; GCN-NEXT: s_mov_b32 s9, s3 745​; GCN-NEXT: s_mov_b32 s1, s5
748; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 746​; GCN-NEXT: s_mov_b32 s4, s6
749; GCN-NEXT: s_mov_b32 s4, s0 747​; GCN-NEXT: s_mov_b32 s5, s7
750; GCN-NEXT: s_mov_b32 s5, s1 748​; GCN-NEXT: s_mov_b32 s6, s2
749​; GCN-NEXT: s_mov_b32 s7, s3
750​; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0
751; GCN-NEXT: s_waitcnt vmcnt(0) 751​; GCN-NEXT: s_waitcnt vmcnt(0)
752; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v0 752​; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v0
753; GCN-NEXT: v_ashrrev_i32_e32 v3, 31, v1 753​; GCN-NEXT: v_ashrrev_i32_e32 v3, 31, v1
754; GCN-NEXT: v_lshrrev_b32_e32 v2, 30, v2 754​; GCN-NEXT: v_lshrrev_b32_e32 v2, 30, v2
755; GCN-NEXT: v_lshrrev_b32_e32 v3, 30, v3 755​; GCN-NEXT: v_lshrrev_b32_e32 v3, 30, v3
756; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v0 756​; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v0
757; GCN-NEXT: v_add_i32_e32 v1, vcc, v3, v1 757​; GCN-NEXT: v_add_i32_e32 v1, vcc, v3, v1
758; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0 758​; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0
759; GCN-NEXT: v_ashrrev_i32_e32 v1, 2, v1 759​; GCN-NEXT: v_ashrrev_i32_e32 v1, 2, v1
760; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 760​; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
761; GCN-NEXT: s_endpgm 761​; GCN-NEXT: s_endpgm
762; 762​;
763; TONGA-LABEL: sdiv_v2i32_4: 763​; TONGA-LABEL: sdiv_v2i32_4:
764; TONGA: ; %bb.0: 764​; TONGA: ; %bb.0:
765; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 765​; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
766; TONGA-NEXT: s_mov_b32 s3, 0xf000 766​; TONGA-NEXT: s_mov_b32 s3, 0xf000
767; TONGA-NEXT: s_mov_b32 s2, -1 767​; TONGA-NEXT: s_mov_b32 s2, -1
768; TONGA-NEXT: s_waitcnt lgkmcnt(0) 768​; TONGA-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Line(s)839; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
841 %result = sdiv <2 x i32> %num, <i32 4, i32 4> 841​ %result = sdiv <2 x i32> %num, <i32 4, i32 4>
842 store <2 x i32> %result, <2 x i32> addrspace(1)* %out 842​ store <2 x i32> %result, <2 x i32> addrspace(1)* %out
843 ret void 843​ ret void
844} 844​}
845 845​
846define amdgpu_kernel void @sdiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { 846​define amdgpu_kernel void @sdiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
847; GCN-LABEL: sdiv_v4i32: 847​; GCN-LABEL: sdiv_v4i32:
848; GCN: ; %bb.0: 848​; GCN: ; %bb.0:
849; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 849​; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x9
850; GCN-NEXT: s_mov_b32 s19, 0xf000 850​; GCN-NEXT: s_mov_b32 s11, 0xf000
851; GCN-NEXT: s_mov_b32 s18, -1 851​; GCN-NEXT: s_mov_b32 s10, -1
852; GCN-NEXT: s_mov_b32 s2, s18 852​; GCN-NEXT: s_mov_b32 s2, s10
853; GCN-NEXT: s_mov_b32 s3, s19 853​; GCN-NEXT: s_mov_b32 s3, s11
854; GCN-NEXT: s_waitcnt lgkmcnt(0) 854​; GCN-NEXT: s_waitcnt lgkmcnt(0)
855; GCN-NEXT: s_mov_b32 s0, s10 855​; GCN-NEXT: s_mov_b32 s0, s14
856; GCN-NEXT: s_mov_b32 s1, s11 856​; GCN-NEXT: s_mov_b32 s1, s15
857; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 857​; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0
858; GCN-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16 858​; GCN-NEXT: buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16
859; GCN-NEXT: s_mov_b32 s6, 0x4f800000 859​; GCN-NEXT: s_mov_b32 s14, 0x4f800000
860​; GCN-NEXT: s_mov_b32 s8, s12
861​; GCN-NEXT: s_mov_b32 s9, s13
860; GCN-NEXT: s_waitcnt vmcnt(1) 862​; GCN-NEXT: s_waitcnt vmcnt(1)
861; GCN-NEXT: v_ashrrev_i32_e32 v8, 31, v0 863​; GCN-NEXT: v_ashrrev_i32_e32 v8, 31, v0
862; GCN-NEXT: s_waitcnt vmcnt(0) 864​; GCN-NEXT: s_waitcnt vmcnt(0)
863; GCN-NEXT: v_ashrrev_i32_e32 v9, 31, v4 865​; GCN-NEXT: v_ashrrev_i32_e32 v9, 31, v4
864; GCN-NEXT: v_ashrrev_i32_e32 v10, 31, v1 ​
865; GCN-NEXT: v_ashrrev_i32_e32 v11, 31, v5 ​
866; GCN-NEXT: v_ashrrev_i32_e32 v12, 31, v2 ​
867; GCN-NEXT: v_ashrrev_i32_e32 v13, 31, v6 ​
868; GCN-NEXT: v_ashrrev_i32_e32 v14, 31, v3 ​
869; GCN-NEXT: v_ashrrev_i32_e32 v15, 31, v7 ​
870; GCN-NEXT: v_xor_b32_e32 v16, v8, v9 ​
871; GCN-NEXT: v_add_i32_e32 v0, vcc, v8, v0 ​
872; GCN-NEXT: v_add_i32_e32 v1, vcc, v10, v1 ​
873; GCN-NEXT: v_add_i32_e32 v2, vcc, v12, v2 ​
874; GCN-NEXT: v_add_i32_e32 v3, vcc, v14, v3 ​
875; GCN-NEXT: v_add_i32_e32 v4, vcc, v9, v4 866​; GCN-NEXT: v_add_i32_e32 v4, vcc, v9, v4
876; GCN-NEXT: v_add_i32_e32 v5, vcc, v11, v5 ​
877; GCN-NEXT: v_add_i32_e32 v6, vcc, v13, v6 ​
878; GCN-NEXT: v_add_i32_e32 v7, vcc, v15, v7 ​
879; GCN-NEXT: v_xor_b32_e32 v17, v10, v11 ​
880; GCN-NEXT: v_xor_b32_e32 v18, v12, v13 ​
881; GCN-NEXT: v_xor_b32_e32 v19, v14, v15 ​
882; GCN-NEXT: v_xor_b32_e32 v0, v0, v8 ​
883; GCN-NEXT: v_xor_b32_e32 v4, v4, v9 867​; GCN-NEXT: v_xor_b32_e32 v4, v4, v9
884; GCN-NEXT: v_xor_b32_e32 v1, v1, v10 868​; GCN-NEXT: v_xor_b32_e32 v15, v8, v9
869​; GCN-NEXT: v_cvt_f32_u32_e32 v9, v4
870​; GCN-NEXT: v_ashrrev_i32_e32 v11, 31, v5
871​; GCN-NEXT: v_add_i32_e32 v5, vcc, v11, v5
872​; GCN-NEXT: v_add_i32_e32 v0, vcc, v8, v0
873​; GCN-NEXT: v_rcp_iflag_f32_e32 v9, v9
885; GCN-NEXT: v_xor_b32_e32 v5, v5, v11 874​; GCN-NEXT: v_xor_b32_e32 v5, v5, v11
886; GCN-NEXT: v_xor_b32_e32 v2, v2, v12 875​; GCN-NEXT: v_xor_b32_e32 v0, v0, v8
887; GCN-NEXT: v_xor_b32_e32 v6, v6, v13 876​; GCN-NEXT: v_cvt_f32_u32_e32 v8, v5
888; GCN-NEXT: v_xor_b32_e32 v3, v3, v14 877​; GCN-NEXT: v_mul_f32_e32 v9, s14, v9
889; GCN-NEXT: v_xor_b32_e32 v7, v7, v15 878​; GCN-NEXT: v_cvt_u32_f32_e32 v9, v9
890; GCN-NEXT: v_cvt_f32_u32_e32 v8, v4 879​; GCN-NEXT: v_ashrrev_i32_e32 v10, 31, v1
891; GCN-NEXT: v_cvt_f32_u32_e32 v9, v5 ​
892; GCN-NEXT: v_cvt_f32_u32_e32 v10, v6 ​
893; GCN-NEXT: v_rcp_iflag_f32_e32 v8, v8 880​; GCN-NEXT: v_rcp_iflag_f32_e32 v8, v8
894; GCN-NEXT: v_rcp_iflag_f32_e32 v9, v9 881​; GCN-NEXT: v_add_i32_e32 v1, vcc, v10, v1
895; GCN-NEXT: v_rcp_iflag_f32_e32 v10, v10 882​; GCN-NEXT: v_xor_b32_e32 v16, v10, v11
896; GCN-NEXT: v_mul_f32_e32 v8, s6, v8 883​; GCN-NEXT: v_xor_b32_e32 v1, v1, v10
897; GCN-NEXT: v_mul_f32_e32 v9, s6, v9 884​; GCN-NEXT: v_mul_f32_e32 v8, s14, v8
898; GCN-NEXT: v_mul_f32_e32 v10, s6, v10 885​; GCN-NEXT: v_mul_hi_u32 v11, v9, v4
886​; GCN-NEXT: v_mul_lo_u32 v10, v9, v4
899; GCN-NEXT: v_cvt_u32_f32_e32 v8, v8 887​; GCN-NEXT: v_cvt_u32_f32_e32 v8, v8
900; GCN-NEXT: v_cvt_u32_f32_e32 v9, v9 888​; GCN-NEXT: v_ashrrev_i32_e32 v12, 31, v2
901; GCN-NEXT: v_cvt_u32_f32_e32 v10, v10 889​; GCN-NEXT: v_ashrrev_i32_e32 v13, 31, v6
902; GCN-NEXT: v_mul_hi_u32 v11, v8, v4 890​; GCN-NEXT: v_add_i32_e32 v2, vcc, v12, v2
903; GCN-NEXT: v_mul_lo_u32 v12, v8, v4 ​
904; GCN-NEXT: v_mul_hi_u32 v13, v9, v5 ​
905; GCN-NEXT: v_mul_lo_u32 v14, v9, v5 ​
906; GCN-NEXT: v_sub_i32_e32 v15, vcc, 0, v12 ​
907; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v11 891​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v11
908; GCN-NEXT: v_mul_hi_u32 v11, v10, v6 892​; GCN-NEXT: v_xor_b32_e32 v17, v12, v13
909; GCN-NEXT: v_cndmask_b32_e64 v12, v12, v15, s[0:1] 893​; GCN-NEXT: v_xor_b32_e32 v2, v2, v12
910; GCN-NEXT: v_sub_i32_e32 v15, vcc, 0, v14 894​; GCN-NEXT: v_sub_i32_e32 v12, vcc, 0, v10
911; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v13 895​; GCN-NEXT: v_cndmask_b32_e64 v10, v10, v12, s[0:1]
912; GCN-NEXT: v_mul_lo_u32 v13, v10, v6 896​; GCN-NEXT: v_mul_hi_u32 v12, v8, v5
913; GCN-NEXT: v_cndmask_b32_e64 v14, v14, v15, s[2:3] 897​; GCN-NEXT: v_add_i32_e32 v6, vcc, v13, v6
914; GCN-NEXT: v_sub_i32_e32 v15, vcc, 0, v13 898​; GCN-NEXT: v_xor_b32_e32 v6, v6, v13
915; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v11 899​; GCN-NEXT: v_mul_lo_u32 v11, v8, v5
916; GCN-NEXT: v_cvt_f32_u32_e32 v11, v7 900​; GCN-NEXT: v_cmp_eq_u32_e64 s[2:3], 0, v12
917; GCN-NEXT: v_rcp_iflag_f32_e32 v11, v11 901​; GCN-NEXT: v_cvt_f32_u32_e32 v12, v6
918; GCN-NEXT: v_mul_f32_e32 v11, s6, v11 902​; GCN-NEXT: v_mul_hi_u32 v10, v10, v9
919; GCN-NEXT: v_cvt_u32_f32_e32 v11, v11 903​; GCN-NEXT: v_sub_i32_e32 v13, vcc, 0, v11
920; GCN-NEXT: v_cndmask_b32_e64 v13, v13, v15, s[4:5] 904​; GCN-NEXT: v_cndmask_b32_e64 v11, v11, v13, s[2:3]
921; GCN-NEXT: v_mul_hi_u32 v15, v11, v7 905​; GCN-NEXT: v_rcp_iflag_f32_e32 v12, v12
922; GCN-NEXT: v_mul_lo_u32 v20, v11, v7 906​; GCN-NEXT: v_ashrrev_i32_e32 v14, 31, v7
923; GCN-NEXT: v_sub_i32_e32 v21, vcc, 0, v20 907​; GCN-NEXT: v_add_i32_e32 v7, vcc, v14, v7
924; GCN-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v15 908​; GCN-NEXT: v_xor_b32_e32 v7, v7, v14
925; GCN-NEXT: v_cndmask_b32_e64 v15, v20, v21, s[6:7] 909​; GCN-NEXT: v_mul_f32_e32 v12, s14, v12
926; GCN-NEXT: v_mul_hi_u32 v12, v12, v8 910​; GCN-NEXT: v_cvt_u32_f32_e32 v12, v12
927; GCN-NEXT: v_add_i32_e32 v20, vcc, v12, v8 911​; GCN-NEXT: v_mul_hi_u32 v18, v12, v6
928; GCN-NEXT: v_subrev_i32_e32 v8, vcc, v12, v8 912​; GCN-NEXT: v_mul_lo_u32 v13, v12, v6
929; GCN-NEXT: v_mul_hi_u32 v12, v14, v9 913​; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v18
930; GCN-NEXT: v_add_i32_e32 v14, vcc, v12, v9 914​; GCN-NEXT: v_add_i32_e32 v18, vcc, v10, v9
931; GCN-NEXT: v_subrev_i32_e32 v9, vcc, v12, v9 915​; GCN-NEXT: v_subrev_i32_e32 v9, vcc, v10, v9
932; GCN-NEXT: v_mul_hi_u32 v12, v13, v10 916​; GCN-NEXT: v_mul_hi_u32 v10, v11, v8
933; GCN-NEXT: v_add_i32_e32 v13, vcc, v12, v10 917​; GCN-NEXT: v_cndmask_b32_e64 v9, v9, v18, s[0:1]
934; GCN-NEXT: v_subrev_i32_e32 v10, vcc, v12, v10 918​; GCN-NEXT: v_mul_hi_u32 v9, v9, v0
935; GCN-NEXT: v_mul_hi_u32 v12, v15, v11 919​; GCN-NEXT: v_sub_i32_e32 v19, vcc, 0, v13
936; GCN-NEXT: v_add_i32_e32 v15, vcc, v12, v11 920​; GCN-NEXT: v_add_i32_e32 v11, vcc, v10, v8
937; GCN-NEXT: v_subrev_i32_e32 v11, vcc, v12, v11 921​; GCN-NEXT: v_subrev_i32_e32 v8, vcc, v10, v8
938; GCN-NEXT: s_mov_b32 s16, s8 922​; GCN-NEXT: v_cndmask_b32_e64 v13, v13, v19, s[4:5]
939; GCN-NEXT: s_mov_b32 s17, s9 923​; GCN-NEXT: v_cndmask_b32_e64 v8, v8, v11, s[2:3]
940; GCN-NEXT: v_cndmask_b32_e64 v8, v8, v20, s[0:1] 924​; GCN-NEXT: v_mul_hi_u32 v10, v13, v12
941; GCN-NEXT: v_cndmask_b32_e64 v9, v9, v14, s[2:3] 925​; GCN-NEXT: v_mul_lo_u32 v11, v9, v4
942; GCN-NEXT: v_cndmask_b32_e64 v10, v10, v13, s[4:5] 926​; GCN-NEXT: v_mul_hi_u32 v8, v8, v1
943; GCN-NEXT: v_cndmask_b32_e64 v11, v11, v15, s[6:7] 927​; GCN-NEXT: v_add_i32_e32 v13, vcc, v10, v12
944; GCN-NEXT: v_mul_hi_u32 v8, v8, v0 928​; GCN-NEXT: v_subrev_i32_e32 v10, vcc, v10, v12
945; GCN-NEXT: v_mul_hi_u32 v9, v9, v1 929​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v11
946; GCN-NEXT: v_mul_hi_u32 v10, v10, v2 930​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v11
947; GCN-NEXT: v_mul_hi_u32 v11, v11, v3 ​
948; GCN-NEXT: v_mul_lo_u32 v12, v8, v4 ​
949; GCN-NEXT: v_add_i32_e32 v13, vcc, 1, v8 ​
950; GCN-NEXT: v_add_i32_e32 v14, vcc, -1, v8 ​
951; GCN-NEXT: v_mul_lo_u32 v15, v9, v5 ​
952; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v12 ​
953; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v12 ​
954; GCN-NEXT: v_add_i32_e32 v12, vcc, 1, v9 ​
955; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v0, v4 931​; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v0, v4
956; GCN-NEXT: v_add_i32_e32 v0, vcc, -1, v9 932​; GCN-NEXT: v_cndmask_b32_e64 v10, v10, v13, s[4:5]
957; GCN-NEXT: v_mul_lo_u32 v4, v10, v6 933​; GCN-NEXT: v_mul_lo_u32 v0, v8, v5
958; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v1, v15 934​; GCN-NEXT: v_mul_hi_u32 v4, v10, v2
959; GCN-NEXT: v_sub_i32_e32 v1, vcc, v1, v15 935​; GCN-NEXT: v_add_i32_e32 v12, vcc, -1, v9
960; GCN-NEXT: v_add_i32_e32 v15, vcc, 1, v10 936​; GCN-NEXT: v_add_i32_e32 v10, vcc, -1, v8
961; GCN-NEXT: v_cmp_ge_u32_e64 s[6:7], v1, v5 937​; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v1, v0
962; GCN-NEXT: v_add_i32_e32 v1, vcc, -1, v10 938​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v1, v0
963; GCN-NEXT: v_mul_lo_u32 v5, v11, v7 939​; GCN-NEXT: v_cmp_ge_u32_e64 s[6:7], v0, v5
964; GCN-NEXT: v_cmp_ge_u32_e64 s[8:9], v2, v4 940​; GCN-NEXT: v_mul_lo_u32 v5, v4, v6
965; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v4 941​; GCN-NEXT: v_add_i32_e32 v1, vcc, 1, v9
966; GCN-NEXT: v_add_i32_e32 v4, vcc, -1, v11 942​; GCN-NEXT: v_add_i32_e32 v0, vcc, 1, v8
967; GCN-NEXT: v_cmp_ge_u32_e64 s[10:11], v3, v5 943​; GCN-NEXT: s_and_b64 vcc, s[2:3], s[0:1]
968; GCN-NEXT: v_sub_i32_e32 v3, vcc, v3, v5 944​; GCN-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc
969; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v11 945​; GCN-NEXT: v_sub_i32_e32 v9, vcc, v2, v5
970; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 946​; GCN-NEXT: s_and_b64 vcc, s[6:7], s[4:5]
971; GCN-NEXT: v_cmp_ge_u32_e64 s[12:13], v3, v7 947​; GCN-NEXT: v_cvt_f32_u32_e32 v11, v7
972; GCN-NEXT: s_and_b64 s[2:3], s[2:3], s[0:1] 948​; GCN-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc
973; GCN-NEXT: v_cndmask_b32_e64 v2, v8, v13, s[2:3] 949​; GCN-NEXT: v_cndmask_b32_e64 v1, v12, v1, s[0:1]
974; GCN-NEXT: s_and_b64 s[2:3], s[6:7], s[4:5] 950​; GCN-NEXT: v_cndmask_b32_e64 v0, v10, v0, s[4:5]
975; GCN-NEXT: v_cndmask_b32_e64 v3, v9, v12, s[2:3] 951​; GCN-NEXT: v_xor_b32_e32 v1, v1, v15
976; GCN-NEXT: s_and_b64 vcc, vcc, s[8:9] 952​; GCN-NEXT: v_xor_b32_e32 v8, v0, v16
977; GCN-NEXT: v_cndmask_b32_e32 v6, v10, v15, vcc 953​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v1, v15
978; GCN-NEXT: s_and_b64 vcc, s[12:13], s[10:11] 954​; GCN-NEXT: v_sub_i32_e32 v1, vcc, v8, v16
979; GCN-NEXT: v_cndmask_b32_e32 v5, v11, v5, vcc 955​; GCN-NEXT: v_rcp_iflag_f32_e32 v8, v11
980; GCN-NEXT: v_cndmask_b32_e64 v2, v14, v2, s[0:1] 956​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v9, v6
981; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[4:5] 957​; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v2, v5
982; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v6, s[8:9] 958​; GCN-NEXT: v_ashrrev_i32_e32 v10, 31, v3
983; GCN-NEXT: v_cndmask_b32_e64 v3, v4, v5, s[10:11] 959​; GCN-NEXT: v_mul_f32_e32 v8, s14, v8
984; GCN-NEXT: v_xor_b32_e32 v2, v2, v16 960​; GCN-NEXT: v_cvt_u32_f32_e32 v8, v8
985; GCN-NEXT: v_xor_b32_e32 v4, v0, v17 961​; GCN-NEXT: v_add_i32_e32 v3, vcc, v10, v3
986; GCN-NEXT: v_xor_b32_e32 v5, v1, v18 962​; GCN-NEXT: v_xor_b32_e32 v3, v3, v10
987; GCN-NEXT: v_xor_b32_e32 v3, v3, v19 963​; GCN-NEXT: v_add_i32_e32 v6, vcc, -1, v4
988; GCN-NEXT: v_sub_i32_e32 v0, vcc, v2, v16 964​; GCN-NEXT: v_mul_lo_u32 v5, v8, v7
989; GCN-NEXT: v_sub_i32_e32 v1, vcc, v4, v17 965​; GCN-NEXT: v_mul_hi_u32 v9, v8, v7
990; GCN-NEXT: v_sub_i32_e32 v2, vcc, v5, v18 966​; GCN-NEXT: v_add_i32_e32 v2, vcc, 1, v4
991; GCN-NEXT: v_sub_i32_e32 v3, vcc, v3, v19 967​; GCN-NEXT: v_sub_i32_e32 v11, vcc, 0, v5
992; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 968​; GCN-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v9
969​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v11, s[4:5]
970​; GCN-NEXT: v_mul_hi_u32 v5, v5, v8
971​; GCN-NEXT: v_add_i32_e32 v9, vcc, v5, v8
972​; GCN-NEXT: v_subrev_i32_e32 v5, vcc, v5, v8
973​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v9, s[4:5]
974​; GCN-NEXT: v_mul_hi_u32 v5, v5, v3
975​; GCN-NEXT: s_and_b64 vcc, s[0:1], s[2:3]
976​; GCN-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
977​; GCN-NEXT: v_cndmask_b32_e64 v2, v6, v2, s[2:3]
978​; GCN-NEXT: v_mul_lo_u32 v4, v5, v7
979​; GCN-NEXT: v_xor_b32_e32 v2, v2, v17
980​; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v17
981​; GCN-NEXT: v_xor_b32_e32 v6, v10, v14
982​; GCN-NEXT: v_sub_i32_e32 v8, vcc, v3, v4
983​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v8, v7
984​; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v3, v4
985​; GCN-NEXT: v_add_i32_e32 v7, vcc, -1, v5
986​; GCN-NEXT: v_add_i32_e32 v3, vcc, 1, v5
987​; GCN-NEXT: s_and_b64 vcc, s[0:1], s[2:3]
988​; GCN-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc
989​; GCN-NEXT: v_cndmask_b32_e64 v3, v7, v3, s[2:3]
990​; GCN-NEXT: v_xor_b32_e32 v3, v3, v6
991​; GCN-NEXT: v_sub_i32_e32 v3, vcc, v3, v6
992​; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
993; GCN-NEXT: s_endpgm 993​; GCN-NEXT: s_endpgm
994; 994​;
995; TONGA-LABEL: sdiv_v4i32: 995​; TONGA-LABEL: sdiv_v4i32:
996; TONGA: ; %bb.0: 996​; TONGA: ; %bb.0:
997; TONGA-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x24 997​; TONGA-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x24
998; TONGA-NEXT: s_mov_b32 s11, 0xf000 998​; TONGA-NEXT: s_mov_b32 s11, 0xf000
999; TONGA-NEXT: s_mov_b32 s10, -1 999​; TONGA-NEXT: s_mov_b32 s10, -1
1000; TONGA-NEXT: s_mov_b32 s2, s10 1000​; TONGA-NEXT: s_mov_b32 s2, s10
▲ Show 20 Lines • Show All 429 Lines • ▼ Show 20 Line(s)1426; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1430 %result = sdiv <4 x i32> %num, %den 1430​ %result = sdiv <4 x i32> %num, %den
1431 store <4 x i32> %result, <4 x i32> addrspace(1)* %out 1431​ store <4 x i32> %result, <4 x i32> addrspace(1)* %out
1432 ret void 1432​ ret void
1433} 1433​}
1434 1434​
1435define amdgpu_kernel void @sdiv_v4i32_4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { 1435​define amdgpu_kernel void @sdiv_v4i32_4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
1436; GCN-LABEL: sdiv_v4i32_4: 1436​; GCN-LABEL: sdiv_v4i32_4:
1437; GCN: ; %bb.0: 1437​; GCN: ; %bb.0:
1438; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 1438​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1439; GCN-NEXT: s_mov_b32 s7, 0xf000 1439​; GCN-NEXT: s_mov_b32 s3, 0xf000
1440; GCN-NEXT: s_mov_b32 s6, -1 1440​; GCN-NEXT: s_mov_b32 s2, -1
1441; GCN-NEXT: s_mov_b32 s10, s6 ​
1442; GCN-NEXT: s_mov_b32 s11, s7 ​
1443; GCN-NEXT: s_waitcnt lgkmcnt(0) 1441​; GCN-NEXT: s_waitcnt lgkmcnt(0)
1444; GCN-NEXT: s_mov_b32 s8, s2 1442​; GCN-NEXT: s_mov_b32 s0, s4
1445; GCN-NEXT: s_mov_b32 s9, s3 1443​; GCN-NEXT: s_mov_b32 s1, s5
1446; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 1444​; GCN-NEXT: s_mov_b32 s4, s6
1447; GCN-NEXT: s_mov_b32 s4, s0 1445​; GCN-NEXT: s_mov_b32 s5, s7
1448; GCN-NEXT: s_mov_b32 s5, s1 1446​; GCN-NEXT: s_mov_b32 s6, s2
1447​; GCN-NEXT: s_mov_b32 s7, s3
1448​; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0
1449; GCN-NEXT: s_waitcnt vmcnt(0) 1449​; GCN-NEXT: s_waitcnt vmcnt(0)
1450; GCN-NEXT: v_ashrrev_i32_e32 v4, 31, v0 1450​; GCN-NEXT: v_ashrrev_i32_e32 v4, 31, v0
1451; GCN-NEXT: v_ashrrev_i32_e32 v5, 31, v1 1451​; GCN-NEXT: v_ashrrev_i32_e32 v5, 31, v1
1452; GCN-NEXT: v_ashrrev_i32_e32 v6, 31, v2 1452​; GCN-NEXT: v_ashrrev_i32_e32 v6, 31, v2
1453; GCN-NEXT: v_ashrrev_i32_e32 v7, 31, v3 1453​; GCN-NEXT: v_ashrrev_i32_e32 v7, 31, v3
1454; GCN-NEXT: v_lshrrev_b32_e32 v4, 30, v4 1454​; GCN-NEXT: v_lshrrev_b32_e32 v4, 30, v4
1455; GCN-NEXT: v_lshrrev_b32_e32 v5, 30, v5 1455​; GCN-NEXT: v_lshrrev_b32_e32 v5, 30, v5
1456; GCN-NEXT: v_lshrrev_b32_e32 v6, 30, v6 1456​; GCN-NEXT: v_lshrrev_b32_e32 v6, 30, v6
1457; GCN-NEXT: v_lshrrev_b32_e32 v7, 30, v7 1457​; GCN-NEXT: v_lshrrev_b32_e32 v7, 30, v7
1458; GCN-NEXT: v_add_i32_e32 v0, vcc, v4, v0 1458​; GCN-NEXT: v_add_i32_e32 v0, vcc, v4, v0
1459; GCN-NEXT: v_add_i32_e32 v1, vcc, v5, v1 1459​; GCN-NEXT: v_add_i32_e32 v1, vcc, v5, v1
1460; GCN-NEXT: v_add_i32_e32 v2, vcc, v6, v2 1460​; GCN-NEXT: v_add_i32_e32 v2, vcc, v6, v2
1461; GCN-NEXT: v_add_i32_e32 v3, vcc, v7, v3 1461​; GCN-NEXT: v_add_i32_e32 v3, vcc, v7, v3
1462; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0 1462​; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0
1463; GCN-NEXT: v_ashrrev_i32_e32 v1, 2, v1 1463​; GCN-NEXT: v_ashrrev_i32_e32 v1, 2, v1
1464; GCN-NEXT: v_ashrrev_i32_e32 v2, 2, v2 1464​; GCN-NEXT: v_ashrrev_i32_e32 v2, 2, v2
1465; GCN-NEXT: v_ashrrev_i32_e32 v3, 2, v3 1465​; GCN-NEXT: v_ashrrev_i32_e32 v3, 2, v3
1466; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 1466​; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1467; GCN-NEXT: s_endpgm 1467​; GCN-NEXT: s_endpgm
1468; 1468​;
1469; TONGA-LABEL: sdiv_v4i32_4: 1469​; TONGA-LABEL: sdiv_v4i32_4:
1470; TONGA: ; %bb.0: 1470​; TONGA: ; %bb.0:
1471; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 1471​; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1472; TONGA-NEXT: s_mov_b32 s3, 0xf000 1472​; TONGA-NEXT: s_mov_b32 s3, 0xf000
1473; TONGA-NEXT: s_mov_b32 s2, -1 1473​; TONGA-NEXT: s_mov_b32 s2, -1
1474; TONGA-NEXT: s_waitcnt lgkmcnt(0) 1474​; TONGA-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Line(s)1572; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1574 %result = sdiv <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4> 1574​ %result = sdiv <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4>
1575 store <4 x i32> %result, <4 x i32> addrspace(1)* %out 1575​ store <4 x i32> %result, <4 x i32> addrspace(1)* %out
1576 ret void 1576​ ret void
1577} 1577​}
1578 1578​
1579define amdgpu_kernel void @v_sdiv_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { 1579​define amdgpu_kernel void @v_sdiv_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
1580; GCN-LABEL: v_sdiv_i8: 1580​; GCN-LABEL: v_sdiv_i8:
1581; GCN: ; %bb.0: 1581​; GCN: ; %bb.0:
1582; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 1582​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1583; GCN-NEXT: s_mov_b32 s7, 0xf000 1583​; GCN-NEXT: s_mov_b32 s3, 0xf000
1584; GCN-NEXT: s_mov_b32 s6, -1 1584​; GCN-NEXT: s_mov_b32 s2, -1
1585; GCN-NEXT: s_mov_b32 s10, s6 1585​; GCN-NEXT: s_mov_b32 s10, s2
1586; GCN-NEXT: s_mov_b32 s11, s7 1586​; GCN-NEXT: s_mov_b32 s11, s3
1587; GCN-NEXT: s_waitcnt lgkmcnt(0) 1587​; GCN-NEXT: s_waitcnt lgkmcnt(0)
1588; GCN-NEXT: s_mov_b32 s8, s2 1588​; GCN-NEXT: s_mov_b32 s8, s6
1589; GCN-NEXT: s_mov_b32 s9, s3 1589​; GCN-NEXT: s_mov_b32 s9, s7
1590; GCN-NEXT: buffer_load_sbyte v0, off, s[8:11], 0 1590​; GCN-NEXT: buffer_load_sbyte v0, off, s[8:11], 0
1591; GCN-NEXT: buffer_load_sbyte v1, off, s[8:11], 0 offset:1 1591​; GCN-NEXT: buffer_load_sbyte v1, off, s[8:11], 0 offset:1
1592; GCN-NEXT: s_mov_b32 s4, s0 1592​; GCN-NEXT: s_mov_b32 s0, s4
1593; GCN-NEXT: s_mov_b32 s5, s1 1593​; GCN-NEXT: s_mov_b32 s1, s5
1594​; GCN-NEXT: s_waitcnt vmcnt(1)
1595​; GCN-NEXT: v_cvt_f32_i32_e32 v3, v0
1594; GCN-NEXT: s_waitcnt vmcnt(0) 1596​; GCN-NEXT: s_waitcnt vmcnt(0)
1595; GCN-NEXT: v_xor_b32_e32 v2, v0, v1 1597​; GCN-NEXT: v_cvt_f32_i32_e32 v2, v1
1596; GCN-NEXT: v_cvt_f32_i32_e32 v0, v0 1598​; GCN-NEXT: v_xor_b32_e32 v0, v0, v1
1597; GCN-NEXT: v_cvt_f32_i32_e32 v1, v1 1599​; GCN-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1598; GCN-NEXT: v_ashrrev_i32_e32 v2, 30, v2 1600​; GCN-NEXT: v_or_b32_e32 v0, 1, v0
1599; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v1 1601​; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v2
1600; GCN-NEXT: v_or_b32_e32 v2, 1, v2 1602​; GCN-NEXT: v_mul_f32_e32 v1, v3, v4
1601; GCN-NEXT: v_mul_f32_e32 v3, v0, v3 1603​; GCN-NEXT: v_trunc_f32_e32 v1, v1
1602; GCN-NEXT: v_trunc_f32_e32 v3, v3 1604​; GCN-NEXT: v_mad_f32 v3, -v1, v2, v3
1603; GCN-NEXT: v_mad_f32 v0, -v3, v1, v0 1605​; GCN-NEXT: v_cvt_i32_f32_e32 v1, v1
1604; GCN-NEXT: v_cvt_i32_f32_e32 v3, v3 1606​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1605; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, |v1| 1607​; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1606; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc 1608​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
1607; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 ​
1608; GCN-NEXT: v_bfe_i32 v0, v0, 0, 8 1609​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 8
1609; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 1610​; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
1610; GCN-NEXT: s_endpgm 1611​; GCN-NEXT: s_endpgm
1611; 1612​;
1612; TONGA-LABEL: v_sdiv_i8: 1613​; TONGA-LABEL: v_sdiv_i8:
1613; TONGA: ; %bb.0: 1614​; TONGA: ; %bb.0:
1614; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 1615​; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1615; TONGA-NEXT: s_mov_b32 s3, 0xf000 1616​; TONGA-NEXT: s_mov_b32 s3, 0xf000
1616; TONGA-NEXT: s_mov_b32 s2, -1 1617​; TONGA-NEXT: s_mov_b32 s2, -1
1617; TONGA-NEXT: s_mov_b32 s10, s2 1618​; TONGA-NEXT: s_mov_b32 s10, s2
▲ Show 20 Lines • Show All 100 Lines • ▼ Show 20 Line(s)1714; EG-NEXT: 8(1.121039e-44), 2(2.802597e-45)
1718 %result.ext = sext i8 %result to i32 1719​ %result.ext = sext i8 %result to i32
1719 store i32 %result.ext, i32 addrspace(1)* %out 1720​ store i32 %result.ext, i32 addrspace(1)* %out
1720 ret void 1721​ ret void
1721} 1722​}
1722 1723​
1723define amdgpu_kernel void @v_sdiv_i23(i32 addrspace(1)* %out, i23 addrspace(1)* %in) { 1724​define amdgpu_kernel void @v_sdiv_i23(i32 addrspace(1)* %out, i23 addrspace(1)* %in) {
1724; GCN-LABEL: v_sdiv_i23: 1725​; GCN-LABEL: v_sdiv_i23:
1725; GCN: ; %bb.0: 1726​; GCN: ; %bb.0:
1726; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 1727​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1727; GCN-NEXT: s_mov_b32 s7, 0xf000 1728​; GCN-NEXT: s_mov_b32 s3, 0xf000
1728; GCN-NEXT: s_mov_b32 s6, -1 1729​; GCN-NEXT: s_mov_b32 s2, -1
1729; GCN-NEXT: s_mov_b32 s10, s6 ​
1730; GCN-NEXT: s_mov_b32 s11, s7 ​
1731; GCN-NEXT: s_waitcnt lgkmcnt(0) 1730​; GCN-NEXT: s_waitcnt lgkmcnt(0)
1732; GCN-NEXT: s_mov_b32 s8, s2 1731​; GCN-NEXT: s_mov_b32 s0, s4
1733; GCN-NEXT: s_mov_b32 s9, s3 1732​; GCN-NEXT: s_mov_b32 s1, s5
1734; GCN-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:2 1733​; GCN-NEXT: s_mov_b32 s4, s6
1735; GCN-NEXT: buffer_load_ubyte v3, off, s[8:11], 0 offset:6 1734​; GCN-NEXT: s_mov_b32 s5, s7
1736; GCN-NEXT: buffer_load_ushort v0, off, s[8:11], 0 1735​; GCN-NEXT: s_mov_b32 s6, s2
1737; GCN-NEXT: buffer_load_ushort v2, off, s[8:11], 0 offset:4 1736​; GCN-NEXT: s_mov_b32 s7, s3
1738; GCN-NEXT: s_mov_b32 s4, s0 1737​; GCN-NEXT: buffer_load_ushort v0, off, s[4:7], 0
1739; GCN-NEXT: s_mov_b32 s5, s1 1738​; GCN-NEXT: buffer_load_ubyte v1, off, s[4:7], 0 offset:2
1740; GCN-NEXT: s_waitcnt vmcnt(3) 1739​; GCN-NEXT: buffer_load_ushort v2, off, s[4:7], 0 offset:4
1741; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v1 1740​; GCN-NEXT: buffer_load_ubyte v3, off, s[4:7], 0 offset:6
1742; GCN-NEXT: s_waitcnt vmcnt(2) 1741​; GCN-NEXT: s_waitcnt vmcnt(2)
1743; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 1742​; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v1
1744; GCN-NEXT: s_waitcnt vmcnt(1) ​
1745; GCN-NEXT: v_or_b32_e32 v0, v0, v1 1743​; GCN-NEXT: v_or_b32_e32 v0, v0, v1
1746; GCN-NEXT: s_waitcnt vmcnt(0) 1744​; GCN-NEXT: s_waitcnt vmcnt(0)
1747; GCN-NEXT: v_or_b32_e32 v1, v2, v3 1745​; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3
1746​; GCN-NEXT: v_or_b32_e32 v2, v2, v3
1747​; GCN-NEXT: v_bfe_i32 v2, v2, 0, 23
1748​; GCN-NEXT: v_cvt_f32_i32_e32 v3, v2
1748; GCN-NEXT: v_bfe_i32 v0, v0, 0, 23 1749​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 23
1749; GCN-NEXT: v_bfe_i32 v1, v1, 0, 23 1750​; GCN-NEXT: v_cvt_f32_i32_e32 v1, v0
1750; GCN-NEXT: v_xor_b32_e32 v2, v0, v1 1751​; GCN-NEXT: v_xor_b32_e32 v0, v0, v2
1751; GCN-NEXT: v_cvt_f32_i32_e32 v0, v0 1752​; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v3
1752; GCN-NEXT: v_cvt_f32_i32_e32 v1, v1 1753​; GCN-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1753; GCN-NEXT: v_ashrrev_i32_e32 v2, 30, v2 1754​; GCN-NEXT: v_or_b32_e32 v0, 1, v0
1754; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v1 1755​; GCN-NEXT: v_mul_f32_e32 v2, v1, v4
1755; GCN-NEXT: v_or_b32_e32 v2, 1, v2 1756​; GCN-NEXT: v_trunc_f32_e32 v2, v2
1756; GCN-NEXT: v_mul_f32_e32 v3, v0, v3 1757​; GCN-NEXT: v_mad_f32 v1, -v2, v3, v1
1757; GCN-NEXT: v_trunc_f32_e32 v3, v3 1758​; GCN-NEXT: v_cvt_i32_f32_e32 v2, v2
1758; GCN-NEXT: v_mad_f32 v0, -v3, v1, v0 1759​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v3|
1759; GCN-NEXT: v_cvt_i32_f32_e32 v3, v3 1760​; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1760; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, |v1| 1761​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
1761; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc ​
1762; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 ​
1763; GCN-NEXT: v_bfe_i32 v0, v0, 0, 23 1762​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 23
1764; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 1763​; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
1765; GCN-NEXT: s_endpgm 1764​; GCN-NEXT: s_endpgm
1766; 1765​;
1767; TONGA-LABEL: v_sdiv_i23: 1766​; TONGA-LABEL: v_sdiv_i23:
1768; TONGA: ; %bb.0: 1767​; TONGA: ; %bb.0:
1769; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 1768​; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1770; TONGA-NEXT: s_mov_b32 s3, 0xf000 1769​; TONGA-NEXT: s_mov_b32 s3, 0xf000
1771; TONGA-NEXT: s_mov_b32 s2, -1 1770​; TONGA-NEXT: s_mov_b32 s2, -1
1772; TONGA-NEXT: s_waitcnt lgkmcnt(0) 1771​; TONGA-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 130 Lines • ▼ Show 20 Line(s)1897; EG-NEXT: 9(1.261169e-44), 2(2.802597e-45)
1903 %result.ext = sext i23 %result to i32 1902​ %result.ext = sext i23 %result to i32
1904 store i32 %result.ext, i32 addrspace(1)* %out 1903​ store i32 %result.ext, i32 addrspace(1)* %out
1905 ret void 1904​ ret void
1906} 1905​}
1907 1906​
1908define amdgpu_kernel void @v_sdiv_i24(i32 addrspace(1)* %out, i24 addrspace(1)* %in) { 1907​define amdgpu_kernel void @v_sdiv_i24(i32 addrspace(1)* %out, i24 addrspace(1)* %in) {
1909; GCN-LABEL: v_sdiv_i24: 1908​; GCN-LABEL: v_sdiv_i24:
1910; GCN: ; %bb.0: 1909​; GCN: ; %bb.0:
1911; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 1910​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1912; GCN-NEXT: s_mov_b32 s7, 0xf000 1911​; GCN-NEXT: s_mov_b32 s3, 0xf000
1913; GCN-NEXT: s_mov_b32 s6, -1 1912​; GCN-NEXT: s_mov_b32 s2, -1
1914; GCN-NEXT: s_mov_b32 s10, s6 ​
1915; GCN-NEXT: s_mov_b32 s11, s7 ​
1916; GCN-NEXT: s_waitcnt lgkmcnt(0) 1913​; GCN-NEXT: s_waitcnt lgkmcnt(0)
1917; GCN-NEXT: s_mov_b32 s8, s2 1914​; GCN-NEXT: s_mov_b32 s0, s4
1918; GCN-NEXT: s_mov_b32 s9, s3 1915​; GCN-NEXT: s_mov_b32 s1, s5
1919; GCN-NEXT: buffer_load_sbyte v1, off, s[8:11], 0 offset:2 1916​; GCN-NEXT: s_mov_b32 s4, s6
1920; GCN-NEXT: buffer_load_sbyte v3, off, s[8:11], 0 offset:6 1917​; GCN-NEXT: s_mov_b32 s5, s7
1921; GCN-NEXT: buffer_load_ushort v0, off, s[8:11], 0 1918​; GCN-NEXT: s_mov_b32 s6, s2
1922; GCN-NEXT: buffer_load_ushort v2, off, s[8:11], 0 offset:4 1919​; GCN-NEXT: s_mov_b32 s7, s3
1923; GCN-NEXT: s_mov_b32 s4, s0 1920​; GCN-NEXT: buffer_load_ushort v0, off, s[4:7], 0
1924; GCN-NEXT: s_mov_b32 s5, s1 1921​; GCN-NEXT: buffer_load_sbyte v1, off, s[4:7], 0 offset:2
1925; GCN-NEXT: s_waitcnt vmcnt(3) 1922​; GCN-NEXT: buffer_load_ushort v2, off, s[4:7], 0 offset:4
1926; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v1 1923​; GCN-NEXT: buffer_load_sbyte v3, off, s[4:7], 0 offset:6
1927; GCN-NEXT: s_waitcnt vmcnt(2) 1924​; GCN-NEXT: s_waitcnt vmcnt(2)
1928; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 1925​; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v1
1929; GCN-NEXT: s_waitcnt vmcnt(1) ​
1930; GCN-NEXT: v_or_b32_e32 v0, v0, v1 1926​; GCN-NEXT: v_or_b32_e32 v0, v0, v1
1931; GCN-NEXT: s_waitcnt vmcnt(0) 1927​; GCN-NEXT: s_waitcnt vmcnt(0)
1928​; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3
1932; GCN-NEXT: v_or_b32_e32 v2, v2, v3 1929​; GCN-NEXT: v_or_b32_e32 v2, v2, v3
1930​; GCN-NEXT: v_cvt_f32_i32_e32 v2, v2
1931​; GCN-NEXT: v_cvt_f32_i32_e32 v0, v0
1933; GCN-NEXT: v_xor_b32_e32 v1, v1, v3 1932​; GCN-NEXT: v_xor_b32_e32 v1, v1, v3
1934; GCN-NEXT: v_ashrrev_i32_e32 v1, 30, v1 1933​; GCN-NEXT: v_ashrrev_i32_e32 v1, 30, v1
1935; GCN-NEXT: v_cvt_f32_i32_e32 v0, v0 1934​; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v2
1936; GCN-NEXT: v_cvt_f32_i32_e32 v2, v2 ​
1937; GCN-NEXT: v_or_b32_e32 v1, 1, v1 1935​; GCN-NEXT: v_or_b32_e32 v1, 1, v1
1938; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v2 1936​; GCN-NEXT: v_mul_f32_e32 v3, v0, v4
1939; GCN-NEXT: v_mul_f32_e32 v3, v0, v3 ​
1940; GCN-NEXT: v_trunc_f32_e32 v3, v3 1937​; GCN-NEXT: v_trunc_f32_e32 v3, v3
1941; GCN-NEXT: v_mad_f32 v0, -v3, v2, v0 1938​; GCN-NEXT: v_mad_f32 v0, -v3, v2, v0
1942; GCN-NEXT: v_cvt_i32_f32_e32 v3, v3 1939​; GCN-NEXT: v_cvt_i32_f32_e32 v3, v3
1943; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, |v2| 1940​; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, |v2|
1944; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc 1941​; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc
1945; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3 1942​; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v3
1946; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24 1943​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
1947; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 1944​; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
1948; GCN-NEXT: s_endpgm 1945​; GCN-NEXT: s_endpgm
1949; 1946​;
1950; TONGA-LABEL: v_sdiv_i24: 1947​; TONGA-LABEL: v_sdiv_i24:
1951; TONGA: ; %bb.0: 1948​; TONGA: ; %bb.0:
1952; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 1949​; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1953; TONGA-NEXT: s_mov_b32 s3, 0xf000 1950​; TONGA-NEXT: s_mov_b32 s3, 0xf000
1954; TONGA-NEXT: s_mov_b32 s2, -1 1951​; TONGA-NEXT: s_mov_b32 s2, -1
1955; TONGA-NEXT: s_waitcnt lgkmcnt(0) 1952​; TONGA-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 136 Lines • ▼ Show 20 Line(s)2084; EG-NEXT: 8(1.121039e-44), 2(2.802597e-45)
2092 %result.ext = sext i24 %result to i32 2089​ %result.ext = sext i24 %result to i32
2093 store i32 %result.ext, i32 addrspace(1)* %out 2090​ store i32 %result.ext, i32 addrspace(1)* %out
2094 ret void 2091​ ret void
2095} 2092​}
2096 2093​
2097define amdgpu_kernel void @v_sdiv_i25(i32 addrspace(1)* %out, i25 addrspace(1)* %in) { 2094​define amdgpu_kernel void @v_sdiv_i25(i32 addrspace(1)* %out, i25 addrspace(1)* %in) {
2098; GCN-LABEL: v_sdiv_i25: 2095​; GCN-LABEL: v_sdiv_i25:
2099; GCN: ; %bb.0: 2096​; GCN: ; %bb.0:
2100; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 2097​; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
2101; GCN-NEXT: s_mov_b32 s7, 0xf000 2098​; GCN-NEXT: s_mov_b32 s7, 0xf000
2102; GCN-NEXT: s_mov_b32 s6, -1 2099​; GCN-NEXT: s_mov_b32 s6, -1
2103; GCN-NEXT: s_mov_b32 s10, s6 2100​; GCN-NEXT: s_mov_b32 s2, s6
2104; GCN-NEXT: s_mov_b32 s11, s7 2101​; GCN-NEXT: s_mov_b32 s3, s7
2105; GCN-NEXT: s_waitcnt lgkmcnt(0) 2102​; GCN-NEXT: s_waitcnt lgkmcnt(0)
2106; GCN-NEXT: s_mov_b32 s8, s2 2103​; GCN-NEXT: s_mov_b32 s0, s10
2107; GCN-NEXT: s_mov_b32 s9, s3 2104​; GCN-NEXT: s_mov_b32 s1, s11
2108; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0 2105​; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[0:3], 0
2109; GCN-NEXT: s_mov_b32 s4, s0 2106​; GCN-NEXT: s_mov_b32 s4, s8
2110; GCN-NEXT: s_mov_b32 s5, s1 2107​; GCN-NEXT: s_mov_b32 s5, s9
2111; GCN-NEXT: s_waitcnt vmcnt(0) 2108​; GCN-NEXT: s_waitcnt vmcnt(0)
2112; GCN-NEXT: v_bfe_i32 v2, v0, 0, 25 2109​; GCN-NEXT: v_bfe_i32 v2, v1, 0, 25
2113; GCN-NEXT: v_bfe_i32 v3, v1, 0, 25 ​
2114; GCN-NEXT: v_bfe_i32 v0, v0, 24, 1 ​
2115; GCN-NEXT: v_bfe_i32 v1, v1, 24, 1 2110​; GCN-NEXT: v_bfe_i32 v1, v1, 24, 1
2116; GCN-NEXT: v_xor_b32_e32 v4, v0, v1 2111​; GCN-NEXT: v_add_i32_e32 v2, vcc, v1, v2
2117; GCN-NEXT: v_add_i32_e32 v2, vcc, v0, v2 2112​; GCN-NEXT: v_xor_b32_e32 v2, v2, v1
2118; GCN-NEXT: v_add_i32_e32 v3, vcc, v1, v3 2113​; GCN-NEXT: v_cvt_f32_u32_e32 v3, v2
2119; GCN-NEXT: v_xor_b32_e32 v0, v2, v0 2114​; GCN-NEXT: v_bfe_i32 v4, v0, 0, 25
2120; GCN-NEXT: v_xor_b32_e32 v1, v3, v1 2115​; GCN-NEXT: v_bfe_i32 v0, v0, 24, 1
2121; GCN-NEXT: v_cvt_f32_u32_e32 v2, v1 2116​; GCN-NEXT: v_add_i32_e32 v4, vcc, v0, v4
2122; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v2 2117​; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v3
2123; GCN-NEXT: v_mul_f32_e32 v2, 0x4f800000, v2 2118​; GCN-NEXT: v_xor_b32_e32 v4, v4, v0
2124; GCN-NEXT: v_cvt_u32_f32_e32 v2, v2 2119​; GCN-NEXT: v_xor_b32_e32 v0, v0, v1
2125; GCN-NEXT: v_mul_hi_u32 v3, v2, v1 2120​; GCN-NEXT: v_mul_f32_e32 v3, 0x4f800000, v3
2126; GCN-NEXT: v_mul_lo_u32 v5, v2, v1 2121​; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
2127; GCN-NEXT: v_sub_i32_e32 v6, vcc, 0, v5 2122​; GCN-NEXT: v_mul_lo_u32 v5, v3, v2
2128; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v3 2123​; GCN-NEXT: v_mul_hi_u32 v6, v3, v2
2129; GCN-NEXT: v_cndmask_b32_e64 v3, v5, v6, s[0:1] 2124​; GCN-NEXT: v_sub_i32_e32 v7, vcc, 0, v5
2130; GCN-NEXT: v_mul_hi_u32 v3, v3, v2 2125​; GCN-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6
2131; GCN-NEXT: v_add_i32_e32 v5, vcc, v3, v2 2126​; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v7, s[0:1]
2132; GCN-NEXT: v_subrev_i32_e32 v2, vcc, v3, v2 2127​; GCN-NEXT: v_mul_hi_u32 v5, v5, v3
2133; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] 2128​; GCN-NEXT: v_add_i32_e32 v6, vcc, v5, v3
2134; GCN-NEXT: v_mul_hi_u32 v2, v2, v0 2129​; GCN-NEXT: v_subrev_i32_e32 v3, vcc, v5, v3
2135; GCN-NEXT: v_mul_lo_u32 v3, v2, v1 2130​; GCN-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[0:1]
2136; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v2 2131​; GCN-NEXT: v_mul_hi_u32 v3, v3, v4
2137; GCN-NEXT: v_add_i32_e32 v6, vcc, -1, v2 2132​; GCN-NEXT: v_mul_lo_u32 v1, v3, v2
2138; GCN-NEXT: v_subrev_i32_e32 v7, vcc, v3, v0 2133​; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v3
2139; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v3 2134​; GCN-NEXT: v_add_i32_e32 v6, vcc, -1, v3
2140; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v7, v1 2135​; GCN-NEXT: v_subrev_i32_e32 v7, vcc, v1, v4
2136​; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v4, v1
2137​; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v7, v2
2141; GCN-NEXT: s_and_b64 s[0:1], s[0:1], vcc 2138​; GCN-NEXT: s_and_b64 s[0:1], s[0:1], vcc
2142; GCN-NEXT: v_cndmask_b32_e64 v0, v2, v5, s[0:1] 2139​; GCN-NEXT: v_cndmask_b32_e64 v1, v3, v5, s[0:1]
2143; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc 2140​; GCN-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc
2144; GCN-NEXT: v_xor_b32_e32 v0, v0, v4 2141​; GCN-NEXT: v_xor_b32_e32 v1, v1, v0
2145; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 2142​; GCN-NEXT: v_sub_i32_e32 v0, vcc, v1, v0
2146; GCN-NEXT: v_bfe_i32 v0, v0, 0, 25 2143​; GCN-NEXT: v_bfe_i32 v0, v0, 0, 25
2147; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0 2144​; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
2148; GCN-NEXT: s_endpgm 2145​; GCN-NEXT: s_endpgm
2149; 2146​;
2150; TONGA-LABEL: v_sdiv_i25: 2147​; TONGA-LABEL: v_sdiv_i25:
2151; TONGA: ; %bb.0: 2148​; TONGA: ; %bb.0:
2152; TONGA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24 2149​; TONGA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24
2153; TONGA-NEXT: s_mov_b32 s7, 0xf000 2150​; TONGA-NEXT: s_mov_b32 s7, 0xf000
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2336; %result = add i64 %resultdiv, %resultrem 2333​; %result = add i64 %resultdiv, %resultrem
2337; store i64 %result, i64 addrspace(1)* %out, align 8 2334​; store i64 %result, i64 addrspace(1)* %out, align 8
2338; ret void 2335​; ret void
2339; } 2336​; }
2340 2337​
2341define amdgpu_kernel void @scalarize_mulhs_4xi32(<4 x i32> addrspace(1)* nocapture readonly %in, <4 x i32> addrspace(1)* nocapture %out) { 2338​define amdgpu_kernel void @scalarize_mulhs_4xi32(<4 x i32> addrspace(1)* nocapture readonly %in, <4 x i32> addrspace(1)* nocapture %out) {
2342; GCN-LABEL: scalarize_mulhs_4xi32: 2339​; GCN-LABEL: scalarize_mulhs_4xi32:
2343; GCN: ; %bb.0: 2340​; GCN: ; %bb.0:
2344; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 2341​; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
2345; GCN-NEXT: s_mov_b32 s7, 0xf000 2342​; GCN-NEXT: s_mov_b32 s3, 0xf000
2346; GCN-NEXT: s_mov_b32 s6, -1 2343​; GCN-NEXT: s_mov_b32 s2, -1
2347; GCN-NEXT: s_waitcnt lgkmcnt(0) 2344​; GCN-NEXT: s_waitcnt lgkmcnt(0)
2348; GCN-NEXT: s_mov_b32 s4, s0 2345​; GCN-NEXT: s_mov_b32 s0, s4
2349; GCN-NEXT: s_mov_b32 s5, s1 2346​; GCN-NEXT: s_mov_b32 s1, s5
2350; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 2347​; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0
2351; GCN-NEXT: s_mov_b32 s0, 0x1389c755 2348​; GCN-NEXT: s_mov_b32 s0, 0x1389c755
2352; GCN-NEXT: s_mov_b32 s4, s2 2349​; GCN-NEXT: s_mov_b32 s4, s6
2353; GCN-NEXT: s_mov_b32 s5, s3 2350​; GCN-NEXT: s_mov_b32 s5, s7
2351​; GCN-NEXT: s_mov_b32 s6, s2
2352​; GCN-NEXT: s_mov_b32 s7, s3
2354; GCN-NEXT: s_waitcnt vmcnt(0) 2353​; GCN-NEXT: s_waitcnt vmcnt(0)
2355; GCN-NEXT: v_mul_hi_i32 v0, v0, s0 2354​; GCN-NEXT: v_mul_hi_i32 v0, v0, s0
2356; GCN-NEXT: v_mul_hi_i32 v1, v1, s0 2355​; GCN-NEXT: v_mul_hi_i32 v1, v1, s0
2357; GCN-NEXT: v_mul_hi_i32 v2, v2, s0 2356​; GCN-NEXT: v_mul_hi_i32 v2, v2, s0
2358; GCN-NEXT: v_mul_hi_i32 v3, v3, s0 2357​; GCN-NEXT: v_mul_hi_i32 v3, v3, s0
2359; GCN-NEXT: v_lshrrev_b32_e32 v4, 31, v0 2358​; GCN-NEXT: v_lshrrev_b32_e32 v4, 31, v0
2360; GCN-NEXT: v_ashrrev_i32_e32 v0, 12, v0 2359​; GCN-NEXT: v_ashrrev_i32_e32 v0, 12, v0
2361; GCN-NEXT: v_lshrrev_b32_e32 v5, 31, v1 2360​; GCN-NEXT: v_lshrrev_b32_e32 v5, 31, v1
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