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Differential D69723 Diff 229352 llvm/test/CodeGen/RISCV/large-stack.ll

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llvm/test/CodeGen/RISCV/large-stack.ll

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; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: lui a0, 74565 ; RV32I-FPELIM-NEXT: lui a0, 74565
; RV32I-FPELIM-NEXT: addi a0, a0, 1664 ; RV32I-FPELIM-NEXT: addi a0, a0, 1664
; RV32I-FPELIM-NEXT: sub sp, sp, a0 ; RV32I-FPELIM-NEXT: sub sp, sp, a0
; RV32I-FPELIM-NEXT: .cfi_def_cfa_offset 305419904 ; RV32I-FPELIM-NEXT: .cfi_def_cfa_offset 305419904
; RV32I-FPELIM-NEXT: lui a0, 74565 ; RV32I-FPELIM-NEXT: lui a0, 74565
; RV32I-FPELIM-NEXT: addi a0, a0, 1664 ; RV32I-FPELIM-NEXT: addi a0, a0, 1664
; RV32I-FPELIM-NEXT: add sp, sp, a0 ; RV32I-FPELIM-NEXT: add sp, sp, a0
; RV32I-FPELIM-NEXT: .cfi_def_cfa_offset 0
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: test: ; RV32I-WITHFP-LABEL: test:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -2032 ; RV32I-WITHFP-NEXT: addi sp, sp, -2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032 ; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032
; RV32I-WITHFP-NEXT: sw ra, 2028(sp) ; RV32I-WITHFP-NEXT: sw ra, 2028(sp)
; RV32I-WITHFP-NEXT: sw s0, 2024(sp) ; RV32I-WITHFP-NEXT: sw s0, 2024(sp)
; RV32I-WITHFP-NEXT: .cfi_offset ra, -4 ; RV32I-WITHFP-NEXT: .cfi_offset ra, -4
; RV32I-WITHFP-NEXT: .cfi_offset s0, -8 ; RV32I-WITHFP-NEXT: .cfi_offset s0, -8
; RV32I-WITHFP-NEXT: addi s0, sp, 2032 ; RV32I-WITHFP-NEXT: addi s0, sp, 2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa s0, 0 ; RV32I-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV32I-WITHFP-NEXT: lui a0, 74565 ; RV32I-WITHFP-NEXT: lui a0, 74565
; RV32I-WITHFP-NEXT: addi a0, a0, -352 ; RV32I-WITHFP-NEXT: addi a0, a0, -352
; RV32I-WITHFP-NEXT: sub sp, sp, a0 ; RV32I-WITHFP-NEXT: sub sp, sp, a0
; RV32I-WITHFP-NEXT: lui a0, 74565 ; RV32I-WITHFP-NEXT: lui a0, 74565
; RV32I-WITHFP-NEXT: addi a0, a0, -352 ; RV32I-WITHFP-NEXT: addi a0, a0, -352
; RV32I-WITHFP-NEXT: add sp, sp, a0 ; RV32I-WITHFP-NEXT: add sp, sp, a0
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) ; RV32I-WITHFP-NEXT: lw s0, 2024(sp)
; RV32I-WITHFP-NEXT: .cfi_def_cfa sp, 2032
; RV32I-WITHFP-NEXT: lw ra, 2028(sp) ; RV32I-WITHFP-NEXT: lw ra, 2028(sp)
; RV32I-WITHFP-NEXT: .cfi_restore ra
; RV32I-WITHFP-NEXT: .cfi_restore s0
; RV32I-WITHFP-NEXT: addi sp, sp, 2032 ; RV32I-WITHFP-NEXT: addi sp, sp, 2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 0
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%tmp = alloca [ 305419896 x i8 ] , align 4 %tmp = alloca [ 305419896 x i8 ] , align 4
ret void ret void
} }
; This test case artificially produces register pressure which should force ; This test case artificially produces register pressure which should force
; use of the emergency spill slot. ; use of the emergency spill slot.
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; RV32I-FPELIM-NEXT: #NO_APP ; RV32I-FPELIM-NEXT: #NO_APP
; RV32I-FPELIM-NEXT: sw a0, 0(a1) ; RV32I-FPELIM-NEXT: sw a0, 0(a1)
; RV32I-FPELIM-NEXT: #APP ; RV32I-FPELIM-NEXT: #APP
; RV32I-FPELIM-NEXT: nop ; RV32I-FPELIM-NEXT: nop
; RV32I-FPELIM-NEXT: #NO_APP ; RV32I-FPELIM-NEXT: #NO_APP
; RV32I-FPELIM-NEXT: lui a0, 97 ; RV32I-FPELIM-NEXT: lui a0, 97
; RV32I-FPELIM-NEXT: addi a0, a0, 672 ; RV32I-FPELIM-NEXT: addi a0, a0, 672
; RV32I-FPELIM-NEXT: add sp, sp, a0 ; RV32I-FPELIM-NEXT: add sp, sp, a0
; RV32I-FPELIM-NEXT: .cfi_def_cfa_offset 2032
; RV32I-FPELIM-NEXT: lw s1, 2024(sp) ; RV32I-FPELIM-NEXT: lw s1, 2024(sp)
; RV32I-FPELIM-NEXT: lw s0, 2028(sp) ; RV32I-FPELIM-NEXT: lw s0, 2028(sp)
; RV32I-FPELIM-NEXT: .cfi_restore s0
; RV32I-FPELIM-NEXT: .cfi_restore s1
; RV32I-FPELIM-NEXT: addi sp, sp, 2032 ; RV32I-FPELIM-NEXT: addi sp, sp, 2032
; RV32I-FPELIM-NEXT: .cfi_def_cfa_offset 0
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: test_emergency_spill_slot: ; RV32I-WITHFP-LABEL: test_emergency_spill_slot:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -2032 ; RV32I-WITHFP-NEXT: addi sp, sp, -2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032 ; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032
; RV32I-WITHFP-NEXT: sw ra, 2028(sp) ; RV32I-WITHFP-NEXT: sw ra, 2028(sp)
; RV32I-WITHFP-NEXT: sw s0, 2024(sp) ; RV32I-WITHFP-NEXT: sw s0, 2024(sp)
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; RV32I-WITHFP-NEXT: nop ; RV32I-WITHFP-NEXT: nop
; RV32I-WITHFP-NEXT: #NO_APP ; RV32I-WITHFP-NEXT: #NO_APP
; RV32I-WITHFP-NEXT: lui a0, 97 ; RV32I-WITHFP-NEXT: lui a0, 97
; RV32I-WITHFP-NEXT: addi a0, a0, 688 ; RV32I-WITHFP-NEXT: addi a0, a0, 688
; RV32I-WITHFP-NEXT: add sp, sp, a0 ; RV32I-WITHFP-NEXT: add sp, sp, a0
; RV32I-WITHFP-NEXT: lw s2, 2016(sp) ; RV32I-WITHFP-NEXT: lw s2, 2016(sp)
; RV32I-WITHFP-NEXT: lw s1, 2020(sp) ; RV32I-WITHFP-NEXT: lw s1, 2020(sp)
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) ; RV32I-WITHFP-NEXT: lw s0, 2024(sp)
; RV32I-WITHFP-NEXT: .cfi_def_cfa sp, 2032
; RV32I-WITHFP-NEXT: lw ra, 2028(sp) ; RV32I-WITHFP-NEXT: lw ra, 2028(sp)
; RV32I-WITHFP-NEXT: .cfi_restore ra
; RV32I-WITHFP-NEXT: .cfi_restore s0
; RV32I-WITHFP-NEXT: .cfi_restore s1
; RV32I-WITHFP-NEXT: .cfi_restore s2
; RV32I-WITHFP-NEXT: addi sp, sp, 2032 ; RV32I-WITHFP-NEXT: addi sp, sp, 2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 0
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%data = alloca [ 100000 x i32 ] , align 4 %data = alloca [ 100000 x i32 ] , align 4
%ptr = getelementptr inbounds [100000 x i32], [100000 x i32]* %data, i32 0, i32 80000 %ptr = getelementptr inbounds [100000 x i32], [100000 x i32]* %data, i32 0, i32 80000
%1 = tail call { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } asm sideeffect "nop", "=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r"() %1 = tail call { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } asm sideeffect "nop", "=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r"()
%asmresult0 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 0 %asmresult0 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 0
%asmresult1 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 1 %asmresult1 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 1
%asmresult2 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 2 %asmresult2 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 2
%asmresult3 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 3 %asmresult3 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 3
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