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llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
| Show First 20 Lines • Show All 1,079 Lines • ▼ Show 20 Lines | Instruction *InstCombiner::simplifyMaskedStore(IntrinsicInst &II) { | ||||
| // If the mask is all zeros, this instruction does nothing. | // If the mask is all zeros, this instruction does nothing. | ||||
| if (ConstMask->isNullValue()) | if (ConstMask->isNullValue()) | ||||
| return eraseInstFromFunction(II); | return eraseInstFromFunction(II); | ||||
| // If the mask is all ones, this is a plain vector store of the 1st argument. | // If the mask is all ones, this is a plain vector store of the 1st argument. | ||||
| if (ConstMask->isAllOnesValue()) { | if (ConstMask->isAllOnesValue()) { | ||||
| Value *StorePtr = II.getArgOperand(1); | Value *StorePtr = II.getArgOperand(1); | ||||
| unsigned Alignment = cast<ConstantInt>(II.getArgOperand(2))->getZExtValue(); | MaybeAlign Alignment( | ||||
| cast<ConstantInt>(II.getArgOperand(2))->getZExtValue()); | |||||
| return new StoreInst(II.getArgOperand(0), StorePtr, false, Alignment); | return new StoreInst(II.getArgOperand(0), StorePtr, false, Alignment); | ||||
| } | } | ||||
| // Use masked off lanes to simplify operands via SimplifyDemandedVectorElts | // Use masked off lanes to simplify operands via SimplifyDemandedVectorElts | ||||
| APInt DemandedElts = possiblyDemandedEltsInMask(ConstMask); | APInt DemandedElts = possiblyDemandedEltsInMask(ConstMask); | ||||
| APInt UndefElts(DemandedElts.getBitWidth(), 0); | APInt UndefElts(DemandedElts.getBitWidth(), 0); | ||||
| if (Value *V = SimplifyDemandedVectorElts(II.getOperand(0), | if (Value *V = SimplifyDemandedVectorElts(II.getOperand(0), | ||||
| DemandedElts, UndefElts)) { | DemandedElts, UndefElts)) { | ||||
| ▲ Show 20 Lines • Show All 1,258 Lines • ▼ Show 20 Lines | if (getOrEnforceKnownAlignment(II->getArgOperand(1), 16, DL, II, &AC, | ||||
| return new StoreInst(II->getArgOperand(0), Ptr); | return new StoreInst(II->getArgOperand(0), Ptr); | ||||
| } | } | ||||
| break; | break; | ||||
| case Intrinsic::ppc_vsx_stxvw4x: | case Intrinsic::ppc_vsx_stxvw4x: | ||||
| case Intrinsic::ppc_vsx_stxvd2x: { | case Intrinsic::ppc_vsx_stxvd2x: { | ||||
| // Turn PPC VSX stores into normal stores. | // Turn PPC VSX stores into normal stores. | ||||
| Type *OpPtrTy = PointerType::getUnqual(II->getArgOperand(0)->getType()); | Type *OpPtrTy = PointerType::getUnqual(II->getArgOperand(0)->getType()); | ||||
| Value *Ptr = Builder.CreateBitCast(II->getArgOperand(1), OpPtrTy); | Value *Ptr = Builder.CreateBitCast(II->getArgOperand(1), OpPtrTy); | ||||
| return new StoreInst(II->getArgOperand(0), Ptr, false, 1); | return new StoreInst(II->getArgOperand(0), Ptr, false, Align::None()); | ||||
| } | } | ||||
| case Intrinsic::ppc_qpx_qvlfs: | case Intrinsic::ppc_qpx_qvlfs: | ||||
| // Turn PPC QPX qvlfs -> load if the pointer is known aligned. | // Turn PPC QPX qvlfs -> load if the pointer is known aligned. | ||||
| if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, DL, II, &AC, | if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, DL, II, &AC, | ||||
| &DT) >= 16) { | &DT) >= 16) { | ||||
| Type *VTy = VectorType::get(Builder.getFloatTy(), | Type *VTy = VectorType::get(Builder.getFloatTy(), | ||||
| II->getType()->getVectorNumElements()); | II->getType()->getVectorNumElements()); | ||||
| Value *Ptr = Builder.CreateBitCast(II->getArgOperand(0), | Value *Ptr = Builder.CreateBitCast(II->getArgOperand(0), | ||||
| ▲ Show 20 Lines • Show All 2,454 Lines • Show Last 20 Lines | |||||