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llvm/include/llvm/Analysis/TargetTransformInfo.h

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/// use for querying the codegen. /// use for querying the codegen.
/// ///
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H #ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
#define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H #define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
#include "llvm/ADT/Optional.h" #include "llvm/ADT/Optional.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/IR/IntrinsicInst.h" #include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h" #include "llvm/IR/Intrinsics.h"
#include "llvm/IR/Operator.h" #include "llvm/IR/Operator.h"
#include "llvm/IR/PassManager.h" #include "llvm/IR/PassManager.h"
#include "llvm/Pass.h" #include "llvm/Pass.h"
#include "llvm/Support/DataTypes.h" #include "llvm/Support/DataTypes.h"
#include <functional> #include <functional>
▲ Show 20 Lines • Show All 256 Lines • ▼ Show 20 Lines struct UnrollingPreferences {
bool Force; bool Force;
}; };
/// \brief Get target-customized preferences for the generic loop unrolling /// \brief Get target-customized preferences for the generic loop unrolling
/// transformation. The caller will initialize UP with the current /// transformation. The caller will initialize UP with the current
/// target-independent defaults. /// target-independent defaults.
void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) const; void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) const;
/// \brief Emit a patchable operation in the given basic block at the
/// given insertion point.
///
/// Most of the time, this will be a straight-up \c TargetOpcode::PATCHABLE_OP
/// instruction, which will be lowered by the target to a no-op that can
/// be safely replaced with a short jump. However, some targets under certain
/// conditions can have peculiar requirements for this instruction; these
/// targets can provide their own implementation of this to emit the correct
/// instruction.
void emitPatchableOp(StringRef PatchType, MachineBasicBlock &MBB,
MachineBasicBlock::iterator &MBBI) const;
/// @} /// @}
/// \name Scalar Target Information /// \name Scalar Target Information
/// @{ /// @{
/// \brief Flags indicating the kind of support for population count. /// \brief Flags indicating the kind of support for population count.
/// ///
/// Compared to the SW implementation, HW support is supposed to /// Compared to the SW implementation, HW support is supposed to
▲ Show 20 Lines • Show All 336 Lines • ▼ Show 20 Lines virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
ArrayRef<Type *> ParamTys) = 0; ArrayRef<Type *> ParamTys) = 0;
virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy, virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
ArrayRef<const Value *> Arguments) = 0; ArrayRef<const Value *> Arguments) = 0;
virtual int getUserCost(const User *U) = 0; virtual int getUserCost(const User *U) = 0;
virtual bool hasBranchDivergence() = 0; virtual bool hasBranchDivergence() = 0;
virtual bool isSourceOfDivergence(const Value *V) = 0; virtual bool isSourceOfDivergence(const Value *V) = 0;
virtual bool isLoweredToCall(const Function *F) = 0; virtual bool isLoweredToCall(const Function *F) = 0;
virtual void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) = 0; virtual void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) = 0;
virtual void emitPatchableOp(StringRef Kind,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator &MBBI) const = 0;
virtual bool isLegalAddImmediate(int64_t Imm) = 0; virtual bool isLegalAddImmediate(int64_t Imm) = 0;
virtual bool isLegalICmpImmediate(int64_t Imm) = 0; virtual bool isLegalICmpImmediate(int64_t Imm) = 0;
virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg, int64_t BaseOffset, bool HasBaseReg,
int64_t Scale, int64_t Scale,
unsigned AddrSpace) = 0; unsigned AddrSpace) = 0;
virtual bool isLegalMaskedStore(Type *DataType) = 0; virtual bool isLegalMaskedStore(Type *DataType) = 0;
virtual bool isLegalMaskedLoad(Type *DataType) = 0; virtual bool isLegalMaskedLoad(Type *DataType) = 0;
▲ Show 20 Lines • Show All 129 Lines • ▼ Show 20 Lines bool isSourceOfDivergence(const Value *V) override {
return Impl.isSourceOfDivergence(V); return Impl.isSourceOfDivergence(V);
} }
bool isLoweredToCall(const Function *F) override { bool isLoweredToCall(const Function *F) override {
return Impl.isLoweredToCall(F); return Impl.isLoweredToCall(F);
} }
void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) override { void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) override {
return Impl.getUnrollingPreferences(L, UP); return Impl.getUnrollingPreferences(L, UP);
} }
void emitPatchableOp(StringRef Kind, MachineBasicBlock &MBB,
MachineBasicBlock::iterator &MBBI) const override {
return Impl.emitPatchableOp(Kind, MBB, MBBI);
}
bool isLegalAddImmediate(int64_t Imm) override { bool isLegalAddImmediate(int64_t Imm) override {
return Impl.isLegalAddImmediate(Imm); return Impl.isLegalAddImmediate(Imm);
} }
bool isLegalICmpImmediate(int64_t Imm) override { bool isLegalICmpImmediate(int64_t Imm) override {
return Impl.isLegalICmpImmediate(Imm); return Impl.isLegalICmpImmediate(Imm);
} }
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
bool HasBaseReg, int64_t Scale, bool HasBaseReg, int64_t Scale,
▲ Show 20 Lines • Show All 283 Lines • Show Last 20 Lines