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llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
| Show First 20 Lines • Show All 128 Lines • ▼ Show 20 Lines | for (MVT VT : MVT::integer_valuetypes()) { | ||||
| setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i32, Expand); | setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i32, Expand); | ||||
| setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); | setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote); | ||||
| setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Legal); | setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Legal); | ||||
| setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Legal); | setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Legal); | ||||
| setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); | setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); | ||||
| } | } | ||||
| for (MVT VT : MVT::integer_vector_valuetypes()) { | for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) { | ||||
| setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); | setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); | ||||
| setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); | setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); | ||||
| setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i8, Expand); | setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i8, Expand); | ||||
| setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand); | setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand); | ||||
| setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand); | setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand); | ||||
| setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v4i8, Expand); | setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v4i8, Expand); | ||||
| setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Expand); | setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Expand); | ||||
| setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Expand); | setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Expand); | ||||
| ▲ Show 20 Lines • Show All 4,599 Lines • Show Last 20 Lines | |||||