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llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
| Show First 20 Lines • Show All 199 Lines • ▼ Show 20 Lines | WebAssemblyTargetLowering::WebAssemblyTargetLowering( | ||||
| // sign-extend from. | // sign-extend from. | ||||
| setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); | ||||
| if (!Subtarget->hasSignExt()) { | if (!Subtarget->hasSignExt()) { | ||||
| // Sign extends are legal only when extending a vector extract | // Sign extends are legal only when extending a vector extract | ||||
| auto Action = Subtarget->hasSIMD128() ? Custom : Expand; | auto Action = Subtarget->hasSIMD128() ? Custom : Expand; | ||||
| for (auto T : {MVT::i8, MVT::i16, MVT::i32}) | for (auto T : {MVT::i8, MVT::i16, MVT::i32}) | ||||
| setOperationAction(ISD::SIGN_EXTEND_INREG, T, Action); | setOperationAction(ISD::SIGN_EXTEND_INREG, T, Action); | ||||
| } | } | ||||
| for (auto T : MVT::integer_vector_valuetypes()) | for (auto T : MVT::integer_fixedlen_vector_valuetypes()) | ||||
| setOperationAction(ISD::SIGN_EXTEND_INREG, T, Expand); | setOperationAction(ISD::SIGN_EXTEND_INREG, T, Expand); | ||||
| // Dynamic stack allocation: use the default expansion. | // Dynamic stack allocation: use the default expansion. | ||||
| setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); | setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); | ||||
| setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); | setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); | ||||
| setOperationAction(ISD::DYNAMIC_STACKALLOC, MVTPtr, Expand); | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVTPtr, Expand); | ||||
| setOperationAction(ISD::FrameIndex, MVT::i32, Custom); | setOperationAction(ISD::FrameIndex, MVT::i32, Custom); | ||||
| Show All 15 Lines | WebAssemblyTargetLowering::WebAssemblyTargetLowering( | ||||
| setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); | setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); | ||||
| setTruncStoreAction(MVT::f64, MVT::f32, Expand); | setTruncStoreAction(MVT::f64, MVT::f32, Expand); | ||||
| for (auto T : MVT::integer_valuetypes()) | for (auto T : MVT::integer_valuetypes()) | ||||
| for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) | for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) | ||||
| setLoadExtAction(Ext, T, MVT::i1, Promote); | setLoadExtAction(Ext, T, MVT::i1, Promote); | ||||
| if (Subtarget->hasSIMD128()) { | if (Subtarget->hasSIMD128()) { | ||||
| for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, | for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, | ||||
| MVT::v2f64}) { | MVT::v2f64}) { | ||||
| for (auto MemT : MVT::vector_valuetypes()) { | for (auto MemT : MVT::fixedlen_vector_valuetypes()) { | ||||
| if (MVT(T) != MemT) { | if (MVT(T) != MemT) { | ||||
| setTruncStoreAction(T, MemT, Expand); | setTruncStoreAction(T, MemT, Expand); | ||||
| for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) | for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) | ||||
| setLoadExtAction(Ext, T, MemT, Expand); | setLoadExtAction(Ext, T, MemT, Expand); | ||||
| } | } | ||||
| } | } | ||||
| } | } | ||||
| } | } | ||||
| ▲ Show 20 Lines • Show All 1,239 Lines • Show Last 20 Lines | |||||