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Differential D64183 Diff 219578 llvm/tools/llvm-exegesis/lib/Assembler.cpp

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llvm/tools/llvm-exegesis/lib/Assembler.cpp

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} }
llvm::BitVector getFunctionReservedRegs(const llvm::TargetMachine &TM) { llvm::BitVector getFunctionReservedRegs(const llvm::TargetMachine &TM) {
std::unique_ptr<llvm::LLVMContext> Context = std::unique_ptr<llvm::LLVMContext> Context =
std::make_unique<llvm::LLVMContext>(); std::make_unique<llvm::LLVMContext>();
std::unique_ptr<llvm::Module> Module = std::unique_ptr<llvm::Module> Module =
createModule(Context, TM.createDataLayout()); createModule(Context, TM.createDataLayout());
// TODO: This only works for targets implementing LLVMTargetMachine. // TODO: This only works for targets implementing LLVMTargetMachine.
const LLVMTargetMachine &LLVMTM = static_cast<const LLVMTargetMachine&>(TM); const LLVMTargetMachine &LLVMTM = static_cast<const LLVMTargetMachine &>(TM);
std::unique_ptr<llvm::MachineModuleInfo> MMI = std::unique_ptr<llvm::MachineModuleInfoWrapperPass> MMIWP =
std::make_unique<llvm::MachineModuleInfo>(&LLVMTM); std::make_unique<llvm::MachineModuleInfoWrapperPass>(&LLVMTM);
llvm::MachineFunction &MF = llvm::MachineFunction &MF = createVoidVoidPtrMachineFunction(
createVoidVoidPtrMachineFunction(FunctionID, Module.get(), MMI.get()); FunctionID, Module.get(), &MMIWP.get()->getMMI());
// Saving reserved registers for client. // Saving reserved registers for client.
return MF.getSubtarget().getRegisterInfo()->getReservedRegs(MF); return MF.getSubtarget().getRegisterInfo()->getReservedRegs(MF);
} }
void assembleToStream(const ExegesisTarget &ET, void assembleToStream(const ExegesisTarget &ET,
std::unique_ptr<llvm::LLVMTargetMachine> TM, std::unique_ptr<llvm::LLVMTargetMachine> TM,
llvm::ArrayRef<unsigned> LiveIns, llvm::ArrayRef<unsigned> LiveIns,
llvm::ArrayRef<RegisterValue> RegisterInitialValues, llvm::ArrayRef<RegisterValue> RegisterInitialValues,
llvm::ArrayRef<llvm::MCInst> Instructions, llvm::ArrayRef<llvm::MCInst> Instructions,
llvm::raw_pwrite_stream &AsmStream) { llvm::raw_pwrite_stream &AsmStream) {
std::unique_ptr<llvm::LLVMContext> Context = std::unique_ptr<llvm::LLVMContext> Context =
std::make_unique<llvm::LLVMContext>(); std::make_unique<llvm::LLVMContext>();
std::unique_ptr<llvm::Module> Module = std::unique_ptr<llvm::Module> Module =
createModule(Context, TM->createDataLayout()); createModule(Context, TM->createDataLayout());
std::unique_ptr<llvm::MachineModuleInfo> MMI = std::unique_ptr<llvm::MachineModuleInfoWrapperPass> MMIWP =
std::make_unique<llvm::MachineModuleInfo>(TM.get()); std::make_unique<llvm::MachineModuleInfoWrapperPass>(TM.get());
llvm::MachineFunction &MF = llvm::MachineFunction &MF = createVoidVoidPtrMachineFunction(
createVoidVoidPtrMachineFunction(FunctionID, Module.get(), MMI.get()); FunctionID, Module.get(), &MMIWP.get()->getMMI());
// We need to instruct the passes that we're done with SSA and virtual // We need to instruct the passes that we're done with SSA and virtual
// registers. // registers.
auto &Properties = MF.getProperties(); auto &Properties = MF.getProperties();
Properties.set(llvm::MachineFunctionProperties::Property::NoVRegs); Properties.set(llvm::MachineFunctionProperties::Property::NoVRegs);
Properties.reset(llvm::MachineFunctionProperties::Property::IsSSA); Properties.reset(llvm::MachineFunctionProperties::Property::IsSSA);
for (const unsigned Reg : LiveIns) for (const unsigned Reg : LiveIns)
Show All 14 Linesvoid assembleToStream(const ExegesisTarget &ET,
// prologue/epilogue pass needs the reserved registers to be frozen, this // prologue/epilogue pass needs the reserved registers to be frozen, this
// is usually done by the SelectionDAGISel pass. // is usually done by the SelectionDAGISel pass.
MF.getRegInfo().freezeReservedRegs(MF); MF.getRegInfo().freezeReservedRegs(MF);
// Fill the MachineFunction from the instructions. // Fill the MachineFunction from the instructions.
fillMachineFunction(MF, LiveIns, Code); fillMachineFunction(MF, LiveIns, Code);
// We create the pass manager, run the passes to populate AsmBuffer. // We create the pass manager, run the passes to populate AsmBuffer.
llvm::MCContext &MCContext = MMI->getContext(); llvm::MCContext &MCContext = MMIWP->getMMI().getContext();
llvm::legacy::PassManager PM; llvm::legacy::PassManager PM;
llvm::TargetLibraryInfoImpl TLII(llvm::Triple(Module->getTargetTriple())); llvm::TargetLibraryInfoImpl TLII(llvm::Triple(Module->getTargetTriple()));
PM.add(new llvm::TargetLibraryInfoWrapperPass(TLII)); PM.add(new llvm::TargetLibraryInfoWrapperPass(TLII));
llvm::TargetPassConfig *TPC = TM->createPassConfig(PM); llvm::TargetPassConfig *TPC = TM->createPassConfig(PM);
PM.add(TPC); PM.add(TPC);
PM.add(MMI.release()); PM.add(MMIWP.release());
TPC->printAndVerify("MachineFunctionGenerator::assemble"); TPC->printAndVerify("MachineFunctionGenerator::assemble");
// Add target-specific passes. // Add target-specific passes.
ET.addTargetSpecificPasses(PM); ET.addTargetSpecificPasses(PM);
TPC->printAndVerify("After ExegesisTarget::addTargetSpecificPasses"); TPC->printAndVerify("After ExegesisTarget::addTargetSpecificPasses");
// Adding the following passes: // Adding the following passes:
// - machineverifier: checks that the MachineFunction is well formed. // - machineverifier: checks that the MachineFunction is well formed.
// - prologepilog: saves and restore callee saved registers. // - prologepilog: saves and restore callee saved registers.
for (const char *PassName : {"machineverifier", "prologepilog"}) for (const char *PassName : {"machineverifier", "prologepilog"})
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