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# test/CodeGen/X86/lrshrink.ll

1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | ||
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2 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s | 2 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s | ||

3 | 3 | | |||

4 | ; Checks if "%7 = add nuw nsw i64 %4, %2" is moved before the last call | 4 | ; Checks if "%7 = add nuw nsw i64 %4, %2" is moved before the last call | ||

5 | ; to minimize live-range. | 5 | ; to minimize live-range. | ||

6 | 6 | | |||

7 | define i64 @test(i1 %a, i64 %r1, i64 %r2, i64 %s1, i64 %s2, i64 %t1, i64 %t2) { | 7 | define i64 @test(i1 %a, i64 %r1, i64 %r2, i64 %s1, i64 %s2, i64 %t1, i64 %t2) { | ||

8 | ; CHECK-LABEL: test: | ||||

9 | ; CHECK: # %bb.0: # %entry | ||||

10 | ; CHECK-NEXT: pushq %r15 | ||||

11 | ; CHECK-NEXT: .cfi_def_cfa_offset 16 | ||||

12 | ; CHECK-NEXT: pushq %r14 | ||||

13 | ; CHECK-NEXT: .cfi_def_cfa_offset 24 | ||||

14 | ; CHECK-NEXT: pushq %r12 | ||||

15 | ; CHECK-NEXT: .cfi_def_cfa_offset 32 | ||||

16 | ; CHECK-NEXT: pushq %rbx | ||||

17 | ; CHECK-NEXT: .cfi_def_cfa_offset 40 | ||||

18 | ; CHECK-NEXT: pushq %rax | ||||

19 | ; CHECK-NEXT: .cfi_def_cfa_offset 48 | ||||

20 | ; CHECK-NEXT: .cfi_offset %rbx, -40 | ||||

21 | ; CHECK-NEXT: .cfi_offset %r12, -32 | ||||

22 | ; CHECK-NEXT: .cfi_offset %r14, -24 | ||||

23 | ; CHECK-NEXT: .cfi_offset %r15, -16 | ||||

24 | ; CHECK-NEXT: movq %rcx, %r12 | ||||

25 | ; CHECK-NEXT: movq %rsi, %r14 | ||||

26 | ; CHECK-NEXT: movl $4, %r15d | ||||

27 | ; CHECK-NEXT: testb $1, %dil | ||||

28 | ; CHECK-NEXT: je .LBB0_2 | ||||

29 | ; CHECK-NEXT: # %bb.1: # %then | ||||

30 | ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %r9 | ||||

31 | ; CHECK-NEXT: movl $10, %r15d | ||||

32 | ; CHECK-NEXT: movq %rdx, %r14 | ||||

33 | ; CHECK-NEXT: movq %r8, %r12 | ||||

34 | ; CHECK-NEXT: .LBB0_2: # %else | ||||

35 | ; CHECK-NEXT: addq %r9, %r12 | ||||

36 | ; CHECK-NEXT: callq _Z3foov | ||||

37 | ; CHECK-NEXT: movl %eax, %ebx | ||||

38 | ; CHECK-NEXT: addq %r14, %rbx | ||||

39 | ; CHECK-NEXT: callq _Z3foov | ||||

40 | ; CHECK-NEXT: movl %eax, %r14d | ||||

41 | ; CHECK-NEXT: addq %rbx, %r14 | ||||

42 | ; CHECK-NEXT: callq _Z3foov | ||||

43 | ; CHECK-NEXT: movl %eax, %eax | ||||

44 | ; CHECK-NEXT: addq %r14, %rax | ||||

45 | ; CHECK-NEXT: addq %r12, %rax | ||||

46 | ; CHECK-NEXT: addq %r15, %rax | ||||

47 | ; CHECK-NEXT: addq $8, %rsp | ||||

48 | ; CHECK-NEXT: .cfi_def_cfa_offset 40 | ||||

49 | ; CHECK-NEXT: popq %rbx | ||||

50 | ; CHECK-NEXT: .cfi_def_cfa_offset 32 | ||||

51 | ; CHECK-NEXT: popq %r12 | ||||

52 | ; CHECK-NEXT: .cfi_def_cfa_offset 24 | ||||

53 | ; CHECK-NEXT: popq %r14 | ||||

54 | ; CHECK-NEXT: .cfi_def_cfa_offset 16 | ||||

55 | ; CHECK-NEXT: popq %r15 | ||||

56 | ; CHECK-NEXT: .cfi_def_cfa_offset 8 | ||||

57 | ; CHECK-NEXT: retq | ||||

8 | entry: | 58 | entry: | ||

9 | br i1 %a, label %then, label %else | 59 | br i1 %a, label %then, label %else | ||

10 | 60 | | |||

11 | then: | 61 | then: | ||

12 | br label %else | 62 | br label %else | ||

13 | 63 | | |||

14 | else: | 64 | else: | ||

15 | %0 = phi i64 [ 4, %entry ], [ 10, %then ] | 65 | %0 = phi i64 [ 4, %entry ], [ 10, %then ] | ||

16 | %r = phi i64 [ %r1, %entry ], [ %r2, %then ] | 66 | %r = phi i64 [ %r1, %entry ], [ %r2, %then ] | ||

17 | %s = phi i64 [ %s1, %entry ], [ %s2, %then ] | 67 | %s = phi i64 [ %s1, %entry ], [ %s2, %then ] | ||

18 | %t = phi i64 [ %t1, %entry ], [ %t2, %then ] | 68 | %t = phi i64 [ %t1, %entry ], [ %t2, %then ] | ||

19 | ; CHECK-LABEL: test: | | |||

20 | ; CHECK: add | | |||

21 | ; CHECK: add | | |||

22 | ; CHECK: call | | |||

23 | ; CHECK: add | | |||

24 | ; CHECK: call | | |||

25 | ; CHECK: add | | |||

26 | ; CHECK: call | | |||

27 | ; CHECK: add | | |||

28 | %1 = tail call i32 @_Z3foov() | 69 | %1 = tail call i32 @_Z3foov() | ||

29 | %2 = zext i32 %1 to i64 | 70 | %2 = zext i32 %1 to i64 | ||

30 | %3 = tail call i32 @_Z3foov() | 71 | %3 = tail call i32 @_Z3foov() | ||

31 | %4 = zext i32 %3 to i64 | 72 | %4 = zext i32 %3 to i64 | ||

32 | %5 = tail call i32 @_Z3foov() | 73 | %5 = tail call i32 @_Z3foov() | ||

33 | %6 = zext i32 %5 to i64 | 74 | %6 = zext i32 %5 to i64 | ||

34 | %7 = add nuw nsw i64 %0, %r | 75 | %7 = add nuw nsw i64 %0, %r | ||

35 | tail call void @llvm.dbg.value(metadata i64 %7, i64 0, metadata !5, metadata !DIExpression()), !dbg !6 | 76 | tail call void @llvm.dbg.value(metadata i64 %7, i64 0, metadata !5, metadata !DIExpression()), !dbg !6 | ||

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