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Differential D61494 Diff 206420 llvm/trunk/test/CodeGen/MIR/AMDGPU/machine-function-info.ll

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llvm/trunk/test/CodeGen/MIR/AMDGPU/machine-function-info.ll

1; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -stop-after finalize-isel -o %t.mir %s 1​; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -stop-after finalize-isel -o %t.mir %s
2; RUN: llc -run-pass=none -verify-machineinstrs %t.mir -o - | FileCheck %s 2​; RUN: llc -run-pass=none -verify-machineinstrs %t.mir -o - | FileCheck %s
3 3​
4; Test that SIMachineFunctionInfo can be round trip serialized through 4​; Test that SIMachineFunctionInfo can be round trip serialized through
5; MIR. 5​; MIR.
6 6​
7@lds = addrspace(3) global [512 x float] undef, align 4 7​@lds = addrspace(3) global [512 x float] undef, align 4
8 8​
9; CHECK-LABEL: {{^}}name: kernel 9​; CHECK-LABEL: {{^}}name: kernel
10; CHECK: machineFunctionInfo: 10​; CHECK: machineFunctionInfo:
11; CHECK-NEXT: explicitKernArgSize: 128 11​; CHECK-NEXT: explicitKernArgSize: 128
12; CHECK-NEXT: maxKernArgAlign: 64 12​; CHECK-NEXT: maxKernArgAlign: 64
13; CHECK-NEXT: ldsSize: 2048 13​; CHECK-NEXT: ldsSize: 0
14; CHECK-NEXT: isEntryFunction: true 14​; CHECK-NEXT: isEntryFunction: true
15; CHECK-NEXT: noSignedZerosFPMath: false 15​; CHECK-NEXT: noSignedZerosFPMath: false
16; CHECK-NEXT: memoryBound: false 16​; CHECK-NEXT: memoryBound: false
17; CHECK-NEXT: waveLimiter: false 17​; CHECK-NEXT: waveLimiter: false
18; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' 18​; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
19; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr101' 19​; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr101'
20; CHECK-NEXT: frameOffsetReg: '$sgpr101' 20​; CHECK-NEXT: frameOffsetReg: '$sgpr101'
21; CHECK-NEXT: stackPtrOffsetReg: '$sgpr101' 21​; CHECK-NEXT: stackPtrOffsetReg: '$sgpr101'
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