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Differential D62680 Diff 206235 llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h

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llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h

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25/// ARM_AM - ARM Addressing Mode Stuff 25​/// ARM_AM - ARM Addressing Mode Stuff
26namespace ARM_AM { 26​namespace ARM_AM {
27 enum ShiftOpc { 27​ enum ShiftOpc {
28 no_shift = 0, 28​ no_shift = 0,
29 asr, 29​ asr,
30 lsl, 30​ lsl,
31 lsr, 31​ lsr,
32 ror, 32​ ror,
33 rrx 33​ rrx,
34​ uxtw
34 }; 35​ };
35 36​
36 enum AddrOpc { 37​ enum AddrOpc {
37 sub = 0, 38​ sub = 0,
38 add 39​ add
39 }; 40​ };
40 41​
41 inline const char *getAddrOpcStr(AddrOpc Op) { return Op == sub ? "-" : ""; } 42​ inline const char *getAddrOpcStr(AddrOpc Op) { return Op == sub ? "-" : ""; }
42 43​
43 inline const char *getShiftOpcStr(ShiftOpc Op) { 44​ inline const char *getShiftOpcStr(ShiftOpc Op) {
44 switch (Op) { 45​ switch (Op) {
45 default: llvm_unreachable("Unknown shift opc!"); 46​ default: llvm_unreachable("Unknown shift opc!");
46 case ARM_AM::asr: return "asr"; 47​ case ARM_AM::asr: return "asr";
47 case ARM_AM::lsl: return "lsl"; 48​ case ARM_AM::lsl: return "lsl";
48 case ARM_AM::lsr: return "lsr"; 49​ case ARM_AM::lsr: return "lsr";
49 case ARM_AM::ror: return "ror"; 50​ case ARM_AM::ror: return "ror";
50 case ARM_AM::rrx: return "rrx"; 51​ case ARM_AM::rrx: return "rrx";
52​ case ARM_AM::uxtw: return "uxtw";
51 } 53​ }
52 } 54​ }
53 55​
54 inline unsigned getShiftOpcEncoding(ShiftOpc Op) { 56​ inline unsigned getShiftOpcEncoding(ShiftOpc Op) {
55 switch (Op) { 57​ switch (Op) {
56 default: llvm_unreachable("Unknown shift opc!"); 58​ default: llvm_unreachable("Unknown shift opc!");
57 case ARM_AM::asr: return 2; 59​ case ARM_AM::asr: return 2;
58 case ARM_AM::lsl: return 0; 60​ case ARM_AM::lsl: return 0;
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