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test/CodeGen/X86/urem-seteq.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X86 ; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64
lebedev.riUnsubmitted
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Actually, looking at the check-lines, i'm not sure we want to check the bmi2 version.
I'm not seeing anything there that would benefit from anything above baseline, i think.

lebedev.ri: Actually, looking at the check-lines, i'm not sure we want to check the bmi2 version. I'm not…
lebedev.riUnsubmitted
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I've meant to drop this check-line, but apparently forgot.
I'm not 100% sure if we want/don't want it.

lebedev.ri: I've meant to drop this check-line, but apparently forgot. I'm not 100% sure if we want/don't…
hermordUnsubmitted
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Should I drop it? On a related note, I could add AVX2 to the vector tests on X86 if that's likely to be useful.

hermord: Should I drop it? On a related note, I could add `AVX2` to the vector tests on `X86` if that's…
lebedev.riUnsubmitted
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Right, good idea.
I checked all the various sse/avx versions, and kept the unique ones that make a difference here.

lebedev.ri: Right, good idea. I checked all the various sse/avx versions, and kept the unique ones that…
; This tests the BuildREMEqFold optimization with UREM, i32, odd divisor, SETEQ. ; This tests the BuildREMEqFold optimization with UREM, i32, odd divisor, SETEQ.
; The corresponding pseudocode is: ; The corresponding pseudocode is:
; Q <- [N * multInv(5, 2^32)] <=> [N * 0xCCCCCCCD] <=> [N * (-858993459)] ; Q <- [N * multInv(5, 2^32)] <=> [N * 0xCCCCCCCD] <=> [N * (-858993459)]
; res <- [Q <= (2^32 - 1) / 5] <=> [Q <= 858993459] <=> [Q < 858993460] ; res <- [Q <= (2^32 - 1) / 5] <=> [Q <= 858993459] <=> [Q < 858993460]
define i32 @test_urem_odd(i32 %X) nounwind readnone { define i32 @test_urem_odd(i32 %X) nounwind readnone {
; X86-LABEL: test_urem_odd: ; X86-LABEL: test_urem_odd:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
; X86-NEXT: movl $-858993459, %edx # imm = 0xCCCCCCCD
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: shrl $2, %edx
; X86-NEXT: leal (%edx,%edx,4), %edx
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl %edx, %ecx ; X86-NEXT: cmpl $858993460, %ecx # imm = 0x33333334
; X86-NEXT: sete %al ; X86-NEXT: setb %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_odd: ; X64-LABEL: test_urem_odd:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax ; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: movl $3435973837, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: imulq %rax, %rcx
; X64-NEXT: shrq $34, %rcx
; X64-NEXT: leal (%rcx,%rcx,4), %ecx
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl %ecx, %edi ; X64-NEXT: cmpl $858993460, %ecx # imm = 0x33333334
; X64-NEXT: sete %al ; X64-NEXT: setb %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i32 %X, 5 %urem = urem i32 %X, 5
%cmp = icmp eq i32 %urem, 0 %cmp = icmp eq i32 %urem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
; This is like test_urem_odd, except the divisor has bit 30 set. ; This is like test_urem_odd, except the divisor has bit 30 set.
define i32 @test_urem_odd_bit30(i32 %X) nounwind readnone { define i32 @test_urem_odd_bit30(i32 %X) nounwind readnone {
; X86-LABEL: test_urem_odd_bit30: ; X86-LABEL: test_urem_odd_bit30:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: imull $1789569707, {{[0-9]+}}(%esp), %ecx # imm = 0x6AAAAAAB
; X86-NEXT: movl $-11, %edx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: shrl $30, %edx
; X86-NEXT: imull $1073741827, %edx, %edx # imm = 0x40000003
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl %edx, %ecx ; X86-NEXT: cmpl $4, %ecx
; X86-NEXT: sete %al ; X86-NEXT: setb %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_odd_bit30: ; X64-LABEL: test_urem_odd_bit30:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax ; X64-NEXT: imull $1789569707, %edi, %ecx # imm = 0x6AAAAAAB
; X64-NEXT: movl $4294967285, %ecx # imm = 0xFFFFFFF5
; X64-NEXT: imulq %rax, %rcx
; X64-NEXT: shrq $62, %rcx
; X64-NEXT: imull $1073741827, %ecx, %ecx # imm = 0x40000003
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl %ecx, %edi ; X64-NEXT: cmpl $4, %ecx
; X64-NEXT: sete %al ; X64-NEXT: setb %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i32 %X, 1073741827 %urem = urem i32 %X, 1073741827
%cmp = icmp eq i32 %urem, 0 %cmp = icmp eq i32 %urem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
; This is like test_urem_odd, except the divisor has bit 31 set. ; This is like test_urem_odd, except the divisor has bit 31 set.
define i32 @test_urem_odd_bit31(i32 %X) nounwind readnone { define i32 @test_urem_odd_bit31(i32 %X) nounwind readnone {
; X86-LABEL: test_urem_odd_bit31: ; X86-LABEL: test_urem_odd_bit31:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: imull $715827883, {{[0-9]+}}(%esp), %ecx # imm = 0x2AAAAAAB
; X86-NEXT: movl $1073741823, %edx # imm = 0x3FFFFFFF
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: shrl $29, %edx
; X86-NEXT: imull $-2147483645, %edx, %edx # imm = 0x80000003
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl %edx, %ecx ; X86-NEXT: cmpl $2, %ecx
; X86-NEXT: sete %al ; X86-NEXT: setb %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_odd_bit31: ; X64-LABEL: test_urem_odd_bit31:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax ; X64-NEXT: imull $715827883, %edi, %ecx # imm = 0x2AAAAAAB
; X64-NEXT: movq %rax, %rcx
; X64-NEXT: shlq $30, %rcx
; X64-NEXT: subq %rax, %rcx
; X64-NEXT: shrq $61, %rcx
; X64-NEXT: imull $-2147483645, %ecx, %ecx # imm = 0x80000003
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl %ecx, %edi ; X64-NEXT: cmpl $2, %ecx
; X64-NEXT: sete %al ; X64-NEXT: setb %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i32 %X, 2147483651 %urem = urem i32 %X, 2147483651
%cmp = icmp eq i32 %urem, 0 %cmp = icmp eq i32 %urem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
; This tests the BuildREMEqFold optimization with UREM, i16, even divisor, SETNE. ; This tests the BuildREMEqFold optimization with UREM, i16, even divisor, SETNE.
; In this case, D <=> 14 <=> 7 * 2^1, so D0 = 7 and K = 1. ; In this case, D <=> 14 <=> 7 * 2^1, so D0 = 7 and K = 1.
; The corresponding pseudocode is: ; The corresponding pseudocode is:
; Q <- [N * multInv(D0, 2^16)] <=> [N * multInv(7, 2^16)] <=> [N * 28087] ; Q <- [N * multInv(D0, 2^16)] <=> [N * multInv(7, 2^16)] <=> [N * 28087]
; Q <- [Q >>rot K] <=> [Q >>rot 1] ; Q <- [Q >>rot K] <=> [Q >>rot 1]
; res <- ![Q <= (2^16 - 1) / 7] <=> ![Q <= 9362] <=> [Q > 9362] ; res <- ![Q <= (2^16 - 1) / 7] <=> ![Q <= 9362] <=> [Q > 9362]
define i16 @test_urem_even(i16 %X) nounwind readnone { define i16 @test_urem_even(i16 %X) nounwind readnone {
; X86-LABEL: test_urem_even: ; X86-LABEL: test_urem_even:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: imull $28087, {{[0-9]+}}(%esp), %eax # imm = 0x6DB7
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: rorw %ax
; X86-NEXT: shrl %eax ; X86-NEXT: movzwl %ax, %ecx
; X86-NEXT: imull $18725, %eax, %eax # imm = 0x4925
; X86-NEXT: shrl $17, %eax
; X86-NEXT: movl %eax, %edx
; X86-NEXT: shll $4, %edx
; X86-NEXT: subl %eax, %edx
; X86-NEXT: subl %eax, %edx
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpw %dx, %cx ; X86-NEXT: cmpl $9362, %ecx # imm = 0x2492
; X86-NEXT: setne %al ; X86-NEXT: seta %al
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_even: ; X64-LABEL: test_urem_even:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movzwl %di, %ecx ; X64-NEXT: imull $28087, %edi, %eax # imm = 0x6DB7
; X64-NEXT: movl %ecx, %eax ; X64-NEXT: rorw %ax
; X64-NEXT: shrl %eax ; X64-NEXT: movzwl %ax, %ecx
; X64-NEXT: imull $18725, %eax, %eax # imm = 0x4925
; X64-NEXT: shrl $17, %eax
; X64-NEXT: movl %eax, %edx
; X64-NEXT: shll $4, %edx
; X64-NEXT: subl %eax, %edx
; X64-NEXT: subl %eax, %edx
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpw %dx, %cx ; X64-NEXT: cmpl $9362, %ecx # imm = 0x2492
; X64-NEXT: setne %al ; X64-NEXT: seta %al
; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i16 %X, 14 %urem = urem i16 %X, 14
%cmp = icmp ne i16 %urem, 0 %cmp = icmp ne i16 %urem, 0
%ret = zext i1 %cmp to i16 %ret = zext i1 %cmp to i16
ret i16 %ret ret i16 %ret
} }
; This is like test_urem_even, except the divisor has bit 30 set. ; This is like test_urem_even, except the divisor has bit 30 set.
define i32 @test_urem_even_bit30(i32 %X) nounwind readnone { define i32 @test_urem_even_bit30(i32 %X) nounwind readnone {
; X86-LABEL: test_urem_even_bit30: ; X86-LABEL: test_urem_even_bit30:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: imull $-51622203, {{[0-9]+}}(%esp), %ecx # imm = 0xFCEC4EC5
; X86-NEXT: movl $-415, %edx # imm = 0xFE61 ; X86-NEXT: rorl $3, %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: shrl $30, %edx
; X86-NEXT: imull $1073741928, %edx, %edx # imm = 0x40000068
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl %edx, %ecx ; X86-NEXT: cmpl $32, %ecx
; X86-NEXT: sete %al ; X86-NEXT: setb %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_even_bit30: ; X64-LABEL: test_urem_even_bit30:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax ; X64-NEXT: imull $-51622203, %edi, %ecx # imm = 0xFCEC4EC5
; X64-NEXT: movl $4294966881, %ecx # imm = 0xFFFFFE61 ; X64-NEXT: rorl $3, %ecx
; X64-NEXT: imulq %rax, %rcx
; X64-NEXT: shrq $62, %rcx
; X64-NEXT: imull $1073741928, %ecx, %ecx # imm = 0x40000068
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl %ecx, %edi ; X64-NEXT: cmpl $32, %ecx
; X64-NEXT: sete %al ; X64-NEXT: setb %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i32 %X, 1073741928 %urem = urem i32 %X, 1073741928
%cmp = icmp eq i32 %urem, 0 %cmp = icmp eq i32 %urem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
; This is like test_urem_odd, except the divisor has bit 31 set. ; This is like test_urem_odd, except the divisor has bit 31 set.
define i32 @test_urem_even_bit31(i32 %X) nounwind readnone { define i32 @test_urem_even_bit31(i32 %X) nounwind readnone {
; X86-LABEL: test_urem_even_bit31: ; X86-LABEL: test_urem_even_bit31:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: imull $-1157956869, {{[0-9]+}}(%esp), %ecx # imm = 0xBAFAFAFB
; X86-NEXT: movl $2147483547, %edx # imm = 0x7FFFFF9B ; X86-NEXT: rorl %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: shrl $30, %edx
; X86-NEXT: imull $-2147483546, %edx, %edx # imm = 0x80000066
; X86-NEXT: xorl %eax, %eax ; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl %edx, %ecx ; X86-NEXT: cmpl $4, %ecx
; X86-NEXT: sete %al ; X86-NEXT: setb %al
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_urem_even_bit31: ; X64-LABEL: test_urem_even_bit31:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax ; X64-NEXT: imull $-1157956869, %edi, %ecx # imm = 0xBAFAFAFB
; X64-NEXT: imulq $2147483547, %rax, %rax # imm = 0x7FFFFF9B ; X64-NEXT: rorl %ecx
; X64-NEXT: shrq $62, %rax
; X64-NEXT: imull $-2147483546, %eax, %ecx # imm = 0x80000066
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl %ecx, %edi ; X64-NEXT: cmpl $4, %ecx
; X64-NEXT: sete %al ; X64-NEXT: setb %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i32 %X, 2147483750 %urem = urem i32 %X, 2147483750
%cmp = icmp eq i32 %urem, 0 %cmp = icmp eq i32 %urem, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
; We should not proceed with this fold if the divisor is 1 or -1 ; We should not proceed with this fold if the divisor is 1 or -1
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