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Differential D62774 Diff 202903 llvm/trunk/test/CodeGen/AArch64/shift-amount-mod.ll

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llvm/trunk/test/CodeGen/AArch64/shift-amount-mod.ll

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;||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||; ;||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||;
;==============================================================================; ;==============================================================================;
; subtraction from negated shift amount ; subtraction from negated shift amount
define i32 @reg32_lshr_by_sub_from_negated(i32 %val, i32 %a, i32 %b) nounwind { define i32 @reg32_lshr_by_sub_from_negated(i32 %val, i32 %a, i32 %b) nounwind {
; CHECK-LABEL: reg32_lshr_by_sub_from_negated: ; CHECK-LABEL: reg32_lshr_by_sub_from_negated:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #32 ; CHECK-NEXT: add w8, w1, w2
; CHECK-NEXT: sub w8, w8, w1 ; CHECK-NEXT: neg w8, w8
; CHECK-NEXT: sub w8, w8, w2
; CHECK-NEXT: lsr w0, w0, w8 ; CHECK-NEXT: lsr w0, w0, w8
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%nega = sub i32 32, %a %nega = sub i32 32, %a
%negasubb = sub i32 %nega, %b %negasubb = sub i32 %nega, %b
%shifted = lshr i32 %val, %negasubb %shifted = lshr i32 %val, %negasubb
ret i32 %shifted ret i32 %shifted
} }
define i64 @reg64_lshr_by_sub_from_negated(i64 %val, i64 %a, i64 %b) nounwind { define i64 @reg64_lshr_by_sub_from_negated(i64 %val, i64 %a, i64 %b) nounwind {
; CHECK-LABEL: reg64_lshr_by_sub_from_negated: ; CHECK-LABEL: reg64_lshr_by_sub_from_negated:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #64 ; CHECK-NEXT: add x8, x1, x2
; CHECK-NEXT: sub x8, x8, x1 ; CHECK-NEXT: neg x8, x8
; CHECK-NEXT: sub x8, x8, x2
; CHECK-NEXT: lsr x0, x0, x8 ; CHECK-NEXT: lsr x0, x0, x8
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%nega = sub i64 64, %a %nega = sub i64 64, %a
%negasubb = sub i64 %nega, %b %negasubb = sub i64 %nega, %b
%shifted = lshr i64 %val, %negasubb %shifted = lshr i64 %val, %negasubb
ret i64 %shifted ret i64 %shifted
} }
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%negaaddbitwidth = add i64 %negshamt, 64 %negaaddbitwidth = add i64 %negshamt, 64
%shifted = lshr i64 %val, %negaaddbitwidth %shifted = lshr i64 %val, %negaaddbitwidth
ret i64 %shifted ret i64 %shifted
} }
define i32 @reg32_lshr_by_negated_unfolded_sub_b(i32 %val, i32 %a, i32 %b) nounwind { define i32 @reg32_lshr_by_negated_unfolded_sub_b(i32 %val, i32 %a, i32 %b) nounwind {
; CHECK-LABEL: reg32_lshr_by_negated_unfolded_sub_b: ; CHECK-LABEL: reg32_lshr_by_negated_unfolded_sub_b:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w1 ; CHECK-NEXT: add w8, w1, w2
; CHECK-NEXT: sub w8, w8, w2 ; CHECK-NEXT: neg w8, w8
; CHECK-NEXT: lsr w0, w0, w8 ; CHECK-NEXT: lsr w0, w0, w8
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%nega = sub i32 0, %a %nega = sub i32 0, %a
%negaaddbitwidth = add i32 %nega, 32 %negaaddbitwidth = add i32 %nega, 32
%negaaddbitwidthsubb = sub i32 %negaaddbitwidth, %b %negaaddbitwidthsubb = sub i32 %negaaddbitwidth, %b
%shifted = lshr i32 %val, %negaaddbitwidthsubb %shifted = lshr i32 %val, %negaaddbitwidthsubb
ret i32 %shifted ret i32 %shifted
} }
define i64 @reg64_lshr_by_negated_unfolded_sub_b(i64 %val, i64 %a, i64 %b) nounwind { define i64 @reg64_lshr_by_negated_unfolded_sub_b(i64 %val, i64 %a, i64 %b) nounwind {
; CHECK-LABEL: reg64_lshr_by_negated_unfolded_sub_b: ; CHECK-LABEL: reg64_lshr_by_negated_unfolded_sub_b:
; CHECK: // %bb.0: ; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x1 ; CHECK-NEXT: add x8, x1, x2
; CHECK-NEXT: sub x8, x8, x2 ; CHECK-NEXT: neg x8, x8
; CHECK-NEXT: lsr x0, x0, x8 ; CHECK-NEXT: lsr x0, x0, x8
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%nega = sub i64 0, %a %nega = sub i64 0, %a
%negaaddbitwidth = add i64 %nega, 64 %negaaddbitwidth = add i64 %nega, 64
%negaaddbitwidthsubb = sub i64 %negaaddbitwidth, %b %negaaddbitwidthsubb = sub i64 %negaaddbitwidth, %b
%shifted = lshr i64 %val, %negaaddbitwidthsubb %shifted = lshr i64 %val, %negaaddbitwidthsubb
ret i64 %shifted ret i64 %shifted
} }
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