Differential D62847 Diff 202879 llvm/test/CodeGen/PowerPC/unal-altivec.ll

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Show All 23 Lines	vector.body: ; preds = %vector.body, %vector.ph
%8 = getelementptr float, float* %a, i64 %.sum12		%8 = getelementptr float, float* %a, i64 %.sum12
%9 = bitcast float* %8 to <4 x float>*		%9 = bitcast float* %8 to <4 x float>*
store <4 x float> %5, <4 x float>* %9, align 4		store <4 x float> %5, <4 x float>* %9, align 4
%index.next = add i64 %index, 8		%index.next = add i64 %index, 8
%10 = icmp eq i64 %index.next, 16000		%10 = icmp eq i64 %index.next, 16000
br i1 %10, label %for.end, label %vector.body		br i1 %10, label %for.end, label %vector.body

; CHECK: @foo		; CHECK: @foo
; CHECK-DAG: li [[C0:[0-9]+]], 0		; CHECK-DAG: li [[C16:[0-9]+]], 16
; CHECK-DAG: lvx [[CNST:[0-9]+]],		; CHECK-DAG: lvx [[CNST:[0-9]+]],
; CHECK: .LBB0_1:		; CHECK: .LBB0_1:
; CHECK-DAG: lvsl [[MASK1:[0-9]+]], [[B1:[0-9]+]], [[C0]]		; CHECK-DAG: lvx [[LD1:[0-9]+]], 0, [[C0:[0-9]+]]
; CHECK-DAG: add [[B3:[0-9]+]], [[B1]], [[C0]]		; CHECK-DAG: lvx [[LD2:[0-9]+]], [[C0]], [[C16]]
; CHECK-DAG: lvx [[LD1:[0-9]+]], [[B1]], [[C0]]		; CHECK-DAG: lvsl [[MASK1:[0-9]+]], 0, [[C0]]
; CHECK-DAG: lvx [[LD2:[0-9]+]], [[B3]],		; CHECK-DAG: vperm [[VR1:[0-9]+]], [[LD1]], [[LD2]], [[MASK1]]
; CHECK-DAG: vperm [[R1:[0-9]+]], [[LD1]], [[LD2]], [[MASK1]]		; CHECK-DAG: vaddfp {{[0-9]+}}, [[VR1]], [[CNST]]
; CHECK-DAG: vaddfp {{[0-9]+}}, [[R1]], [[CNST]]
; CHECK: blr		; CHECK: blr

for.end: ; preds = %vector.body		for.end: ; preds = %vector.body
ret void		ret void
}		}

attributes #0 = { nounwind }		attributes #0 = { nounwind }