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Differential D62847 Diff 202879 llvm/test/CodeGen/PowerPC/lsr-ctrloop.ll

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llvm/test/CodeGen/PowerPC/lsr-ctrloop.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=pwr9 -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s ; RUN: llc -mcpu=pwr9 -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
; void foo(float *data, float d) { ; void foo(float *data, float d) {
; long i; ; long i;
; for (i = 0; i < 8000; i++) ; for (i = 0; i < 8000; i++)
; data[i] = d; ; data[i] = d;
; } ; }
; ;
; This loop will be unrolled by 96 and vectorized on power9. ; This loop will be unrolled by 96 and vectorized on power9.
; icmp for loop iteration index and loop trip count(384) has LSRUse for 'reg({0,+,384})'. ; icmp for loop iteration index and loop trip count(384) has LSRUse for 'reg({0,+,384})'.
; Make sure above icmp does not impact LSR choose best formulae sets based on 'reg({(192 + %0),+,384})' ; Make sure above icmp does not impact LSR choose best formulae sets based on 'reg({(192 + %0),+,384})'
define void @foo(float* nocapture %data, float %d) { define void @foo(float* nocapture %data, float %d) {
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: .LBB0_1: # %vector.body ; CHECK: .LBB0_1: # %vector.body
; CHECK: add 5, 3, 4 ; CHECK: stxv 0, -192(4)
; CHECK-NEXT: stxvx 0, 3, 4 ; CHECK-NEXT: stxv 0, -176(4)
; CHECK-NEXT: stxv 0, -160(4)
; CHECK-NEXT: stxv 0, -144(4)
; CHECK-NEXT: stxv 0, -128(4)
; CHECK-NEXT: stxv 0, -112(4)
; CHECK-NEXT: stxv 0, -96(4)
; CHECK-NEXT: stxv 0, -80(4)
; CHECK-NEXT: stxv 0, -64(4)
; CHECK-NEXT: stxv 0, -48(4)
; CHECK-NEXT: stxv 0, -32(4)
; CHECK-NEXT: stxv 0, -16(4)
; CHECK-NEXT: stxv 0, 0(4)
; CHECK-NEXT: stxv 0, 16(4)
; CHECK-NEXT: stxv 0, 32(4)
; CHECK-NEXT: stxv 0, 48(4)
; CHECK-NEXT: stxv 0, 64(4)
; CHECK-NEXT: stxv 0, 80(4)
; CHECK-NEXT: stxv 0, 96(4)
; CHECK-NEXT: stxv 0, 112(4)
; CHECK-NEXT: stxv 0, 128(4)
; CHECK-NEXT: stxv 0, 144(4)
; CHECK-NEXT: stxv 0, 160(4)
; CHECK-NEXT: stxv 0, 176(4)
; CHECK-NEXT: addi 4, 4, 384 ; CHECK-NEXT: addi 4, 4, 384
; CHECK-NEXT: stxv 0, 16(5)
; CHECK-NEXT: stxv 0, 32(5)
; CHECK-NEXT: stxv 0, 48(5)
; CHECK-NEXT: stxv 0, 64(5)
; CHECK-NEXT: stxv 0, 80(5)
; CHECK-NEXT: stxv 0, 96(5)
; CHECK-NEXT: stxv 0, 112(5)
; CHECK-NEXT: stxv 0, 128(5)
; CHECK-NEXT: stxv 0, 144(5)
; CHECK-NEXT: stxv 0, 160(5)
; CHECK-NEXT: stxv 0, 176(5)
; CHECK-NEXT: stxv 0, 192(5)
; CHECK-NEXT: stxv 0, 208(5)
; CHECK-NEXT: stxv 0, 224(5)
; CHECK-NEXT: stxv 0, 240(5)
; CHECK-NEXT: stxv 0, 256(5)
; CHECK-NEXT: stxv 0, 272(5)
; CHECK-NEXT: stxv 0, 288(5)
; CHECK-NEXT: stxv 0, 304(5)
; CHECK-NEXT: stxv 0, 320(5)
; CHECK-NEXT: stxv 0, 336(5)
; CHECK-NEXT: stxv 0, 352(5)
; CHECK-NEXT: stxv 0, 368(5)
; CHECK-NEXT: bdnz .LBB0_1 ; CHECK-NEXT: bdnz .LBB0_1
entry: entry:
%broadcast.splatinsert16 = insertelement <4 x float> undef, float %d, i32 0 %broadcast.splatinsert16 = insertelement <4 x float> undef, float %d, i32 0
%broadcast.splat17 = shufflevector <4 x float> %broadcast.splatinsert16, <4 x float> undef, <4 x i32> zeroinitializer %broadcast.splat17 = shufflevector <4 x float> %broadcast.splatinsert16, <4 x float> undef, <4 x i32> zeroinitializer
%broadcast.splatinsert18 = insertelement <4 x float> undef, float %d, i32 0 %broadcast.splatinsert18 = insertelement <4 x float> undef, float %d, i32 0
%broadcast.splat19 = shufflevector <4 x float> %broadcast.splatinsert18, <4 x float> undef, <4 x i32> zeroinitializer %broadcast.splat19 = shufflevector <4 x float> %broadcast.splatinsert18, <4 x float> undef, <4 x i32> zeroinitializer
%broadcast.splatinsert20 = insertelement <4 x float> undef, float %d, i32 0 %broadcast.splatinsert20 = insertelement <4 x float> undef, float %d, i32 0
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