Differential D62847 Diff 202879 llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

Changeset View

Standalone View

llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

Show First 20 Lines • Show All 408 Lines • ▼ Show 20 Lines	if (TM->getOptLevel() >= CodeGenOpt::Default && EnableGEPOpt) {
// Call EarlyCSE pass to find and remove subexpressions in the lowered		// Call EarlyCSE pass to find and remove subexpressions in the lowered
// result.		// result.
addPass(createEarlyCSEPass());		addPass(createEarlyCSEPass());
// Do loop invariant code motion in case part of the lowered result is		// Do loop invariant code motion in case part of the lowered result is
// invariant.		// invariant.
addPass(createLICMPass());		addPass(createLICMPass());
}		}

		// LSR Pass always generates ICmpZero LSRUse for a loop trip count compare.
		// PPCCTRLoops pass may transform this loop trip count compare to a hardware
		// loop.
		// So putting PPCCTRLoops pass to front of LSR can make LSR more precisely
		// about generating ICmpZero.
		if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
		addPass(createPPCCTRLoops());

TargetPassConfig::addIRPasses();		TargetPassConfig::addIRPasses();
}		}

bool PPCPassConfig::addPreISel() {		bool PPCPassConfig::addPreISel() {
if (!DisablePreIncPrep && getOptLevel() != CodeGenOpt::None)		if (!DisablePreIncPrep && getOptLevel() != CodeGenOpt::None)
addPass(createPPCLoopPreIncPrepPass(getPPCTargetMachine()));		addPass(createPPCLoopPreIncPrepPass(getPPCTargetMachine()));

if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
addPass(createPPCCTRLoops());

return false;		return false;
}		}

bool PPCPassConfig::addILPOpts() {		bool PPCPassConfig::addILPOpts() {
addPass(&EarlyIfConverterID);		addPass(&EarlyIfConverterID);

if (EnableMachineCombinerPass)		if (EnableMachineCombinerPass)
addPass(&MachineCombinerID);		addPass(&MachineCombinerID);
▲ Show 20 Lines • Show All 95 Lines • Show Last 20 Lines