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lib/Target/ARM/ARMISelLowering.h
| Show First 20 Lines • Show All 765 Lines • ▼ Show 20 Lines | private: | ||||
| bool IsEligibleForTailCallOptimization(SDValue Callee, | bool IsEligibleForTailCallOptimization(SDValue Callee, | ||||
| CallingConv::ID CalleeCC, | CallingConv::ID CalleeCC, | ||||
| bool isVarArg, | bool isVarArg, | ||||
| bool isCalleeStructRet, | bool isCalleeStructRet, | ||||
| bool isCallerStructRet, | bool isCallerStructRet, | ||||
| const SmallVectorImpl<ISD::OutputArg> &Outs, | const SmallVectorImpl<ISD::OutputArg> &Outs, | ||||
| const SmallVectorImpl<SDValue> &OutVals, | const SmallVectorImpl<SDValue> &OutVals, | ||||
| const SmallVectorImpl<ISD::InputArg> &Ins, | const SmallVectorImpl<ISD::InputArg> &Ins, | ||||
| SelectionDAG& DAG) const; | SelectionDAG& DAG, | ||||
| const bool PreferIndirect) const; | |||||
| bool CanLowerReturn(CallingConv::ID CallConv, | bool CanLowerReturn(CallingConv::ID CallConv, | ||||
| MachineFunction &MF, bool isVarArg, | MachineFunction &MF, bool isVarArg, | ||||
| const SmallVectorImpl<ISD::OutputArg> &Outs, | const SmallVectorImpl<ISD::OutputArg> &Outs, | ||||
| LLVMContext &Context) const override; | LLVMContext &Context) const override; | ||||
| SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, | SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, | ||||
| const SmallVectorImpl<ISD::OutputArg> &Outs, | const SmallVectorImpl<ISD::OutputArg> &Outs, | ||||
| ▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines | |||||