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Differential D58070 Diff 192859 llvm/trunk/test/CodeGen/ARM/vdup.ll

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llvm/trunk/test/CodeGen/ARM/vdup.ll

Show First 20 Lines • Show All 424 Lines • ▼ Show 20 Lines; CHECK-NEXT: mov pc, lr
%4 = insertelement <4 x i32> %3, i32 255, i32 3 %4 = insertelement <4 x i32> %3, i32 255, i32 3
ret <4 x i32> %4 ret <4 x i32> %4
} }
define <2 x float> @check_f32(<4 x float> %v) nounwind { define <2 x float> @check_f32(<4 x float> %v) nounwind {
; CHECK-LABEL: check_f32: ; CHECK-LABEL: check_f32:
; CHECK: @ %bb.0: ; CHECK: @ %bb.0:
; CHECK-NEXT: vmov d17, r2, r3 ; CHECK-NEXT: vmov d17, r2, r3
; CHECK-NEXT: vmov d16, r0, r1
; CHECK-NEXT: vdup.32 d16, d17[1] ; CHECK-NEXT: vdup.32 d16, d17[1]
; CHECK-NEXT: vmov r0, r1, d16 ; CHECK-NEXT: vmov r0, r1, d16
; CHECK-NEXT: mov pc, lr ; CHECK-NEXT: mov pc, lr
%x = extractelement <4 x float> %v, i32 3 %x = extractelement <4 x float> %v, i32 3
%1 = insertelement <2 x float> undef, float %x, i32 0 %1 = insertelement <2 x float> undef, float %x, i32 0
%2 = insertelement <2 x float> %1, float %x, i32 1 %2 = insertelement <2 x float> %1, float %x, i32 1
ret <2 x float> %2 ret <2 x float> %2
} }
define <2 x i32> @check_i32(<4 x i32> %v) nounwind { define <2 x i32> @check_i32(<4 x i32> %v) nounwind {
; CHECK-LABEL: check_i32: ; CHECK-LABEL: check_i32:
; CHECK: @ %bb.0: ; CHECK: @ %bb.0:
; CHECK-NEXT: vmov d17, r2, r3 ; CHECK-NEXT: vmov d17, r2, r3
; CHECK-NEXT: vmov d16, r0, r1
; CHECK-NEXT: vdup.32 d16, d17[1] ; CHECK-NEXT: vdup.32 d16, d17[1]
; CHECK-NEXT: vmov r0, r1, d16 ; CHECK-NEXT: vmov r0, r1, d16
; CHECK-NEXT: mov pc, lr ; CHECK-NEXT: mov pc, lr
%x = extractelement <4 x i32> %v, i32 3 %x = extractelement <4 x i32> %v, i32 3
%1 = insertelement <2 x i32> undef, i32 %x, i32 0 %1 = insertelement <2 x i32> undef, i32 %x, i32 0
%2 = insertelement <2 x i32> %1, i32 %x, i32 1 %2 = insertelement <2 x i32> %1, i32 %x, i32 1
ret <2 x i32> %2 ret <2 x i32> %2
} }
define <4 x i16> @check_i16(<8 x i16> %v) nounwind { define <4 x i16> @check_i16(<8 x i16> %v) nounwind {
; CHECK-LABEL: check_i16: ; CHECK-LABEL: check_i16:
; CHECK: @ %bb.0: ; CHECK: @ %bb.0:
; CHECK-NEXT: vmov d17, r2, r3
; CHECK-NEXT: vmov d16, r0, r1 ; CHECK-NEXT: vmov d16, r0, r1
; CHECK-NEXT: vdup.16 d16, d16[3] ; CHECK-NEXT: vdup.16 d16, d16[3]
; CHECK-NEXT: vmov r0, r1, d16 ; CHECK-NEXT: vmov r0, r1, d16
; CHECK-NEXT: mov pc, lr ; CHECK-NEXT: mov pc, lr
%x = extractelement <8 x i16> %v, i32 3 %x = extractelement <8 x i16> %v, i32 3
%1 = insertelement <4 x i16> undef, i16 %x, i32 0 %1 = insertelement <4 x i16> undef, i16 %x, i32 0
%2 = insertelement <4 x i16> %1, i16 %x, i32 1 %2 = insertelement <4 x i16> %1, i16 %x, i32 1
ret <4 x i16> %2 ret <4 x i16> %2
} }
define <8 x i8> @check_i8(<16 x i8> %v) nounwind { define <8 x i8> @check_i8(<16 x i8> %v) nounwind {
; CHECK-LABEL: check_i8: ; CHECK-LABEL: check_i8:
; CHECK: @ %bb.0: ; CHECK: @ %bb.0:
; CHECK-NEXT: vmov d17, r2, r3
; CHECK-NEXT: vmov d16, r0, r1 ; CHECK-NEXT: vmov d16, r0, r1
; CHECK-NEXT: vdup.8 d16, d16[3] ; CHECK-NEXT: vdup.8 d16, d16[3]
; CHECK-NEXT: vmov r0, r1, d16 ; CHECK-NEXT: vmov r0, r1, d16
; CHECK-NEXT: mov pc, lr ; CHECK-NEXT: mov pc, lr
%x = extractelement <16 x i8> %v, i32 3 %x = extractelement <16 x i8> %v, i32 3
%1 = insertelement <8 x i8> undef, i8 %x, i32 0 %1 = insertelement <8 x i8> undef, i8 %x, i32 0
%2 = insertelement <8 x i8> %1, i8 %x, i32 1 %2 = insertelement <8 x i8> %1, i8 %x, i32 1
ret <8 x i8> %2 ret <8 x i8> %2
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