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Differential D59260 Diff 190273 llvm/test/CodeGen/X86/widen_load-2.ll

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llvm/test/CodeGen/X86/widen_load-2.ll

Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-NEXT: pinsrd $1, 4(%edx), %xmm0 ; X86-NEXT: pinsrd $1, 4(%edx), %xmm0
; X86-NEXT: pinsrd $2, 8(%edx), %xmm0 ; X86-NEXT: pinsrd $2, 8(%edx), %xmm0
; X86-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; X86-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X86-NEXT: pinsrd $1, 4(%ecx), %xmm1 ; X86-NEXT: pinsrd $1, 4(%ecx), %xmm1
; X86-NEXT: pinsrd $2, 8(%ecx), %xmm1 ; X86-NEXT: pinsrd $2, 8(%ecx), %xmm1
; X86-NEXT: paddd %xmm0, %xmm1 ; X86-NEXT: paddd %xmm0, %xmm1
; X86-NEXT: pextrd $2, %xmm1, 8(%eax)
; X86-NEXT: pextrd $1, %xmm1, 4(%eax) ; X86-NEXT: pextrd $1, %xmm1, 4(%eax)
; X86-NEXT: pextrd $2, %xmm1, 8(%eax)
; X86-NEXT: movd %xmm1, (%eax) ; X86-NEXT: movd %xmm1, (%eax)
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
; ;
; X64-LABEL: add3i32_2: ; X64-LABEL: add3i32_2:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; X64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
; X64-NEXT: pinsrd $2, 8(%rsi), %xmm0 ; X64-NEXT: pinsrd $2, 8(%rsi), %xmm0
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; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movdqa (%edx), %xmm0 ; X86-NEXT: movdqa (%edx), %xmm0
; X86-NEXT: movdqa 16(%edx), %xmm1 ; X86-NEXT: movdqa 16(%edx), %xmm1
; X86-NEXT: paddd (%ecx), %xmm0 ; X86-NEXT: paddd (%ecx), %xmm0
; X86-NEXT: paddd 16(%ecx), %xmm1 ; X86-NEXT: paddd 16(%ecx), %xmm1
; X86-NEXT: pextrd $2, %xmm1, 24(%eax)
; X86-NEXT: pextrd $1, %xmm1, 20(%eax)
; X86-NEXT: movd %xmm1, 16(%eax) ; X86-NEXT: movd %xmm1, 16(%eax)
; X86-NEXT: pextrd $1, %xmm1, 20(%eax)
; X86-NEXT: pextrd $2, %xmm1, 24(%eax)
; X86-NEXT: movdqa %xmm0, (%eax) ; X86-NEXT: movdqa %xmm0, (%eax)
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
; ;
; X64-LABEL: add7i32: ; X64-LABEL: add7i32:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movdqa (%rsi), %xmm0 ; X64-NEXT: movdqa (%rsi), %xmm0
; X64-NEXT: movdqa 16(%rsi), %xmm1 ; X64-NEXT: movdqa 16(%rsi), %xmm1
; X64-NEXT: paddd (%rdx), %xmm0 ; X64-NEXT: paddd (%rdx), %xmm0
; X64-NEXT: paddd 16(%rdx), %xmm1 ; X64-NEXT: paddd 16(%rdx), %xmm1
; X64-NEXT: pextrd $2, %xmm1, 24(%rdi)
; X64-NEXT: movq %xmm1, 16(%rdi) ; X64-NEXT: movq %xmm1, 16(%rdi)
; X64-NEXT: pextrd $2, %xmm1, 24(%rdi)
; X64-NEXT: movdqa %xmm0, (%rdi) ; X64-NEXT: movdqa %xmm0, (%rdi)
; X64-NEXT: retq ; X64-NEXT: retq
%a = load %i32vec7, %i32vec7* %ap, align 16 %a = load %i32vec7, %i32vec7* %ap, align 16
%b = load %i32vec7, %i32vec7* %bp, align 16 %b = load %i32vec7, %i32vec7* %bp, align 16
%x = add %i32vec7 %a, %b %x = add %i32vec7 %a, %b
store %i32vec7 %x, %i32vec7* %ret, align 16 store %i32vec7 %x, %i32vec7* %ret, align 16
ret void ret void
} }
%i32vec12 = type <12 x i32> %i32vec12 = type <12 x i32>
define void @add12i32(%i32vec12* sret %ret, %i32vec12* %ap, %i32vec12* %bp) { define void @add12i32(%i32vec12* sret %ret, %i32vec12* %ap, %i32vec12* %bp) {
; X86-LABEL: add12i32: ; X86-LABEL: add12i32:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movdqa 32(%edx), %xmm0 ; X86-NEXT: movdqa 32(%edx), %xmm0
; X86-NEXT: movdqa (%edx), %xmm1 ; X86-NEXT: movdqa (%edx), %xmm1
; X86-NEXT: movdqa 16(%edx), %xmm2 ; X86-NEXT: movdqa 16(%edx), %xmm2
; X86-NEXT: paddd (%ecx), %xmm1 ; X86-NEXT: paddd (%ecx), %xmm1
; X86-NEXT: paddd 16(%ecx), %xmm2
; X86-NEXT: paddd 32(%ecx), %xmm0 ; X86-NEXT: paddd 32(%ecx), %xmm0
; X86-NEXT: movdqa %xmm0, 32(%eax) ; X86-NEXT: paddd 16(%ecx), %xmm2
; X86-NEXT: movdqa %xmm2, 16(%eax) ; X86-NEXT: movdqa %xmm2, 16(%eax)
; X86-NEXT: movdqa %xmm0, 32(%eax)
; X86-NEXT: movdqa %xmm1, (%eax) ; X86-NEXT: movdqa %xmm1, (%eax)
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
; ;
; X64-LABEL: add12i32: ; X64-LABEL: add12i32:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movdqa (%rsi), %xmm0 ; X64-NEXT: movdqa (%rsi), %xmm0
; X64-NEXT: movdqa 16(%rsi), %xmm1 ; X64-NEXT: movdqa 16(%rsi), %xmm1
; X64-NEXT: movdqa 32(%rsi), %xmm2 ; X64-NEXT: movdqa 32(%rsi), %xmm2
; X64-NEXT: paddd (%rdx), %xmm0 ; X64-NEXT: paddd (%rdx), %xmm0
; X64-NEXT: paddd 16(%rdx), %xmm1
; X64-NEXT: paddd 32(%rdx), %xmm2 ; X64-NEXT: paddd 32(%rdx), %xmm2
; X64-NEXT: movdqa %xmm2, 32(%rdi) ; X64-NEXT: paddd 16(%rdx), %xmm1
; X64-NEXT: movdqa %xmm1, 16(%rdi) ; X64-NEXT: movdqa %xmm1, 16(%rdi)
; X64-NEXT: movdqa %xmm2, 32(%rdi)
; X64-NEXT: movdqa %xmm0, (%rdi) ; X64-NEXT: movdqa %xmm0, (%rdi)
; X64-NEXT: retq ; X64-NEXT: retq
%a = load %i32vec12, %i32vec12* %ap, align 16 %a = load %i32vec12, %i32vec12* %ap, align 16
%b = load %i32vec12, %i32vec12* %bp, align 16 %b = load %i32vec12, %i32vec12* %bp, align 16
%x = add %i32vec12 %a, %b %x = add %i32vec12 %a, %b
store %i32vec12 %x, %i32vec12* %ret, align 16 store %i32vec12 %x, %i32vec12* %ret, align 16
ret void ret void
} }
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; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movdqa (%edx), %xmm0 ; X86-NEXT: movdqa (%edx), %xmm0
; X86-NEXT: movdqa 16(%edx), %xmm1 ; X86-NEXT: movdqa 16(%edx), %xmm1
; X86-NEXT: paddw (%ecx), %xmm0 ; X86-NEXT: paddw (%ecx), %xmm0
; X86-NEXT: paddw 16(%ecx), %xmm1 ; X86-NEXT: paddw 16(%ecx), %xmm1
; X86-NEXT: pextrd $1, %xmm1, 20(%eax)
; X86-NEXT: movd %xmm1, 16(%eax) ; X86-NEXT: movd %xmm1, 16(%eax)
; X86-NEXT: pextrd $1, %xmm1, 20(%eax)
; X86-NEXT: movdqa %xmm0, (%eax) ; X86-NEXT: movdqa %xmm0, (%eax)
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
; ;
; X64-LABEL: add12i16: ; X64-LABEL: add12i16:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movdqa (%rsi), %xmm0 ; X64-NEXT: movdqa (%rsi), %xmm0
; X64-NEXT: movdqa 16(%rsi), %xmm1 ; X64-NEXT: movdqa 16(%rsi), %xmm1
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; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movdqa 32(%edx), %xmm0 ; X86-NEXT: movdqa 32(%edx), %xmm0
; X86-NEXT: movdqa (%edx), %xmm1 ; X86-NEXT: movdqa (%edx), %xmm1
; X86-NEXT: movdqa 16(%edx), %xmm2 ; X86-NEXT: movdqa 16(%edx), %xmm2
; X86-NEXT: paddw (%ecx), %xmm1 ; X86-NEXT: paddw (%ecx), %xmm1
; X86-NEXT: paddw 16(%ecx), %xmm2
; X86-NEXT: paddw 32(%ecx), %xmm0 ; X86-NEXT: paddw 32(%ecx), %xmm0
; X86-NEXT: movd %xmm0, 32(%eax) ; X86-NEXT: paddw 16(%ecx), %xmm2
; X86-NEXT: movdqa %xmm2, 16(%eax) ; X86-NEXT: movdqa %xmm2, 16(%eax)
; X86-NEXT: movd %xmm0, 32(%eax)
; X86-NEXT: movdqa %xmm1, (%eax) ; X86-NEXT: movdqa %xmm1, (%eax)
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
; ;
; X64-LABEL: add18i16: ; X64-LABEL: add18i16:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movdqa (%rsi), %xmm0 ; X64-NEXT: movdqa (%rsi), %xmm0
; X64-NEXT: movdqa 16(%rsi), %xmm1 ; X64-NEXT: movdqa 16(%rsi), %xmm1
; X64-NEXT: movdqa 32(%rsi), %xmm2 ; X64-NEXT: movdqa 32(%rsi), %xmm2
; X64-NEXT: paddw (%rdx), %xmm0 ; X64-NEXT: paddw (%rdx), %xmm0
; X64-NEXT: paddw 16(%rdx), %xmm1
; X64-NEXT: paddw 32(%rdx), %xmm2 ; X64-NEXT: paddw 32(%rdx), %xmm2
; X64-NEXT: movd %xmm2, 32(%rdi) ; X64-NEXT: paddw 16(%rdx), %xmm1
; X64-NEXT: movdqa %xmm1, 16(%rdi) ; X64-NEXT: movdqa %xmm1, 16(%rdi)
; X64-NEXT: movd %xmm2, 32(%rdi)
; X64-NEXT: movdqa %xmm0, (%rdi) ; X64-NEXT: movdqa %xmm0, (%rdi)
; X64-NEXT: retq ; X64-NEXT: retq
%a = load %i16vec18, %i16vec18* %ap, align 16 %a = load %i16vec18, %i16vec18* %ap, align 16
%b = load %i16vec18, %i16vec18* %bp, align 16 %b = load %i16vec18, %i16vec18* %bp, align 16
%x = add %i16vec18 %a, %b %x = add %i16vec18 %a, %b
store %i16vec18 %x, %i16vec18* %ret, align 16 store %i16vec18 %x, %i16vec18* %ret, align 16
ret void ret void
} }
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; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movdqa (%edx), %xmm0 ; X86-NEXT: movdqa (%edx), %xmm0
; X86-NEXT: movdqa 16(%edx), %xmm1 ; X86-NEXT: movdqa 16(%edx), %xmm1
; X86-NEXT: paddb (%ecx), %xmm0 ; X86-NEXT: paddb (%ecx), %xmm0
; X86-NEXT: paddb 16(%ecx), %xmm1 ; X86-NEXT: paddb 16(%ecx), %xmm1
; X86-NEXT: pextrb $14, %xmm1, 30(%eax)
; X86-NEXT: pextrw $6, %xmm1, 28(%eax)
; X86-NEXT: pextrd $2, %xmm1, 24(%eax)
; X86-NEXT: pextrd $1, %xmm1, 20(%eax)
; X86-NEXT: movd %xmm1, 16(%eax) ; X86-NEXT: movd %xmm1, 16(%eax)
; X86-NEXT: pextrd $1, %xmm1, 20(%eax)
; X86-NEXT: pextrd $2, %xmm1, 24(%eax)
; X86-NEXT: pextrw $6, %xmm1, 28(%eax)
; X86-NEXT: pextrb $14, %xmm1, 30(%eax)
; X86-NEXT: movdqa %xmm0, (%eax) ; X86-NEXT: movdqa %xmm0, (%eax)
; X86-NEXT: retl $4 ; X86-NEXT: retl $4
; ;
; X64-LABEL: add31i8: ; X64-LABEL: add31i8:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movdqa (%rsi), %xmm0 ; X64-NEXT: movdqa (%rsi), %xmm0
; X64-NEXT: movdqa 16(%rsi), %xmm1 ; X64-NEXT: movdqa 16(%rsi), %xmm1
; X64-NEXT: paddb (%rdx), %xmm0 ; X64-NEXT: paddb (%rdx), %xmm0
; X64-NEXT: paddb 16(%rdx), %xmm1 ; X64-NEXT: paddb 16(%rdx), %xmm1
; X64-NEXT: pextrb $14, %xmm1, 30(%rdi)
; X64-NEXT: pextrw $6, %xmm1, 28(%rdi)
; X64-NEXT: pextrd $2, %xmm1, 24(%rdi)
; X64-NEXT: movq %xmm1, 16(%rdi) ; X64-NEXT: movq %xmm1, 16(%rdi)
; X64-NEXT: pextrd $2, %xmm1, 24(%rdi)
; X64-NEXT: pextrw $6, %xmm1, 28(%rdi)
; X64-NEXT: pextrb $14, %xmm1, 30(%rdi)
; X64-NEXT: movdqa %xmm0, (%rdi) ; X64-NEXT: movdqa %xmm0, (%rdi)
; X64-NEXT: retq ; X64-NEXT: retq
%a = load %i8vec31, %i8vec31* %ap, align 16 %a = load %i8vec31, %i8vec31* %ap, align 16
%b = load %i8vec31, %i8vec31* %bp, align 16 %b = load %i8vec31, %i8vec31* %bp, align 16
%x = add %i8vec31 %a, %b %x = add %i8vec31 %a, %b
store %i8vec31 %x, %i8vec31* %ret, align 16 store %i8vec31 %x, %i8vec31* %ret, align 16
ret void ret void
} }
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