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Differential D59260 Diff 190273 llvm/test/CodeGen/Mips/v2i16tof32.ll

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llvm/test/CodeGen/Mips/v2i16tof32.ll

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; CHECK-NEXT: addiu $sp, $sp, -32 ; CHECK-NEXT: addiu $sp, $sp, -32
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: sw $fp, 28($sp) # 4-byte Folded Spill ; CHECK-NEXT: sw $fp, 28($sp) # 4-byte Folded Spill
; CHECK-NEXT: .cfi_offset 30, -4 ; CHECK-NEXT: .cfi_offset 30, -4
; CHECK-NEXT: move $fp, $sp ; CHECK-NEXT: move $fp, $sp
; CHECK-NEXT: .cfi_def_cfa_register 30 ; CHECK-NEXT: .cfi_def_cfa_register 30
; CHECK-NEXT: addiu $1, $zero, -16 ; CHECK-NEXT: addiu $1, $zero, -16
; CHECK-NEXT: and $sp, $sp, $1 ; CHECK-NEXT: and $sp, $sp, $1
; CHECK-NEXT: lw $1, 8($4) ; CHECK-NEXT: lw $1, 12($4)
; CHECK-NEXT: lw $2, 4($4) ; CHECK-NEXT: lw $2, 0($4)
; CHECK-NEXT: lw $3, 12($4) ; CHECK-NEXT: lw $3, 8($4)
; CHECK-NEXT: sw $3, 12($sp) ; CHECK-NEXT: sw $3, 8($sp)
; CHECK-NEXT: sw $1, 8($sp) ; CHECK-NEXT: sw $1, 12($sp)
; CHECK-NEXT: sw $2, 4($sp) ; CHECK-NEXT: sw $2, 0($sp)
; CHECK-NEXT: lw $1, 0($4) ; CHECK-NEXT: lw $1, 4($4)
; CHECK-NEXT: sw $1, 0($sp) ; CHECK-NEXT: sw $1, 4($sp)
; CHECK-NEXT: mtc1 $1, $f0 ; CHECK-NEXT: mtc1 $2, $f0
; CHECK-NEXT: move $sp, $fp ; CHECK-NEXT: move $sp, $fp
; CHECK-NEXT: lw $fp, 28($sp) # 4-byte Folded Reload ; CHECK-NEXT: lw $fp, 28($sp) # 4-byte Folded Reload
; CHECK-NEXT: jr $ra ; CHECK-NEXT: jr $ra
; CHECK-NEXT: addiu $sp, $sp, 32 ; CHECK-NEXT: addiu $sp, $sp, 32
; CHECK-NEXT: .set at
; CHECK-NEXT: .set macro
; CHECK-NEXT: .set reorder
; CHECK-NEXT: .end f
entry: entry:
%m = alloca <8 x i16> %m = alloca <8 x i16>
%0 = load <8 x i16>, <8 x i16>* %a %0 = load <8 x i16>, <8 x i16>* %a
store <8 x i16> %0, <8 x i16>* %m store <8 x i16> %0, <8 x i16>* %m
%1 = bitcast <8 x i16> %0 to <4 x float> %1 = bitcast <8 x i16> %0 to <4 x float>
%2 = shufflevector <4 x float> %1, <4 x float> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> %2 = shufflevector <4 x float> %1, <4 x float> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
%3 = shufflevector <8 x float> zeroinitializer, <8 x float> %2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7> %3 = shufflevector <8 x float> zeroinitializer, <8 x float> %2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
%4 = bitcast <8 x float> %3 to <8 x i32> %4 = bitcast <8 x float> %3 to <8 x i32>
%5 = extractelement <8 x i32> %4, i32 0 %5 = extractelement <8 x i32> %4, i32 0
%6 = bitcast i32 %5 to float %6 = bitcast i32 %5 to float
ret float %6 ret float %6
} }