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Differential D59260 Diff 190273 llvm/test/CodeGen/ARM/thumb1_return_sequence.ll

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llvm/test/CodeGen/ARM/thumb1_return_sequence.ll

Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines; CHECK-V5T: push {[[SAVED:(r[4567](, )?)+]], lr}
store <4 x i32> <i32 42, i32 42, i32 42, i32 42>, <4 x i32>* %b, align 16 store <4 x i32> <i32 42, i32 42, i32 42, i32 42>, <4 x i32>* %b, align 16
store <4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32>* %a, align 16 store <4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32>* %a, align 16
%0 = load <4 x i32>, <4 x i32>* %a, align 16 %0 = load <4 x i32>, <4 x i32>* %a, align 16
call void @llvm.va_start(i8* null) call void @llvm.va_start(i8* null)
ret <4 x i32> %0 ret <4 x i32> %0
; Epilogue ; Epilogue
; -------- ; --------
; CHECK-V4T: ldr [[POP:r[4567]]], [sp, #12] ; CHECK-V4T: ldr [[POP:r[4567]]], [sp, #16]
; CHECK-V4T-NEXT: mov lr, [[POP]] ; CHECK-V4T-NEXT: mov lr, [[POP]]
; CHECK-V4T-NEXT: pop {[[SAVED]]} ; CHECK-V4T-NEXT: pop {[[SAVED]]}
; CHECK-V4T-NEXT: add sp, #16 ; CHECK-V4T-NEXT: add sp, #16
; CHECK-V4T-NEXT: bx lr ; CHECK-V4T-NEXT: bx lr
; CHECK-V5T: lsls r4 ; CHECK-V5T: lsls r4
; CHECK-V5T-NEXT: mov sp, r4 ; CHECK-V5T-NEXT: mov sp, r4
; CHECK-V5T: ldr [[POP:r[4567]]], [sp, #12] ; CHECK-V5T: ldr [[POP:r[4567]]], [sp, #16]
; CHECK-V5T-NEXT: mov lr, [[POP]] ; CHECK-V5T-NEXT: mov lr, [[POP]]
; CHECK-V5T-NEXT: pop {[[SAVED]]} ; CHECK-V5T-NEXT: pop {[[SAVED]]}
; CHECK-V5T-NEXT: add sp, #16 ; CHECK-V5T-NEXT: add sp, #16
; CHECK-V5T-NEXT: bx lr ; CHECK-V5T-NEXT: bx lr
} }
; CHECK-V4T-LABEL: simpleframe ; CHECK-V4T-LABEL: simpleframe
; CHECK-V5T-LABEL: simpleframe ; CHECK-V5T-LABEL: simpleframe
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