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Differential D58078 Diff 186343 lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

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lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

Show First 20 Lines • Show All 446 Lines • ▼ Show 20 LinesMachineInstrBuilder MachineIRBuilder::buildCast(const DstOp &Dst,
else { else {
assert(!SrcTy.isPointer() && !DstTy.isPointer() && "n G_ADDRCAST yet"); assert(!SrcTy.isPointer() && !DstTy.isPointer() && "n G_ADDRCAST yet");
Opcode = TargetOpcode::G_BITCAST; Opcode = TargetOpcode::G_BITCAST;
} }
return buildInstr(Opcode, Dst, Src); return buildInstr(Opcode, Dst, Src);
} }
MachineInstrBuilder MachineIRBuilder::buildExtract(unsigned Res, unsigned Src, MachineInstrBuilder MachineIRBuilder::buildExtract(const DstOp &Dst,
const SrcOp &Src,
uint64_t Index) { uint64_t Index) {
LLT SrcTy = Src.getLLTTy(*getMRI());
LLT DstTy = Dst.getLLTTy(*getMRI());
#ifndef NDEBUG #ifndef NDEBUG
assert(getMRI()->getType(Src).isValid() && "invalid operand type"); assert(SrcTy.isValid() && "invalid operand type");
assert(getMRI()->getType(Res).isValid() && "invalid operand type"); assert(DstTy.isValid() && "invalid operand type");
assert(Index + getMRI()->getType(Res).getSizeInBits() <= assert(Index + DstTy.getSizeInBits() <= SrcTy.getSizeInBits() &&
getMRI()->getType(Src).getSizeInBits() &&
"extracting off end of register"); "extracting off end of register");
#endif #endif
if (getMRI()->getType(Res).getSizeInBits() == if (DstTy.getSizeInBits() == SrcTy.getSizeInBits()) {
getMRI()->getType(Src).getSizeInBits()) {
assert(Index == 0 && "insertion past the end of a register"); assert(Index == 0 && "insertion past the end of a register");
return buildCast(Res, Src); return buildCast(Dst, Src);
} }
return buildInstr(TargetOpcode::G_EXTRACT) auto Extract = buildInstr(TargetOpcode::G_EXTRACT);
.addDef(Res) Dst.addDefToMIB(*getMRI(), Extract);
aemersonUnsubmitted
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Out of curiosity, why does this need changing?

aemerson: Out of curiosity, why does this need changing?
arsenmAuthorUnsubmitted
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A random assortment of functions in MachineIRBuilder don't use SrcOp/DstOp, so this makes it consistent with the other operations. I can commit this separately

arsenm: A random assortment of functions in MachineIRBuilder don't use SrcOp/DstOp, so this makes it…
.addUse(Src) Src.addSrcToMIB(Extract);
.addImm(Index); Extract.addImm(Index);
return Extract;
} }
void MachineIRBuilder::buildSequence(unsigned Res, ArrayRef<unsigned> Ops, void MachineIRBuilder::buildSequence(unsigned Res, ArrayRef<unsigned> Ops,
ArrayRef<uint64_t> Indices) { ArrayRef<uint64_t> Indices) {
#ifndef NDEBUG #ifndef NDEBUG
assert(Ops.size() == Indices.size() && "incompatible args"); assert(Ops.size() == Indices.size() && "incompatible args");
assert(!Ops.empty() && "invalid trivial sequence"); assert(!Ops.empty() && "invalid trivial sequence");
assert(std::is_sorted(Indices.begin(), Indices.end()) && assert(std::is_sorted(Indices.begin(), Indices.end()) &&
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