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lib/Target/ARM/ARMSubtarget.cpp
| Show First 20 Lines • Show All 87 Lines • ▼ Show 20 Lines | if (STI.isThumb1Only()) | ||||
| return (ARMFrameLowering *)new Thumb1FrameLowering(STI); | return (ARMFrameLowering *)new Thumb1FrameLowering(STI); | ||||
| return new ARMFrameLowering(STI); | return new ARMFrameLowering(STI); | ||||
| } | } | ||||
| ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU, | ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU, | ||||
| const std::string &FS, | const std::string &FS, | ||||
| const ARMBaseTargetMachine &TM, bool IsLittle) | const ARMBaseTargetMachine &TM, bool IsLittle) | ||||
| : ARMGenSubtargetInfo(TT, CPU, FS), UseMulOps(UseFusedMulOps), | : ARMGenSubtargetInfo(TT, CPU, FS), | ||||
| UseMulOps(UseFusedMulOps), | |||||
| ReserveRRegister(ARM::GPRRegClass.getNumRegs()), | |||||
| CPUString(CPU), IsLittle(IsLittle), TargetTriple(TT), Options(TM.Options), | CPUString(CPU), IsLittle(IsLittle), TargetTriple(TT), Options(TM.Options), | ||||
| TM(TM), FrameLowering(initializeFrameLowering(CPU, FS)), | TM(TM), FrameLowering(initializeFrameLowering(CPU, FS)), | ||||
| // At this point initializeSubtargetDependencies has been called so | // At this point initializeSubtargetDependencies has been called so | ||||
| // we can query directly. | // we can query directly. | ||||
| InstrInfo(isThumb1Only() | InstrInfo(isThumb1Only() | ||||
| ? (ARMBaseInstrInfo *)new Thumb1InstrInfo(*this) | ? (ARMBaseInstrInfo *)new Thumb1InstrInfo(*this) | ||||
| : !isThumb() | : !isThumb() | ||||
| ? (ARMBaseInstrInfo *)new ARMInstrInfo(*this) | ? (ARMBaseInstrInfo *)new ARMInstrInfo(*this) | ||||
| ▲ Show 20 Lines • Show All 139 Lines • ▼ Show 20 Lines | void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { | ||||
| // NEON f32 ops are non-IEEE 754 compliant. Darwin is ok with it by default. | // NEON f32 ops are non-IEEE 754 compliant. Darwin is ok with it by default. | ||||
| const FeatureBitset &Bits = getFeatureBits(); | const FeatureBitset &Bits = getFeatureBits(); | ||||
| if ((Bits[ARM::ProcA5] || Bits[ARM::ProcA8]) && // Where this matters | if ((Bits[ARM::ProcA5] || Bits[ARM::ProcA8]) && // Where this matters | ||||
| (Options.UnsafeFPMath || isTargetDarwin())) | (Options.UnsafeFPMath || isTargetDarwin())) | ||||
| UseNEONForSinglePrecisionFP = true; | UseNEONForSinglePrecisionFP = true; | ||||
| if (isRWPI()) | if (isRWPI()) | ||||
| ReserveR9 = true; | ReserveRRegister.set(9); | ||||
| // FIXME: Teach TableGen to deal with these instead of doing it manually here. | // FIXME: Teach TableGen to deal with these instead of doing it manually here. | ||||
| switch (ARMProcFamily) { | switch (ARMProcFamily) { | ||||
| case Others: | case Others: | ||||
| case CortexA5: | case CortexA5: | ||||
| break; | break; | ||||
| case CortexA7: | case CortexA7: | ||||
| LdStMultipleTiming = DoubleIssue; | LdStMultipleTiming = DoubleIssue; | ||||
| ▲ Show 20 Lines • Show All 145 Lines • Show Last 20 Lines | |||||