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llvm/trunk/lib/MC/MCInstrDesc.cpp
| Show All 33 Lines | bool MCInstrDesc::mayAffectControlFlow(const MCInst &MI, | ||||
| const MCRegisterInfo &RI) const { | const MCRegisterInfo &RI) const { | ||||
| if (isBranch() || isCall() || isReturn() || isIndirectBranch()) | if (isBranch() || isCall() || isReturn() || isIndirectBranch()) | ||||
| return true; | return true; | ||||
| unsigned PC = RI.getProgramCounter(); | unsigned PC = RI.getProgramCounter(); | ||||
| if (PC == 0) | if (PC == 0) | ||||
| return false; | return false; | ||||
| if (hasDefOfPhysReg(MI, PC, RI)) | if (hasDefOfPhysReg(MI, PC, RI)) | ||||
| return true; | return true; | ||||
| // A variadic instruction may define PC in the variable operand list. | |||||
| // There's currently no indication of which entries in a variable | |||||
| // list are defs and which are uses. While that's the case, this function | |||||
| // needs to assume they're defs in order to be conservatively correct. | |||||
| for (int i = NumOperands, e = MI.getNumOperands(); i != e; ++i) { | |||||
| if (MI.getOperand(i).isReg() && | |||||
| RI.isSubRegisterEq(PC, MI.getOperand(i).getReg())) | |||||
| return true; | |||||
| } | |||||
| return false; | return false; | ||||
| } | } | ||||
| bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, | bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, | ||||
| const MCRegisterInfo *MRI) const { | const MCRegisterInfo *MRI) const { | ||||
| if (const MCPhysReg *ImpDefs = ImplicitDefs) | if (const MCPhysReg *ImpDefs = ImplicitDefs) | ||||
| for (; *ImpDefs; ++ImpDefs) | for (; *ImpDefs; ++ImpDefs) | ||||
| if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs))) | if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs))) | ||||
| return true; | return true; | ||||
| return false; | return false; | ||||
| } | } | ||||
| bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg, | bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg, | ||||
| const MCRegisterInfo &RI) const { | const MCRegisterInfo &RI) const { | ||||
| for (int i = 0, e = NumDefs; i != e; ++i) | for (int i = 0, e = NumDefs; i != e; ++i) | ||||
| if (MI.getOperand(i).isReg() && | if (MI.getOperand(i).isReg() && | ||||
| RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) | RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) | ||||
| return true; | return true; | ||||
| if (variadicOpsAreDefs()) | |||||
| for (int i = NumOperands - 1, e = MI.getNumOperands(); i != e; ++i) | |||||
| if (MI.getOperand(i).isReg() && | |||||
| RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) | |||||
| return true; | |||||
| return hasImplicitDefOfPhysReg(Reg, &RI); | return hasImplicitDefOfPhysReg(Reg, &RI); | ||||
| } | } | ||||