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llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
Show First 20 Lines • Show All 364 Lines • ▼ Show 20 Lines | CodeGenInstruction::CodeGenInstruction(Record *R) | ||||
hasCtrlDep = R->getValueAsBit("hasCtrlDep"); | hasCtrlDep = R->getValueAsBit("hasCtrlDep"); | ||||
isNotDuplicable = R->getValueAsBit("isNotDuplicable"); | isNotDuplicable = R->getValueAsBit("isNotDuplicable"); | ||||
isRegSequence = R->getValueAsBit("isRegSequence"); | isRegSequence = R->getValueAsBit("isRegSequence"); | ||||
isExtractSubreg = R->getValueAsBit("isExtractSubreg"); | isExtractSubreg = R->getValueAsBit("isExtractSubreg"); | ||||
isInsertSubreg = R->getValueAsBit("isInsertSubreg"); | isInsertSubreg = R->getValueAsBit("isInsertSubreg"); | ||||
isConvergent = R->getValueAsBit("isConvergent"); | isConvergent = R->getValueAsBit("isConvergent"); | ||||
hasNoSchedulingInfo = R->getValueAsBit("hasNoSchedulingInfo"); | hasNoSchedulingInfo = R->getValueAsBit("hasNoSchedulingInfo"); | ||||
FastISelShouldIgnore = R->getValueAsBit("FastISelShouldIgnore"); | FastISelShouldIgnore = R->getValueAsBit("FastISelShouldIgnore"); | ||||
variadicOpsAreDefs = R->getValueAsBit("variadicOpsAreDefs"); | |||||
bool Unset; | bool Unset; | ||||
mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset); | mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset); | ||||
mayLoad_Unset = Unset; | mayLoad_Unset = Unset; | ||||
mayStore = R->getValueAsBitOrUnset("mayStore", Unset); | mayStore = R->getValueAsBitOrUnset("mayStore", Unset); | ||||
mayStore_Unset = Unset; | mayStore_Unset = Unset; | ||||
hasSideEffects = R->getValueAsBitOrUnset("hasSideEffects", Unset); | hasSideEffects = R->getValueAsBitOrUnset("hasSideEffects", Unset); | ||||
hasSideEffects_Unset = Unset; | hasSideEffects_Unset = Unset; | ||||
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