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Differential D54137 Diff 176310 test/CodeGen/AArch64/arm64-ccmp.ll

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test/CodeGen/AArch64/arm64-ccmp.ll

Show First 20 Lines • Show All 520 Lines • ▼ Show 20 Linesdefine i32 @select_or_olt_one(double %v0, double %v1, double %v2, double %v3, i32 %a, i32 %b) #0 {
%cr = or i1 %c1, %c0 %cr = or i1 %c1, %c0
%sel = select i1 %cr, i32 %a, i32 %b %sel = select i1 %cr, i32 %a, i32 %b
ret i32 %sel ret i32 %sel
} }
; CHECK-LABEL: select_or_one_olt: ; CHECK-LABEL: select_or_one_olt:
; CHECK-LABEL: ; %bb.0: ; CHECK-LABEL: ; %bb.0:
; CHECK-NEXT: fcmp d0, d1 ; CHECK-NEXT: fcmp d0, d1
; CHECK-NEXT: fccmp d0, d1, #1, ne ; CHECK-NEXT: fccmp d0, d1, #8, le
; CHECK-NEXT: fccmp d2, d3, #8, vs ; CHECK-NEXT: fccmp d2, d3, #8, pl
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Note those changes here and in the next test are benign, the result is the same either way (I even tested this with a program that tries all possible combinations of float numbers generating different comparison results).

MatzeB: Note those changes here and in the next test are benign, the result is the same either way (I…
; CHECK-NEXT: csel w0, w0, w1, mi ; CHECK-NEXT: csel w0, w0, w1, mi
; CHECK-NEXT: ret ; CHECK-NEXT: ret
define i32 @select_or_one_olt(double %v0, double %v1, double %v2, double %v3, i32 %a, i32 %b) #0 { define i32 @select_or_one_olt(double %v0, double %v1, double %v2, double %v3, i32 %a, i32 %b) #0 {
%c0 = fcmp one double %v0, %v1 %c0 = fcmp one double %v0, %v1
%c1 = fcmp olt double %v2, %v3 %c1 = fcmp olt double %v2, %v3
%cr = or i1 %c1, %c0 %cr = or i1 %c1, %c0
%sel = select i1 %cr, i32 %a, i32 %b %sel = select i1 %cr, i32 %a, i32 %b
ret i32 %sel ret i32 %sel
Show All 12 Linesdefine i32 @select_or_olt_ueq(double %v0, double %v1, double %v2, double %v3, i32 %a, i32 %b) #0 {
%cr = or i1 %c1, %c0 %cr = or i1 %c1, %c0
%sel = select i1 %cr, i32 %a, i32 %b %sel = select i1 %cr, i32 %a, i32 %b
ret i32 %sel ret i32 %sel
} }
; CHECK-LABEL: select_or_ueq_olt: ; CHECK-LABEL: select_or_ueq_olt:
; CHECK-LABEL: ; %bb.0: ; CHECK-LABEL: ; %bb.0:
; CHECK-NEXT: fcmp d0, d1 ; CHECK-NEXT: fcmp d0, d1
; CHECK-NEXT: fccmp d0, d1, #8, le ; CHECK-NEXT: fccmp d0, d1, #1, ne
; CHECK-NEXT: fccmp d2, d3, #8, mi ; CHECK-NEXT: fccmp d2, d3, #8, vc
; CHECK-NEXT: csel w0, w0, w1, mi ; CHECK-NEXT: csel w0, w0, w1, mi
; CHECK-NEXT: ret ; CHECK-NEXT: ret
define i32 @select_or_ueq_olt(double %v0, double %v1, double %v2, double %v3, i32 %a, i32 %b) #0 { define i32 @select_or_ueq_olt(double %v0, double %v1, double %v2, double %v3, i32 %a, i32 %b) #0 {
%c0 = fcmp ueq double %v0, %v1 %c0 = fcmp ueq double %v0, %v1
%c1 = fcmp olt double %v2, %v3 %c1 = fcmp olt double %v2, %v3
%cr = or i1 %c1, %c0 %cr = or i1 %c1, %c0
%sel = select i1 %cr, i32 %a, i32 %b %sel = select i1 %cr, i32 %a, i32 %b
ret i32 %sel ret i32 %sel
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
define i32 @f128_select_and_olt_oge(fp128 %v0, fp128 %v1, fp128 %v2, fp128 %v3, i32 %a, i32 %b) #0 { define i32 @f128_select_and_olt_oge(fp128 %v0, fp128 %v1, fp128 %v2, fp128 %v3, i32 %a, i32 %b) #0 {
%c0 = fcmp olt fp128 %v0, %v1 %c0 = fcmp olt fp128 %v0, %v1
%c1 = fcmp oge fp128 %v2, %v3 %c1 = fcmp oge fp128 %v2, %v3
%cr = and i1 %c1, %c0 %cr = and i1 %c1, %c0
%sel = select i1 %cr, i32 %a, i32 %b %sel = select i1 %cr, i32 %a, i32 %b
ret i32 %sel ret i32 %sel
} }
; This testcase resembles the core problem of http://llvm.org/PR39550
; (an OR operation is 2 levels deep but needs to be implemented first)
; CHECK-LABEL: deep_or
; CHECK: cmp w2, #20
; CHECK-NEXT: ccmp w2, #15, #4, ne
; CHECK-NEXT: ccmp w1, #0, #4, eq
; CHECK-NEXT: ccmp w0, #0, #4, ne
; CHECK-NEXT: csel w0, w4, w5, ne
; CHECK-NEXT: ret
define i32 @deep_or(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) {
%c0 = icmp ne i32 %a0, 0
%c1 = icmp ne i32 %a1, 0
%c2 = icmp eq i32 %a2, 15
%c3 = icmp eq i32 %a2, 20
%or = or i1 %c2, %c3
%and0 = and i1 %or, %c1
%and1 = and i1 %and0, %c0
%sel = select i1 %and1, i32 %x, i32 %y
ret i32 %sel
}
; Variation of deep_or, we still need to implement the OR first though.
; CHECK-LABEL: deep_or1
; CHECK: cmp w2, #20
; CHECK-NEXT: ccmp w2, #15, #4, ne
; CHECK-NEXT: ccmp w0, #0, #4, eq
; CHECK-NEXT: ccmp w1, #0, #4, ne
; CHECK-NEXT: csel w0, w4, w5, ne
; CHECK-NEXT: ret
define i32 @deep_or1(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) {
%c0 = icmp ne i32 %a0, 0
%c1 = icmp ne i32 %a1, 0
%c2 = icmp eq i32 %a2, 15
%c3 = icmp eq i32 %a2, 20
%or = or i1 %c2, %c3
%and0 = and i1 %c0, %or
%and1 = and i1 %and0, %c1
%sel = select i1 %and1, i32 %x, i32 %y
ret i32 %sel
}
; Variation of deep_or, we still need to implement the OR first though.
; CHECK-LABEL: deep_or2
; CHECK: cmp w2, #20
; CHECK-NEXT: ccmp w2, #15, #4, ne
; CHECK-NEXT: ccmp w1, #0, #4, eq
; CHECK-NEXT: ccmp w0, #0, #4, ne
; CHECK-NEXT: csel w0, w4, w5, ne
; CHECK-NEXT: ret
define i32 @deep_or2(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) {
%c0 = icmp ne i32 %a0, 0
%c1 = icmp ne i32 %a1, 0
%c2 = icmp eq i32 %a2, 15
%c3 = icmp eq i32 %a2, 20
%or = or i1 %c2, %c3
%and0 = and i1 %c0, %c1
%and1 = and i1 %and0, %or
%sel = select i1 %and1, i32 %x, i32 %y
ret i32 %sel
}
attributes #0 = { nounwind } attributes #0 = { nounwind }