Differential D44886 Diff 144833 lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

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lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

Show First 20 Lines • Show All 179 Lines • ▼ Show 20 Lines	RISCVMCCodeEmitter::getImmOpValueAsr1(const MCInst &MI, unsigned OpNo,
}		}

return getImmOpValue(MI, OpNo, Fixups, STI);		return getImmOpValue(MI, OpNo, Fixups, STI);
}		}

unsigned RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,		unsigned RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,		SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {		const MCSubtargetInfo &STI) const {
		bool EnableRelax = STI.getFeatureBits()[RISCV::FeatureRelax];
const MCOperand &MO = MI.getOperand(OpNo);		const MCOperand &MO = MI.getOperand(OpNo);

MCInstrDesc const &Desc = MCII.get(MI.getOpcode());		MCInstrDesc const &Desc = MCII.get(MI.getOpcode());
unsigned MIFrm = Desc.TSFlags & RISCVII::InstFormatMask;		unsigned MIFrm = Desc.TSFlags & RISCVII::InstFormatMask;

// If the destination is an immediate, there is nothing to do		// If the destination is an immediate, there is nothing to do
if (MO.isImm())		if (MO.isImm())
return MO.getImm();		return MO.getImm();
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines	unsigned RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
}		}

assert(FixupKind != RISCV::fixup_riscv_invalid && "Unhandled expression!");		assert(FixupKind != RISCV::fixup_riscv_invalid && "Unhandled expression!");

Fixups.push_back(		Fixups.push_back(
MCFixup::create(0, Expr, MCFixupKind(FixupKind), MI.getLoc()));		MCFixup::create(0, Expr, MCFixupKind(FixupKind), MI.getLoc()));
++MCNumFixups;		++MCNumFixups;

		if (EnableRelax) {
		if (FixupKind == RISCV::fixup_riscv_call) {
		Fixups.push_back(
		MCFixup::create(0, Expr, MCFixupKind(RISCV::fixup_riscv_relax),
		MI.getLoc()));
		++MCNumFixups;
		}
		}

return 0;		return 0;
}		}

#include "RISCVGenMCCodeEmitter.inc"		#include "RISCVGenMCCodeEmitter.inc"